Patents by Inventor Yukihiro Sato

Yukihiro Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100258922
    Abstract: To prevent, in a resin-sealed type semiconductor package, generation of cracks in a die bonding material used for mounting of a semiconductor chip. A semiconductor chip is mounted over the upper surface of a die pad via a die bonding material, followed by sealing with an insulating resin. The top surface of the die pad to be brought into contact with the insulating resin is surface-roughened, while the bottom surface of the die pad and an outer lead portion are not surface-roughened.
    Type: Application
    Filed: March 5, 2010
    Publication date: October 14, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Hiroyuki NAKAMURA, Akira MUTO, Nobuya KOIKE, Atsushi NISHIKIZAWA, Yukihiro SATO, Katsuhiko FUNATSU
  • Publication number: 20100151947
    Abstract: A game system allowing a player corresponding to a terminal, from which communication has been cut, to restart the game from the game situation at the moment of communication cut. The server has a game continuation device for continuing the game except the error terminal in a case where the error terminal occurs, and a server restart device for transmitting situation information of each player after communication recovery as information for restart, and restarting the game by communication with only the error terminal. The error terminal comprises a terminal restart device for restarting the game after communication recovery based on the situation information included in the information for restart, and a virtual input operation device for functioning as a virtual player instead of players P corresponding to other terminal.
    Type: Application
    Filed: November 8, 2006
    Publication date: June 17, 2010
    Applicant: KONAMI DIGITAL ENTERTAINMENT CO., LTD.
    Inventors: Yukihiro Sato, Katsutoshi Yoshida, Masato Miyazaki
  • Publication number: 20100140718
    Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 10, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
  • Publication number: 20100127683
    Abstract: The electrical characteristics of a semiconductor device are enhanced. In the package of the semiconductor device, there are encapsulated first and second semiconductor chips with a power MOS-FET formed therein and a third semiconductor chip with a control circuit for controlling their operation formed therein. The bonding pads for source electrode of the first semiconductor chip on the high side are electrically connected to a die pad through a metal plate. The bonding pad for source electrode of the second semiconductor chip on the low side is electrically connected to lead wiring through a metal plate. The metal plate includes a first portion in contact with the bonding pad of the second semiconductor chip, a second portion extended from a short side of the first portion to the lead wiring, and a third portion extended from a long side of the first portion to the lead wiring.
    Type: Application
    Filed: January 28, 2010
    Publication date: May 27, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Tomoaki Uno, Nobuyoshi Matsuura, Yukihiro Sato, Keiichi Okawa, Tetsuya Kawashima, Kisho Ashida
  • Publication number: 20100123240
    Abstract: A semiconductor device is provided with improved reliability. A semiconductor chip is mounted over a chip mounting portion of a lead frame via solder. A metal plate is arranged over a source pad of the semiconductor chip and a lead portion of a lead frame via solder. A solder reflow process is performed thereby to bond the semiconductor chip over the chip mounting portion with a solder, and to bond the metal plate to the source pad and the lead portion with the other solders. The lead frame is formed of a copper alloy, and thus has its softening temperature higher than the temperature of the solder reflow process. The metal plate is formed of oxygen-free copper, and has its softening temperature lower than the temperature of the solder reflow process, whereby the metal plate is softened in the solder reflow process. Thereafter, a gate pad electrode of the semiconductor chip is coupled to a lead portion via the wire, a sealing resin portion is formed, and then the lead frame is cut.
    Type: Application
    Filed: November 16, 2009
    Publication date: May 20, 2010
    Inventors: Yukihiro SATO, Katsuhiko Funatsu, Hiroyuki Nakamura
  • Patent number: 7692285
    Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: April 6, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
  • Patent number: 7679173
    Abstract: The electrical characteristics of a semiconductor device are enhanced. In the package of the semiconductor device, there are encapsulated first and second semiconductor chips with a power MOS-FET formed therein and a third semiconductor chip with a control circuit for controlling their operation formed therein. The bonding pads for source electrode of the first semiconductor chip on the high side are electrically connected to a die pad through a metal plate. The bonding pad for source electrode of the second semiconductor chip on the low side is electrically connected to lead wiring through a metal plate. The metal plate includes a first portion in contact with the bonding pad of the second semiconductor chip, a second portion extended from a short side of the first portion to the lead wiring, and a third portion extended from a long side of the first portion to the lead wiring.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: March 16, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Tomoaki Uno, Nobuyoshi Matsuura, Yukihiro Sato, Keiichi Okawa, Tetsuya Kawashima, Kisho Ashida
  • Publication number: 20100059875
    Abstract: The reliability of a semiconductor device is improved. A package of a semiconductor device internally includes a first semiconductor chip and a second semiconductor chip in which power MOS•FETs are formed and a third semiconductor chip in which a control circuit controlling the first and second semiconductor chips is formed. The first to third semiconductor chips are mounted on die pads respectively. Source electrode bonding pads of the first semiconductor chip on a high side are electrically connected with a first die pad of the die pads via a metal plate. On a top surface of the die pad 7D2, a plated layer formed in a region where the second semiconductor chip is mounted, and another plated layer formed in a region where the metal plate is joined are provided and the plated layers are separated each other with a region where no plated layer is formed in between.
    Type: Application
    Filed: June 8, 2009
    Publication date: March 11, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Yukihiro Sato, Tomoaki Uno
  • Patent number: 7666553
    Abstract: A fabrication method for a photomask is disclosed. Two or more metal containing layers are formed over a substrate, and a main pattern and a monitor pattern are formed over one or more of the two or more metal containing layers other than the lowermost metal containing layer. Then, the monitor pattern is measured, and the monitor pattern after being measured is removed. Then, the main pattern is formed over the lowermost metal containing layer to fabricate a photomask formed from the two or more metal containing layers.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: February 23, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Koji Hosono, Yukihiro Sato
  • Patent number: 7659144
    Abstract: Disclosed is a semiconductor device which makes it easy to design a wiring pattern for a wiring substrate on which the semiconductor device is to be mounted. In manufacturing plural semiconductor devices for providing different amounts of output current, arrangements and numbers of leads to which semiconductor chips for power transistors of the semiconductor devices are to be electrically connected are changed according to output current requirements for the semiconductor devices, whereas arrangements and numbers of leads to which semiconductor chips for control circuits of the semiconductor devices are to be electrically connected are fixed to be common to the semiconductor devices. In this way, the probability of malfunction of control circuits (PWM circuits) of the semiconductor devices can be reduced, so that a semiconductor device which makes it easy to design a wiring pattern for a wiring substrate on which the semiconductor device is to be mounted can be provided.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: February 9, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Nobuyuki Shirai, Ryotaro Kudo, Yukihiro Sato
  • Publication number: 20090298593
    Abstract: In a game system, a server apparatus (3) that communicates with a plurality of game devices (1) stores play data elements for a plurality of players and public IDs for identifying a plurality of players in a latest play data table (T1) and a public ID table (T2). The server apparatus (3) transmits to a mobile terminal (4), which is being used by a player, information depending on latest play data elements stored in the latest play data table (T1), the latest play data elements belonging to other players who have been registered with the personal relationship table (T3) as a friend of the player possessing the mobile terminal (4). Upon receiving a public-ID-change request from a mobile terminal (4), which is being used by a player, the server apparatus (3) changes the public ID of the player stored in the public ID table (T2).
    Type: Application
    Filed: August 31, 2006
    Publication date: December 3, 2009
    Inventors: Kenji Kobayashi, Yukizumi Terao, Yukihiro Sato, Masaru Nakamura
  • Publication number: 20090280894
    Abstract: In a game system, a server apparatus (3) that communicates with a plurality of game devices (1) receives a play data element and a card ID of a card (2) whenever a player plays using any of the game devices (1) using the card (2), and generates terminal-provided play data elements indicating the skill of the player in the game on the basis thereof. The server apparatus (3) stores the terminal-provided play data element, the card ID, and a date data item indicating the current date in such a manner that they are mutually associated. The server apparatus (3) transmits, to a mobile terminal (4), which is owned by a second player who designates a first player as the second player's friend, various pieces of information.
    Type: Application
    Filed: August 31, 2006
    Publication date: November 12, 2009
    Inventors: Kenji Kobayashi, Yukizumi Terao, Yukihiro Sato, Masaru Nakamura
  • Publication number: 20090176575
    Abstract: There are stored in a database stored in a host server (12) of a server system (10), a portable phone terminal ID, a player ID, a card ID, and individual information in association with one another. The card ID is identical to a card ID stored in a card (28) carried by a player. A course data set contained in the individual information specifies an order and names of music pieces to be played by a game device (18) capable of communicating with the game server system (10). A player uses a portable information terminal (26) to execute an application to specify a card ID and generate a course data set, the generated course data set is registered in the database together with a portable telephone terminal ID of the portable information terminal (26), as individual information corresponding to the card ID. When a player inserts his/her own card (28) in a game device (18), the game device (18) transmits to the game device (18) a course data set corresponding to the card ID by accessing host server (12).
    Type: Application
    Filed: March 1, 2005
    Publication date: July 9, 2009
    Applicant: KONAMI DIGITAL ENTERTAINMENT CO., LTD.
    Inventors: Yukizumi Terao, Masaru Nakamura, Ryuta Tamura, Kenji Kobayashi, Yukihiro Sato, Atsushi Kitagawa, Masato Miyazaki, Katsutoshi Yoshida, Sachiko Seino
  • Patent number: 7414066
    Abstract: The present invention provides to a novel compound having an ACAT inhibiting activity.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: August 19, 2008
    Assignee: Kowa Company Ltd.
    Inventors: Kimiyuki Shibuya, Toru Miura, Katsumi Kawamine, Yukihiro Sato, Tadaaki Ohgiya, Takahiro Kitamura, Chiyoka Ozaki, Toshiyuki Edano, Mitsuteru Hirata
  • Patent number: 7393866
    Abstract: The present invention provides to a novel compound having an ACAT inhibiting activity.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: July 1, 2008
    Assignee: Kowa Company, Ltd.
    Inventors: Kimiyuki Shibuya, Toru Miura, Katsumi Kawamine, Yukihiro Sato, Tadaaki Ohgiya, Takahiro Kitamura, Chiyoka Ozaki, Toshiyuki Edano, Mitsuteru Hirata
  • Publication number: 20080075293
    Abstract: The present invention relates to an electronic device that can output received voice and input transmitted voice at the same time and enhances a suppression function for echo due to the received voice sneaking into the transmitted voice. An electronic device (e.g., portable telephone terminal device) outputs the received voice from a voice output unit (speaker), inputs the transmitted voice through a voice input unit (microphone), and includes an echo canceller unit that subtracts a pseudo echo signal for the received voice from the transmitted voice to suppress an echo component in the transmitted voice and a controlling unit that changes an echo suppression amount of the echo canceller unit in accordance with the received voice volume.
    Type: Application
    Filed: September 25, 2007
    Publication date: March 27, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Yukihiro SATO, Nobuhiro MOCHIZUKI
  • Publication number: 20080054422
    Abstract: It is made for the layout of the mounting wiring at the time of mounting to become efficient by changing the structure of a semiconductor device. A first chip is mounted on a first die pad, and a second chip is also mounted on a second die pad. A first die pad and a second die pad do division structure in parallel to the first side and second side of sealing body 40. As a result, the pin for an output from a first chip and the pin for control of the circuit for a drive can make it able to project from a counter direction, and can set the wiring layout at the time of mounting as the minimum route.
    Type: Application
    Filed: August 20, 2007
    Publication date: March 6, 2008
    Inventors: Nobuya KOIKE, Atsushi FUJIKI, Norio KIDO, Yukihiro SATO, Hiroyuki NAKAMURA
  • Patent number: 7291229
    Abstract: A method of carburizing treatment is proposed in which if carburizing is carried out at a low temperature, carbon will not turn amorphose and deposit on the surface of a titanium metal but reliably penetrate into between metallic atoms. It is a method of surface treatment of a titanium metal comprising the steps of heating the titanium metal to a temperature of 400-690° C. in a cleaning gas atmosphere containing hydrogen gas, subjecting the surface of the titanium metal to cleaning by applying a DC voltage of 200-1500 V, and plasma carburizing in an atmosphere comprising a carburizing gas having an atomic weight ratio of hydrogen atoms (H) to carbon atoms (C) adjusted to 1?H/C?9 at a pressure of 13-400 Pa and a temperature of 400-690° C. Ionization reaction in the gas is suppressed suitably. Because there exists no excessive carbon which is not used for carburization but turns soot or glass-like carbon, in the atmosphere during carburization, carburizing reaction progresses smoothly.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: November 6, 2007
    Assignees: Osaka Prefecture, Tanaka Limited, SDC Incorporated
    Inventors: Eiichi Ishii, Takumi Sone, Yukihiro Sato, Kei Demizu, Hideo Kakutani, Koichi Tanaka, Shinichi Tanaka, Noriyoshi Tsuji
  • Publication number: 20070228534
    Abstract: The electrical characteristics of a semiconductor device are enhanced. In the package of the semiconductor device, there are encapsulated first and second semiconductor chips with a power MOS-FET formed therein and a third semiconductor chip with a control circuit for controlling their operation formed therein. The bonding pads for source electrode of the first semiconductor chip on the high side are electrically connected to a die pad through a metal plate. The bonding pad for source electrode of the second semiconductor chip on the low side is electrically connected to lead wiring through a metal plate. The metal plate includes a first portion in contact with the bonding pad of the second semiconductor chip, a second portion extended from a short side of the first portion to the lead wiring, and a third portion extended from a long side of the first portion to the lead wiring.
    Type: Application
    Filed: January 24, 2007
    Publication date: October 4, 2007
    Inventors: Tomoaki Uno, Nobuyoshi Matsuura, Yukihiro Sato, Keiichi Okawa, Tetsuya Kawashima, Kisho Ashida
  • Publication number: 20070196950
    Abstract: Disclosed is a semiconductor device which makes it easy to design a wiring pattern for a wiring substrate on which the semiconductor device is to be mounted. In manufacturing plural semiconductor devices for providing different amounts of output current, arrangements and numbers of leads to which semiconductor chips for power transistors of the semiconductor devices are to be electrically connected are changed according to output current requirements for the semiconductor devices, whereas arrangements and numbers of leads to which semiconductor chips for control circuits of the semiconductor devices are to be electrically connected are fixed to be common to the semiconductor devices. In this way, the probability of malfunction of control circuits (PWM circuits) of the semiconductor devices can be reduced, so that a semiconductor device which makes it easy to design a wiring pattern for a wiring substrate on which the semiconductor device is to be mounted can be provided.
    Type: Application
    Filed: December 29, 2006
    Publication date: August 23, 2007
    Inventors: Nobuyuki SHIRAI, Ryotaro Kudo, Yukihiro Sato