Patents by Inventor Yun-sheng Chen

Yun-sheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6458617
    Abstract: A multi-chip semiconductor package structure. The structure includes two chips and two lead frames. The leads on one of the lead frames have inner leads at one end and joint sections at the other end. The joint sections are connected with another lead frame. Both lead frames use a common set of external leads. The two chips and two lead frames are joined together forming a lead-on-chip structure with the two chips facing each other back-to-back. The assembly except the external leads is enclosed by packaging material.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: October 1, 2002
    Assignee: Vanguard International Semiconductor Corp.
    Inventors: Kuang-Ho Liao, Feng Lin, Yun-sheng Chen
  • Publication number: 20020089048
    Abstract: A multi-chip semiconductor package structure. The structure includes two chips and two lead frames. The leads on one of the lead frames have inner leads at one end and joint sections at the other end. The joint sections are connected with another lead frame. Both lead frames use a common set of external leads. The two chips and two lead frames are joined together forming a lead-on-chip structure with the two chips facing each other back-to-back. The assembly except the external leads is enclosed by packaging material.
    Type: Application
    Filed: March 15, 2002
    Publication date: July 11, 2002
    Inventors: Kuang-Ho Liao, Feng Lin, Yun-Sheng Chen
  • Publication number: 20020074638
    Abstract: A multi-chip semiconductor package structure. The structure includes two chips and two lead frames. The leads on one of the lead frames have inner leads at one end and joint sections at the other end. The joint sections are connected with another lead frame. Both lead frames use a common set of external leads. The two chips and two lead frames are joined together forming a lead-on-chip structure with the two chips facing each other back-to-back. The assembly except the external leads is enclosed by packaging material.
    Type: Application
    Filed: February 20, 2001
    Publication date: June 20, 2002
    Inventors: Kuang-Ho Liao, Feng Lin, Yun-sheng Chen
  • Patent number: 5796244
    Abstract: A voltage reference circuit that will remain constant and independent of changes in the operating temperature that is correlated to the bandgap voltage of silicon is described. The voltage reference circuit will be incorporated within an integrated circuit and will minimize currents into the substrate. The bandgap voltage reference circuit has a bandgap voltage referenced generator that will generate a first referencing voltage having a first temperature coefficient, and a compensating voltage generator that will generate a second referencing voltage having a second temperature coefficient. The second temperature coefficient is approximately equal and of opposite sign to the first temperature coefficient. A voltage summing circuit will sum the first referencing voltage and the second referencing voltage to create the temperature independent voltage.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: August 18, 1998
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yun Sheng Chen, Ming-Zen Lin