Patents by Inventor Yuta Endo

Yuta Endo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11152366
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: October 19, 2021
    Inventors: Shunpei Yamazaki, Hajime Kimura, Takayuki Ikeda, Kiyoshi Kato, Yuta Endo, Junpei Sugao
  • Patent number: 11139322
    Abstract: A semiconductor device with high aperture ratio is provided. The semiconductor device includes a transistor and a capacitor having a pair of electrodes. An oxide semiconductor layer formed over the same insulating surface is used for a channel formation region of the transistor and one of the electrodes of the capacitor. The other electrode of the capacitor is a transparent conductive film. One electrode of the capacitor is electrically connected to a wiring formed over the insulating surface over which a source electrode or a drain electrode of the transistor is provided, and the other electrode of the capacitor is electrically connected to one of the source electrode and the drain electrode of the transistor.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: October 5, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yuta Endo
  • Patent number: 11114449
    Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed. [Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j?2, the jth sub memory cell is arranged over the j?1th sub memory cell.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: September 7, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomoaki Atsumi, Shuhei Nagatsuka, Tamae Moriwaka, Yuta Endo
  • Publication number: 20210242220
    Abstract: A highly integrated semiconductor device is provided. The semiconductor device includes a substrate, a prism-like insulator, a memory cell string including a plurality of transistors connected in series. The prism-like insulator is provided over the substrate. The memory cell string is provided on the side surface of the prism-like insulator. The plurality of transistors each include a gate insulator and a gate electrode. The gate insulator includes a first insulator, a second insulator, and a charge accumulation layer. The charge accumulation layer is positioned between the first insulator and the second insulator.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Inventors: Shunpei YAMAZAKI, Tomoaki ATSUMI, Yuta ENDO
  • Publication number: 20210234046
    Abstract: A semiconductor device with high on-state current and high reliability is provided.
    Type: Application
    Filed: April 16, 2019
    Publication date: July 29, 2021
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya KAKEHATA, Yuta ENDO
  • Publication number: 20210234455
    Abstract: A switching control circuit for controlling a power supply circuit that includes an inductor to which an input voltage is applied and through which an inductor current flows, and a transistor configured to control the inductor current. The switching control circuit includes first and second error voltage output circuits that output first and second error voltages, based respectively on a feedback voltage corresponding to the output voltage and a reference voltage, and on an error signal corresponding to a difference between the level of the output voltage and a second level, when the power supply circuit is of a non-isolated type and an isolated type, respectively. The switching control circuit further includes a drive circuit that switches the transistor based on the inductor current, and on the first and second error voltage when the power supply circuit is of the non-isolated type and an isolated type, respectively.
    Type: Application
    Filed: March 24, 2021
    Publication date: July 29, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Yuta Endo, Hironobu Shiroyama, Nobuyuki Hiasa, Hiroki Yamane
  • Publication number: 20210175235
    Abstract: A semiconductor device including a first oxide including a first region and a second region adjacent to each other and a third region and a fourth region with the first region and the second region sandwiched between the third region and the fourth region, a second oxide over the first region, a first insulator over the second oxide, a first conductor over the first insulator, a second insulator over the second oxide and on side surfaces of the first insulator and the first conductor, a third insulator over the second region and on a side surface of the second insulator, a second conductor over the second region with the third insulator positioned between the second region and the second conductor and on the side surface of the second insulator with the third insulator positioned between the side surface of the second insulator and the second conductor, and a fourth insulator covering the first oxide, the second oxide, the first insulator, the first conductor, the second insulator, the third insulator, and th
    Type: Application
    Filed: February 10, 2021
    Publication date: June 10, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yuta ENDO, Shuhei NAGATSUKA
  • Publication number: 20210126114
    Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.
    Type: Application
    Filed: October 19, 2020
    Publication date: April 29, 2021
    Inventors: Yuta ENDO, Toshinari SASAKI, Kosei NODA
  • Publication number: 20210119052
    Abstract: A semiconductor material is an oxide including a metal element and nitrogen, in which the metal element is indium (In), an element M (M is aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn)), and zinc (Zn) and nitrogen is taken into an oxygen vacancy or bonded to an atom of the metal element.
    Type: Application
    Filed: November 15, 2018
    Publication date: April 22, 2021
    Inventors: Shunpei YAMAZAKI, Shota SAMBONSUGE, Yasumasa YAMANE, Yuta ENDO, Naoki OKUNO
  • Patent number: 10965209
    Abstract: When an input voltage changes due to switching of an AC power supply, as a result of a change in a timing at which an inductor current becomes zero and an element voltage of a switching element becomes local minimum, a switching loss increases. Provided is a power supply controller that includes a switch control unit that controls an on/off of a switching element of a boost chopper; a detection unit that detects that a first value based on an inductor voltage of an inductor of the boost chopper is less than a threshold: and a delay adjustment unit that adjusts a delay time from when the detection unit detects that the first value is less than the threshold until when the switch control unit turns on the switching element according to a second value based on the inductor voltage.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: March 30, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Yuta Endo
  • Publication number: 20210067032
    Abstract: A power supply circuit that generates an output voltage from an AC voltage. The power supply circuit includes a rectifier circuit that rectifies the AC voltage, an inductor receives a rectified voltage from the rectifier circuit, a transistor that controls an inductor current flowing through the inductor, and an integrated circuit that performs switching of the transistor. The integrated circuit includes an error output circuit that outputs an error between a feedback voltage and a reference voltage, a target value generating circuit that generates a target value of the inductor current based on the error, an adjustment circuit that adjusts the target value, first and second comparison circuits that compare the inductor current with a predetermined value and with the target value, respectively, and a drive circuit that turns on the transistor when the inductor current reaches the predetermined value, and turns off the transistor when the inductor current reaches the target value.
    Type: Application
    Filed: December 13, 2019
    Publication date: March 4, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Nobuyuki HIASA, Yuta ENDO, Yukihiro YAGUCHI
  • Patent number: 10938315
    Abstract: A control circuit for an AC/DC converter includes an AC detection circuit that periodically determines from a change in the AC input voltage whether AC voltage is being input and, upon determining that AC voltage is being input, outputs an AC detection signal that takes a HIGH level only for a prescribed duration; and an enable signal conversion circuit that filters the AC detection signal to generate the enable signal that is in a HIGH state when the AC detection signal is in the HIGH level and that becomes the LOW state after a prescribed time has passed since the AC detection signal becomes a LOW level unless the AC detection signal rises to the HIGH level again, thereby producing the enable signal that is more responsive.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: March 2, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yuta Endo, Kazuhiro Kawamura
  • Patent number: 10923477
    Abstract: A semiconductor device including a first oxide including a first region and a second region adjacent to each other and a third region and a fourth region with the first region and the second region sandwiched between the third region and the fourth region, a second oxide over the first region, a first insulator over the second oxide, a first conductor over the first insulator, a second insulator over the second oxide and on side surfaces of the first insulator and the first conductor, a third insulator over the second region and on a side surface of the second insulator, a second conductor over the second region with the third insulator positioned between the second region and the second conductor and on the side surface of the second insulator with the third insulator positioned between the side surface of the second insulator and the second conductor, and a fourth insulator covering the first oxide, the second oxide, the first insulator, the first conductor, the second insulator, the third insulator, and th
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: February 16, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yuta Endo, Shuhei Nagatsuka
  • Publication number: 20210013797
    Abstract: An integrated circuit for a power supply circuit that generates an output voltage at a target level from an AC voltage input thereto. The power supply circuit includes an inductor, and a transistor that controls a current flowing through the inductor. The integrated circuit drives the transistor based on the inductor current and the output voltage. The integrated circuit has a signal output circuit including a first comparator circuit comparing the inductor current and a predetermined current value, a timer circuit measuring a time elapsed since the value of the inductor current becomes smaller than the predetermined current value, and a second comparator circuit comparing the output voltage and a lower-than-target level. The signal output circuit indicates that the AC voltage is not input to a rectifier circuit, when the elapsed time reaches a predetermined time period and a level of the output voltage is lower than the lower-than-target level.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 14, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Yuta ENDO
  • Publication number: 20200402910
    Abstract: A semiconductor device that is miniaturized and highly integrated is provided. One embodiment of the present invention is a semiconductor device including a first insulator, a second insulator, a first conductor, a second conductor, and a semiconductor layer; the first insulator includes an opening exposing the semiconductor layer; the first conductor is provided in contact with the semiconductor layer at a bottom of the opening; the second insulator is provided in contact with a top surface of the first conductor and a side surface in the opening; the second conductor is provided in contact with the top surface of the first conductor and in the opening with the second insulator therebetween; and the second insulator has a barrier property against oxygen.
    Type: Application
    Filed: March 28, 2019
    Publication date: December 24, 2020
    Inventors: Tetsuya KAKEHATA, Yuta ENDO
  • Publication number: 20200343251
    Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed. [Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j?2, the jth sub memory cell is arranged over the j?1th sub memory cell.
    Type: Application
    Filed: March 6, 2020
    Publication date: October 29, 2020
    Inventors: Tomoaki ATSUMI, Shuhei NAGATSUKA, Tamae MORIWAKA, Yuta ENDO
  • Patent number: 10811522
    Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: October 20, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuta Endo, Toshinari Sasaki, Kosei Noda
  • Patent number: 10777687
    Abstract: A high-performance and highly reliable semiconductor device is provided. The semiconductor device includes: a first oxide; a source electrode; a drain electrode; a second oxide over the first oxide, the source electrode, and the drain electrode; a gate insulating film over the second oxide; and a gate electrode over the gate insulating film. The source electrode is electrically connected to the first oxide. The drain electrode is electrically connected to the first oxide. Each of the first oxide and the second oxide includes In, an element M (M is Al, Ga, Y, or Sn), and Zn. Each of the first oxide and the second oxide includes more In atoms than element M atoms. An atomic ratio of the In, the Zn, and the element M in the first oxide is equal to or similar to an atomic ratio of the In, the Zn, and the element M in the second oxide.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: September 15, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuta Endo, Hiromi Sawai, Hajime Kimura
  • Publication number: 20200279851
    Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a first transistor, a second transistor, and an electrode. The first transistor and the second transistor include an oxide, a gate insulator over the oxide, and a gate. The electrode is connected to one of a source and a drain of the first transistor and one of a source and a drain of the second transistor. The channel length of the first transistor is longer than the short side of the first conductor. The channel length of the second transistor is longer than the short side of the second conductor.
    Type: Application
    Filed: September 5, 2018
    Publication date: September 3, 2020
    Inventors: Yuta ENDO, Hideomi SUZAWA
  • Publication number: 20200266281
    Abstract: A highly reliable semiconductor device is provided. The semiconductor device includes a first insulator; a first oxide provided over the first insulator; a second oxide provided over the first oxide; a first conductor and a second conductor provided apart from each other over the second oxide; a third oxide provided over the second oxide, the first conductor, and the second conductor; a second insulating film provided over the third oxide; and a third conductor provided over the second oxide with the third oxide and the second insulating film positioned therebetween. The third oxide contains a metal element and nitrogen, and the metal element is bonded to nitrogen.
    Type: Application
    Filed: October 29, 2018
    Publication date: August 20, 2020
    Inventors: Shunpei YAMAZAKI, Tomoki HIRAMATSU, Yusuke NONAKA, Noritaka ISHIHARA, Shota SAMBONSUGE, Yasumasa YAMANE, Yuta ENDO