Patents by Inventor Yuuzo Kamiguchi

Yuuzo Kamiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11762049
    Abstract: According to one embodiment, a medical data processing apparatus includes processing circuitry. The processing circuitry acquires first data pieces obtained by sparse sampling. The processing circuitry generates first compressed data pieces lower in number than the first data pieces by multiplying the first data pieces by each of sets of weight coefficients and adding each of the multiplied first data pieces. The processing circuitry performs first processing of outputting second compressed data pieces by applying a trained model to the first compressed data pieces, the trained model being trained by receiving first compressed data pieces based on sparse sampling and outputting at least one of second compressed data pieces based on full sampling.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: September 19, 2023
    Assignee: Canon Medical Systems Corporation
    Inventor: Yuuzo Kamiguchi
  • Publication number: 20230160982
    Abstract: According to one embodiment, a medical data processing apparatus includes processing circuitry. The processing circuitry acquires imaging data acquired by executing spoiled gradient echo imaging and coherent gradient echo imaging by using multiple flip angles. The processing circuitry generates a low-rank approximate image set, which is a set of low-rank approximated images from the imaging data. The processing circuitry reconstructs one or more parameter maps using the above low-rank approximate image set and a related to water exchange in a biological tissue, the multi-pool model including plural free waters and bound water that performs magnetization exchange with those free waters.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 25, 2023
    Applicant: Canon Medical Systems Corporation
    Inventor: Yuuzo KAMIGUCHI
  • Patent number: 11017827
    Abstract: A magnetic device includes: a first conductive layer; a first magnetoresistive effect element disposed on the first conductive layer and including a first control terminal; and a first circuit configured to supply a first current in a first direction into the first conductive layer and apply a first control voltage to the first control terminal of the first magnetoresistive effect element, wherein in a case in which the first current is supplied to the first conductive layer, the first magnetoresistive effect element holds a value corresponding to a logical disjunction between a first value of first data in the first magnetoresistive effect element and a second value of the first control voltage corresponding to second data.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: May 25, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoaki Inokuchi, Naoharu Shimomura, Katsuhiko Koui, Yuuzo Kamiguchi, Kazutaka Ikegami, Shinobu Fujita, Hiroaki Yoda
  • Publication number: 20210003651
    Abstract: According to one embodiment, a medical data processing apparatus includes processing circuitry. The processing circuitry acquires first data pieces obtained by sparse sampling. The processing circuitry generates first compressed data pieces lower in number than the first data pieces by multiplying the first data pieces by each of sets of weight coefficients and adding each of the multiplied first data pieces. The processing circuitry performs first processing of outputting second compressed data pieces by applying a trained model to the first compressed data pieces, the trained model being trained by receiving first compressed data pieces based on sparse sampling and outputting at least one of second compressed data pieces based on full sampling.
    Type: Application
    Filed: June 25, 2020
    Publication date: January 7, 2021
    Applicant: Canon Medical Systems Corporation
    Inventor: Yuuzo KAMIGUCHI
  • Publication number: 20190295619
    Abstract: According to one embodiment, a magnetic device includes: a first conductive layer; a first magnetoresistive effect element disposed on the first S conductive layer and including a first control terminal; and a first circuit configured to supply a first current in a first direction into the first conductive layer and apply a first control voltage to the first control terminal of the first magnetoresistive effect element, wherein in a case in which the first current is supplied to the first conductive layer, the first magnetoresistive effect element holds a value corresponding to a logical disjunction between a first value of first data in the first magnetoresistive effect element and a second value of the first control voltage corresponding to second data.
    Type: Application
    Filed: September 17, 2018
    Publication date: September 26, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomoaki INOKUCHI, Naoharu SHIMOMURA, Katsuhiko KOUI, Yuuzo KAMIGUCHI, Kazutaka IKEGAMI, Shinobu FUJITA, Hiroaki YODA
  • Patent number: 10410707
    Abstract: According to one embodiment, a nonvolatile memory includes a conductive line including a first portion, a second portion and a third portion therebetween, a storage element including a first magnetic layer, a second magnetic layer and a nonmagnetic layer therebetween, and the first magnetic layer being connected to the third portion, and a circuit flowing a write current between the first and second portions, applying a first potential to the second magnetic layer, and blocking the write current flowing between the first and second portions after changing the second magnetic layer from the first potential to a second potential.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: September 10, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoaki Inokuchi, Naoharu Shimomura, Katsuhiko Koui, Yuuzo Kamiguchi, Satoshi Shirotori, Kazutaka Ikegami, Hiroaki Yoda
  • Patent number: 10361358
    Abstract: A magnetic memory includes: first to fourth wirings; first and second terminals; a first conductive layer including first to third regions, the second region being between the first region and the third region, the first region being electrically connected to the first terminal, and the third region being electrically connected to the second terminal; a first magnetoresistive element including a first and a second magnetic layer, and a first nonmagnetic layer disposed between the first and the magnetic layer; a first transistor including a third terminal electrically connected to the first magnetic layer, a fourth terminal electrically connected to the third wiring, and a first control terminal electrically connected to the first wiring; and a second transistor including a fifth terminal electrically connected to the first terminal, a sixth terminal electrically connected to the second wiring, and a second control terminal electrically connected to the first wiring.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: July 23, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiko Abe, Kazutaka Ikegami, Shinobu Fujita, Katsuhiko Koui, Tomoaki Inokuchi, Satoshi Shirotori, Yuichi Ohsawa, Hideyuki Sugiyama, Hiroaki Yoda, Naoharu Shimomura, Yuuzo Kamiguchi
  • Patent number: 10305027
    Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer. The first nonmagnetic layer includes an oxide including an inverse-spinel structure.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: May 28, 2019
    Assignees: Kabushiki Kaisha Toshiba, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Yushi Kato, Tadaomi Daibou, Yuuzo Kamiguchi, Naoharu Shimomura, Junichi Ito, Hiroaki Sukegawa, Mohamed Belmoubarik, Po-Han Cheng, Seiji Mitani, Tadakatsu Ohkubo, Kazuhiro Hono
  • Patent number: 10211394
    Abstract: A magnetic memory according to an embodiment includes: a first and second terminals; a conductive layer, which is nonmagnetic, the conductive layer including a first to third regions, the second region being disposed between the first region and the third region, the first region being electrically connected to the first terminal, and the third region being electrically connected to the second terminal; a magnetoresistive element disposed to correspond to the second region of the conductive layer, the magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer and electrically connected to the second region, a nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, and a third terminal electrically connected to the first magnetic layer; and a third magnetic layer, the conductive layer being disposed between the third and second magnetic layers.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: February 19, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoaki Inokuchi, Katsuhiko Koui, Naoharu Shimomura, Yuuzo Kamiguchi, Satoshi Shirotori, Yuichi Ohsawa, Hiroaki Yoda
  • Patent number: 10109334
    Abstract: A magnetic memory according to an embodiment includes: a conductive layer including a first and second terminals; a plurality of magnetoresistive elements separately disposed on the conductive layer between the first and second terminals, each magnetoresistive element including a reference layer, a storage layer between the reference layer and the conductive layer, and a nonmagnetic layer between the storage layer and the reference layer; and a circuit configured to apply a first potential to the reference layers of the magnetoresistive elements and to flow a first write current between the first and second terminals, and configured to apply a second potential to the reference layer or the reference layers of one or more of the magnetoresistive elements to which data is to be written, and to flow a second write current between the first and second terminals in an opposite direction to the first write current.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: October 23, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroaki Yoda, Naoharu Shimomura, Yuichi Ohsawa, Tadaomi Daibou, Tomoaki Inokuchi, Satoshi Shirotori, Altansargai Buyandalai, Yuuzo Kamiguchi
  • Publication number: 20180301179
    Abstract: According to one embodiment, a nonvolatile memory includes a conductive line including a first portion, a second portion and a third portion therebetween, a storage element including a first magnetic layer, a second magnetic layer and a nonmagnetic layer therebetween, and the first magnetic layer being connected to the third portion, and a circuit flowing a write current between the first and second portions, applying a first potential to the second magnetic layer, and blocking the write current flowing between the first and second portions after changing the second magnetic layer from the first potential to a second potential.
    Type: Application
    Filed: June 18, 2018
    Publication date: October 18, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoaki INOKUCHI, Naoharu SHIMOMURA, Katsuhiko KOUI, Yuuzo KAMIGUCHI, Satoshi SHIROTORI, Kazutaka IKEGAMI, Hiroaki YODA
  • Patent number: 10103199
    Abstract: A magnetic memory according to an embodiment includes: a conductive nonmagnetic layer including a first terminal, a second terminal, and a region between the first terminal and the second terminal; a magnetoresistive element including: a first magnetic layer; a second magnetic layer disposed between the region and the first magnetic layer; and a nonmagnetic intermediate layer disposed between the first magnetic layer and the second magnetic layer; a transistor including a third terminal, a fourth terminal, and a control terminal, the third terminal being electrically connected to the first terminal; a first wiring electrically connected to the first magnetic layer and the fourth terminal; a second wiring electrically connected to the control terminal; and a third wiring electrically connected to the second terminal.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: October 16, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tadaomi Daibou, Naoharu Shimomura, Yuuzo Kamiguchi, Hiroaki Yoda, Yuichi Ohsawa, Tomoaki Inokuchi, Satoshi Shirotori
  • Patent number: 10102894
    Abstract: A magnetic memory includes: a first and second terminals; a conductive layer including first to fourth regions, the first and fourth regions being electrically connected to the first and second terminals respectively; a first magnetoresistive element including: a first and second magnetic layers; a first nonmagnetic layer between the first and second magnetic layers; and a third terminal electrically connected to the first magnetic layer; a second magnetoresistive element including: a third and fourth magnetic layers; a second nonmagnetic layer between the third and fourth magnetic layers; and a fourth terminal electrically connected to the third magnetic layer; and a circuit configured to apply a write current between the first terminal and the second terminal and apply a first and second potentials to the third and fourth terminals respectively to write the first and second magnetoresistive elements, the first and second potentials being different from each other.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: October 16, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoharu Shimomura, Tomoaki Inokuchi, Hiroki Noguchi, Katsuhiko Koui, Yuuzo Kamiguchi, Kazutaka Ikegami, Hiroaki Yoda
  • Publication number: 20180277746
    Abstract: A magnetic memory includes: first to fourth wirings; first and second terminals; a first conductive layer including first to third regions, the second region being between the first region and the third region, the first region being electrically connected to the first terminal, and the third region being electrically connected to the second terminal; a first magnetoresistive element including a first and a second magnetic layer, and a first nonmagnetic layer disposed between the first and the magnetic layer; a first transistor including a third terminal electrically connected to the first magnetic layer, a fourth terminal electrically connected to the third wiring, and a first control terminal electrically connected to the first wiring; and a second transistor including a fifth terminal electrically connected to the first terminal, a sixth terminal electrically connected to the second wiring, and a second control terminal electrically connected to the first wiring.
    Type: Application
    Filed: September 14, 2017
    Publication date: September 27, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiko ABE, Kazutaka IKEGAMI, Shinobu FUJITA, Katsuhiko KOUI, Tomoaki INOKUCHI, Satoshi SHIROTORI, Yuichi OHSAWA, Hideyuki SUGIYAMA, Hiroaki YODA, Naoharu SHIMOMURA, Yuuzo KAMIGUCHI
  • Patent number: 10068946
    Abstract: A magnetic memory of an embodiment includes: a first nonmagnetic layer including a first and second faces; a first and second wirings disposed on a side of the first face; a third wiring disposed on a side of the second face; a first transistor, one of the source and the drain being connected to the first wiring, the other one being connected to the first nonmagnetic layer; a second transistor, one of source and drain being connected to the second wiring, the other one being connected to the first nonmagnetic layer; a magnetoresistive element disposed between the first nonmagnetic layer and the third wiring, a first terminal of the magnetoresistive element being connected to the first nonmagnetic layer; and a third transistor, one of source and drain of the third transistor being connected to the second terminal, the other one being connected to the third wiring.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: September 4, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoharu Shimomura, Hiroaki Yoda, Tadaomi Daibou, Yuuzo Kamiguchi, Yuichi Ohsawa, Tomoaki Inokuchi, Satoshi Shirotori
  • Patent number: 10026465
    Abstract: According to one embodiment, a nonvolatile memory includes a conductive line including a first portion, a second portion and a third portion therebetween, a storage element including a first magnetic layer, a second magnetic layer and a nonmagnetic layer therebetween, and the first magnetic layer being connected to the third portion, and a circuit flowing a write current between the first and second portions, applying a first potential to the second magnetic layer, and blocking the write current flowing between the first and second portions after changing the second magnetic layer from the first potential to a second potential.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: July 17, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoaki Inokuchi, Naoharu Shimomura, Katsuhiko Koui, Yuuzo Kamiguchi, Satoshi Shirotori, Kazutaka Ikegami, Hiroaki Yoda
  • Publication number: 20180158499
    Abstract: A magnetic memory includes: a first and second terminals; a conductive layer including first to fourth regions, the first and fourth regions being electrically connected to the first and second terminals respectively; a first magnetoresistive element including: a first and second magnetic layers; a first nonmagnetic layer between the first and second magnetic layers; and a third terminal electrically connected to the first magnetic layer; a second magnetoresistive element including: a third and fourth magnetic layers; a second nonmagnetic layer between the third and fourth magnetic layers; and a fourth terminal electrically connected to the third magnetic layer; and a circuit configured to apply a write current between the first terminal and the second terminal and apply a first and second potentials to the third and fourth terminals respectively to write the first and second magnetoresistive elements, the first and second potentials being different from each other.
    Type: Application
    Filed: September 7, 2017
    Publication date: June 7, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoharu SHIMOMURA, Tomoaki INOKUCHI, Hiroki NOGUCHI, Katsuhiko KOUI, Yuuzo KAMIGUCHI, Kazutaka IKEGAMI, Hiroaki YODA
  • Patent number: 9985201
    Abstract: A magnetic memory of an embodiment includes: a first to third terminals; a magnetoresistive element including a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer; a second nonmagnetic layer including a first to third portions, the first portion being located between the second and the third portions, the second and third portions being electrically connected to the second and third terminals respectively, the first magnetic layer being disposed between the first portion and the first nonmagnetic layer; and a third nonmagnetic layer including a fourth to sixth portions, the fourth portion being located between the first portion and the first magnetic layer, the fifth portion including a first region extending from the magnetoresistive element to the second terminal, the sixth portion including a second region extending from the magnetoresistive element to the third terminal.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: May 29, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Shirotori, Hiroaki Yoda, Yuichi Ohsawa, Yuuzo Kamiguchi, Naoharu Shimomura, Tadaomi Daibou, Tomoaki Inokuchi
  • Publication number: 20180114558
    Abstract: A magnetic memory according to an embodiment includes: a conductive layer including a first and second terminals; a plurality of magnetoresistive elements separately disposed on the conductive layer between the first and second terminals, each magnetoresistive element including a reference layer, a storage layer between the reference layer and the conductive layer, and a nonmagnetic layer between the storage layer and the reference layer; and a circuit configured to apply a first potential to the reference layers of the magnetoresistive elements and to flow a first write current between the first and second terminals, and configured to apply a second potential to the reference layer or the reference layers of one or more of the magnetoresistive elements to which data is to be written, and to flow a second write current between the first and second terminals in an opposite direction to the first write current.
    Type: Application
    Filed: December 20, 2017
    Publication date: April 26, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroaki Yoda, Naoharu Shimomura, Yuichi Ohsawa, Tadaomi Daibou, Tomoaki Inokuchi, Satoshi Shirotori, Altansargai Buyandalai, Yuuzo Kamiguchi
  • Publication number: 20180090671
    Abstract: According to one embodiment, a magnetoresistive element includes a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer. The first nonmagnetic layer includes an oxide including an inverse-spinel structure.
    Type: Application
    Filed: September 8, 2017
    Publication date: March 29, 2018
    Applicants: Kabushiki Kaisha Toshiba, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Yushi KATO, Tadaomi DAIBOU, Yuuzo KAMIGUCHI, Naoharu SHIMOMURA, Junichi ITO, Hiroaki SUKEGAWA, Mohamed BELMOUBARIK, Po-Han CHENG, Seiji MITANI, Tadakatsu OHKUBO, Kazuhiro HONO