Silicon precursor, method of forming a layer using the same, and method of fabricating semiconductor device using the same
The inventive concepts provide silicon precursors, methods of forming a layer using the same, and methods of fabricating a semiconductor device using the same. The silicon precursor includes a silane group including two or more silicon atoms. The silicon precursor has a high and uniform adsorption property on surfaces of layers (e.g., a silicon layer, an oxide layer, and a nitride layer) that are mainly used when semiconductor devices are fabricated.
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This application is a divisional of and claims priority from U.S. patent application Ser. No. 14/602,671, filed Jan. 22, 2015, which claims priority under 35 U.S.C. § 119 of Korean Patent Application No. 10-2014-0045575, filed on Apr. 16, 2014, the disclosure of each of which is hereby incorporated herein by reference in its entirety.
BACKGROUNDThe inventive concepts relate to silicon precursors, methods of forming a layer using the same, and methods of fabricating a semiconductor device using the same.
As semiconductor devices have been highly integrated, widths and spaces of semiconductor patterns have been reduced. Recently, three-dimensional (3D) semiconductor devices including vertically stacked patterns have been developed to improve an integration degree of semiconductor devices, so aspect ratios of recessed regions (e.g., contact holes or trenches) have been increased in the 3D semiconductor devices. Thus, it may be difficult to uniformly and conformally form a layer in the recessed regions having the high aspect ratio.
SUMMARYEmbodiments of the inventive concepts may provide silicon precursors capable of providing an excellent seed property.
Embodiments of the inventive concepts may also provide methods of forming a layer having an improved step coverage property.
Embodiments of the inventive concepts may also provide methods of fabricating a semiconductor device capable of improving reliability.
In one aspect, a silicon precursor includes a chemical formula of R1—SixHy. In the chemical formula of R1—SixHy, “x” is an integral number equal to or greater than 2, “y” satisfies an equation y=2x+1, and “R1” includes at least one of an amino group, an alkyl group, a cyclopentadienyl (C5H5) group, or a halogen.
In some embodiments, the “R1” may be the amino group and has the following chemical formula 1.
where each of “R2” and “R3” includes at least one of a methyl group, an ethyl group, a propyl group, an isopropyl group, or a butyl group.
In some embodiments, “SixHy” may have a linear structure or a branched structure.
In another aspect, a method of forming a layer may include: providing the silicon precursor of chemical formula of R1—SixHy on a substrate to form a single-layered silicon atomic layer. In the chemical formula of R1—SixHy, “x” is an integral number equal to or greater than 2, “y” satisfies an equation y=2x+1, and “R1” includes at least one of an amino group, an alkyl group, a cyclopentadienyl (C5H5) group, or a halogen.
In some embodiments, the method may further include: forming a silicon nitride layer, a silicon oxide layer, or a silicon-germanium layer on the silicon atomic layer.
In some embodiments, the method may further include: forming a poly-silicon layer on the silicon atomic layer by providing at least one of monosilane (SiH4), disilane (Si2H6), or a high-grade silane (SinH2n+2, where “n” is an integral number equal to or greater than 3).
In some embodiments, foaming the poly-silicon layer may further include: doping the poly-silicon layer by providing at least one of Group III elements, Group V elements, or carbon.
In some embodiments, the method may further include: forming a non-silicon atomic layer on the silicon atomic layer. Forming the silicon atomic layer and forming the non-silicon atomic layer may be alternately and repeatedly performed, and the non-silicon atomic layer may be formed by providing a gas including oxygen, nitrogen, or germanium.
In some embodiments, the “R1” may be the amino group and has the following chemical formula 1.
where each of “R2” and “R3” independently includes at least one of a methyl group, an ethyl group, a propyl group, an isopropyl group, a butyl group, or a tert-butyl group.
In some embodiments, the silicon precursor may be diisopropylaminodisilane (((CH3)2CH)2N—SiH2SiH3).
In some embodiments, the substrate may include an oxide layer formed thereon, and the silicon precursor may be provided on the oxide layer.
In still another aspect, a method of fabricating a semiconductor device may include: providing the silicon precursor of chemical formula of R1—SixHy on a substrate to form a single-layered silicon atomic layer. In the chemical formula of R1—SixHy, “x” is an integral number equal to or greater than 2, “y” satisfies an equation y=2x+1, and “R1” includes at least one of an amino group, an alkyl group, a cyclopentadienyl (C5H5) group, or a halogen.
In some embodiments, the method may further include: forming a lower structure including a recessed region on the substrate before the formation of the silicon atomic layer. The silicon atomic layer may be formed to conformally cover the lower structure.
In some embodiments, the recessed region may be a contact hole. In this case, forming the lower structure may include: forming an interlayer insulating layer covering the substrate; and patterning the interlayer insulating layer to form the contact hole.
In some embodiments, the method may further include: forming a poly-silicon layer filling the contact hole on the silicon atomic layer by providing at least one of monosilane (SiH4), disilane (Si2H6), or a high-grade silane (SinH2n+2, where “n” is an integral number equal to or greater than 3) after the formation of the silicon atomic layer.
In some embodiments, the method may further include: forming a contact plug including a portion of the poly-silicon layer in the contact hole; and forming a data storage element electrically connected to the contact plug. For example, the data storage element may be a capacitor.
In some embodiments, the recessed region may be an active hole. In this case, forming the lower structure may include: alternately and repeatedly stacking sacrificial layers and inter-gate insulating layers on the substrate; and successively patterning the inter-gate insulating layers and the sacrificial layers to form the active hole exposing the substrate.
In some embodiments, the method may further include: forming an active pillar covering a sidewall of the active hole after the formation of the silicon atomic layer, the active pillar having a cup-shape; and replacing the sacrificial layers with a conductive layer.
In some embodiments, forming the active pillar may include: conformally forming a poly-silicon layer on the silicon atomic layer by providing at least one of monosilane (SiH4), disilane (Si2H6), or a high-grade silane (SinH2n+2, where “n” is an integral number equal to or greater than 3). The poly-silicon layer may cover the sidewall of the active hole.
In some embodiments, the “R1” may be the amino group and has the following chemical formula 1.
where each of “R2” and “R3” independently includes at least one of a methyl group, an ethyl group, a propyl group, an isopropyl group, a butyl group, or a tert-butyl group.
In some embodiments, the silicon precursor may be diisopropylaminodisilane (((CH3)2CH)2N—SiH2SiH3).
In some embodiments, the substrate may include an oxide layer formed thereon, and the silicon precursor may be provided on the oxide layer
The inventive concepts will become more apparent in view of the attached drawings and accompanying detailed description.
The inventive concepts will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the inventive concepts are shown. The advantages and features of the inventive concepts and methods of achieving them will be apparent from the following exemplary embodiments that will be described in more detail with reference to the accompanying drawings. It should be noted, however, that the inventive concepts are not limited to the following exemplary embodiments, and may be implemented in various forms. Accordingly, the exemplary embodiments are provided only to disclose the inventive concepts and let those skilled in the art know the category of the inventive concepts. In the drawings, embodiments of the inventive concepts are not limited to the specific examples provided herein and are exaggerated for clarity.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular terms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it may be directly connected or coupled to the other element or intervening elements may be present.
Similarly, it will be understood that when an element such as a layer, region or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present. In contrast, the term “directly” means that there are no intervening elements. It will be further understood that the terms “comprises”, “comprising,”, “includes” and/or “including”, when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Additionally, the embodiment in the detailed description will be described with sectional views as ideal exemplary views of the inventive concepts. Accordingly, shapes of the exemplary views may be modified according to manufacturing techniques and/or allowable errors. Therefore, the embodiments of the inventive concepts are not limited to the specific shape illustrated in the exemplary views, but may include other shapes that may be created according to manufacturing processes. Areas exemplified in the drawings have general properties, and are used to illustrate specific shapes of elements. Thus, this should not be construed as limited to the scope of the inventive concepts.
It will be also understood that although the terms first, second, third etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Thus, a first element in some embodiments could be termed a second element in other embodiments without departing from the teachings of the present invention. Exemplary embodiments of aspects of the present inventive concepts explained and illustrated herein include their complementary counterparts. The same reference numerals or the same reference designators denote the same elements throughout the specification.
Moreover, exemplary embodiments are described herein with reference to cross-sectional illustrations and/or plane illustrations that are idealized exemplary illustrations. Accordingly, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etching region illustrated as a rectangle will, typically, have rounded or curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
As appreciated by the present inventive entity, devices and methods of forming devices according to various embodiments described herein may be embodied in microelectronic devices such as integrated circuits, wherein a plurality of devices according to various embodiments described herein are integrated in the same microelectronic device. Accordingly, the cross-sectional view(s) illustrated herein may be replicated in two different directions, which need not be orthogonal, in the microelectronic device. Thus, a plan view of the microelectronic device that embodies devices according to various embodiments described herein may include a plurality of the devices in an array and/or in a two-dimensional pattern that is based on the functionality of the microelectronic device.
The devices according to various embodiments described herein may be interspersed among other devices depending on the functionality of the microelectronic device. Moreover, microelectronic devices according to various embodiments described herein may be replicated in a third direction that may be orthogonal to the two different directions, to provide three-dimensional integrated circuits.
Accordingly, the cross-sectional view(s) illustrated herein provide support for a plurality of devices according to various embodiments described herein that extend along two different directions in a plan view and/or in three different directions in a perspective view. For example, when a single active region is illustrated in a cross-sectional view of a device/structure, the device/structure may include a plurality of active regions and transistor structures (or memory cell structures, gate structures, etc., as appropriate to the case) thereon, as would be illustrated by a plan view of the device/structure.
A silicon precursor according to the inventive concepts has a chemical formula of R1—SixHy, where “x” is an integral number equal to or greater than 2, “y” satisfies an equation y=2x+1, and “R1” includes at least one of an amino group, an alkyl group, a cyclopentadienyl (C5H5) group, or a halogen.
In some embodiments, “R1” may be the amino group and may have a structure expressed by the following chemical formula 1.
where each of “R2” and “R3” includes at least one of a methyl group, an ethyl group, a propyl group, an isopropyl group, or a butyl group.
“SixHy” may have a linear structure or a branched structure.
Next, a method of forming a layer using the silicon precursor of the inventive concepts will be described.
Referring to
Alternatively, as illustrated in
In the present embodiment, the disilane having two silicon atoms is described as an example. However, the inventive concepts are not limited thereto. If the silicon precursor according to the inventive concepts includes a high-grade silane including three or more silicon atoms, three or more silicon adsorption sites may be formed from one silicon precursor by the same principle as described above.
Hydrogen atoms are bonded to the silicon atom in the silicon atomic layer 3. However, the hydrogen atoms bonded to the silicon atom may be removed during a subsequent process of forming a silicon-containing layer (e.g., a poly-silicon layer, a silicon nitride layer, a silicon oxide layer, or a silicon-germanium layer). In addition, elements constituting the silicon-containing layer may be bonded to the silicon atom from which the hydrogen atoms are removed.
A method of forming a layer using the silicon precursor of the inventive concepts will be described hereinafter.
Referring to
During the formation of the poly-silicon layer 7, at least one of Group III elements, Group V elements, or carbon may be supplied to dope the poly-silicon layer 7.
Alternatively, referring to
In still other embodiments, referring to
Two samples were prepared in the present experimental example. A single-layered silicon atomic layer (or a seed layer) was formed using the silicon precursor of the inventive concepts on a bare wafer, and a poly-silicon layer was then deposited to prepare a sample according to the inventive concepts. A single-layered silicon atomic layer was formed using a silicon precursor of a comparison example on a bare wafer, and a poly-silicon was then deposited to prepare a sample according to the comparison example. A surface roughness of each of the deposited poly-silicon layers of the samples was measured. The surface roughness was measured according to a thickness of each of the deposited poly-silicon layers. Dialkylaminodisilane was used as the silicon precursor of the inventive concepts. Diisopropylaminosilane ((C3H7)2N—SiH3) was used as the silicon precursor of the comparison example. Monosilane (SiH4) was supplied when the poly-silicon layer of each sample was deposited. The surface roughness was obtained by a root mean square method.
Three samples were prepared in the present experimental example. A poly-silicon layer was directly deposited on a bare wafer to prepare a sample according to a first comparison example. In other words, a seed layer was not formed in the sample of the first comparison example. A seed layer was formed using a silicon precursor of a comparison example on a bare wafer, and a poly-silicon layer was then deposited to prepare a sample according to a second comparison example. A seed layer was formed using the silicon precursor of the inventive concepts on a bare wafer, and a poly-silicon was then deposited to prepare a sample according to the inventive concepts. A thickness of each poly-silicon layer according to a position was measured. Dialkylaminodisilane was used as the silicon precursor of the inventive concepts. Diisopropylaminosilane ((C3H7)2N—SiH3) was used as the silicon precursor of the second comparison example. Monosilane (SiH4) was supplied when the poly-silicon layers of each sample was deposited.
Even though not illustrated in
The method of forming the layer according to the inventive concepts may be applied to semiconductor fabricating processes such as, for example, a fabricating process of a dynamic random access memory (DRAM) device, a fabricating process of a 3D NAND flash memory device, and a double patterning process. The silicon precursor of the inventive concepts also has an excellent adsorption property on a hydrocarbon layer, and thus, the method of forming the layer according to the inventive concepts may be applied to a semiconductor fabricating process including a chemical mechanical polishing (CMP) process using an etch selectivity between the hydrocarbon layer and a silicon layer.
Referring to
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Referring to
In the present embodiment, the device isolation layer 23, the insulating layers 25, 29, and 42, and the capping layers 27 and 33 may be formed of a silicon oxide layer and/or a silicon nitride layer, and the silicon precursor of the inventive concepts may be used as silicon sources for the formation of the layers 23, 25, 29, 42, 27 and 33. In the present embodiment, the storage node contact BC, the bit line node contact DC, the word line WL, and/or the bit line BL may be formed of a poly-silicon layer doped with dopants. In this case, a silicon seed layer may be formed using the silicon precursor of the inventive concept for the formation of the poly-silicon layers of the storage node contact BC, the bit line node contact DC, the word line WL, and/or the bit line BL. In particular, since the DRAM device according to the present embodiment includes a buried word line, the trench for the formation of the device isolation layer 23 and/or the groove for the formation of the word line WL may have a high aspect ratio. In addition, the storage node contact hole BH may have a high aspect ratio. Generally, it may be difficult to fill a recessed region having a high aspect ratio with a material layer without a void. However, this difficulty may be solved by the silicon precursor of the inventive concepts.
Referring to
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According to some embodiments of the inventive concepts, the silicon precursor includes a silane group including two or more silicon atoms. The silicon precursor has a high and uniform adsorption property on surfaces of layers (e.g., a silicon layer, an oxide layer, and a nitride layer) that are mainly used when semiconductor devices are fabricated. Thus, the layer having an excellent seed property may be provided. In addition, the silicon precursor of the inventive concepts increases the number of silicon-hydrogen bonds as compared with the monosilane. Thus, an incubation time may be improved, and a surface morphology property of the seed layer may be 1 Å or less. As a result, the silicon precursor according to the inventive concepts may overcome limitations of a process of forming a thin poly-silicon layer.
According to other embodiments of the inventive concepts, the layer may be formed using the silicon precursor, so the step coverage property of the layer may be improved.
According to still embodiments of the inventive concepts, the semiconductor device may be fabricated using the silicon precursor, and thus, it is possible to prevent a void from being formed in the contact hole or the active hole. As a result, reliability of the semiconductor device may be improved.
While the inventive concepts have been described with reference to example embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirits and scopes of the inventive concepts. Therefore, it should be understood that the above embodiments are not limiting, but illustrative. Thus, the scopes of the inventive concepts are to be determined by the broadest permissible interpretation of the following claims and their equivalents, and shall not be restricted or limited by the foregoing description.
Claims
1. A method of forming a layer, the method comprising:
- providing a first precursor having a chemical formula of R1—SixHy on a substrate to form a single-layered silicon atomic layer, wherein x is an integral number equal to 2 or 3, and y satisfies an equation having a formula of y=2x+1, and wherein SixHy of the first precursor is separated from R1 to form the single-layered silicon atomic layer; and
- providing a second precursor different from the first precursor on the single-layered silicon atomic layer to form a silicon-containing layer,
- wherein R1 has the following chemical formula 1,
- wherein each of R2 and R3 independently includes at least one of a methyl group, an ethyl group, a propyl group, an isopropyl group, a butyl group, or a tert-butyl group,
- wherein providing the first precursor having the chemical formula of R1—SixHy on the substrate is carried out at a temperature of between about 200° C. and about 450° C.,
- wherein an oxide layer is provided on the substrate, and
- wherein silicon atoms of SixHy of the first precursor are bonded to oxygen atoms that are bonded to the oxide layer after SixHy is separated from R1.
2. The method of claim 1, wherein forming the silicon-containing layer comprises forming a silicon nitride layer, a silicon oxide layer, or a silicon-germanium layer.
3. The method of claim 1, wherein the second precursor comprises at least one of monosilane (SiH4), disilane (Si2H6), or a high-grade silane having a chemical formula of SinH2n+2, n being an integral number equal to or greater than 3,
- wherein forming the silicon-containing layer comprises forming a poly-silicon layer using the single-layered silicon atomic layer as a seed layer, and
- wherein the poly-silicon layer is formed by performing a chemical vapor deposition process.
4. The method of claim 3, wherein forming the silicon-containing layer further comprises:
- doping the poly-silicon layer by providing at least one of Group III elements, Group V elements, or carbon.
5. The method of claim 1, wherein forming the silicon-containing layer comprises:
- forming a non-silicon atomic layer on the single-layered silicon atomic layer,
- wherein forming the single-layered silicon atomic layer and forming the non-silicon atomic layer are alternately and repeatedly performed, and
- wherein the non-silicon atomic layer is formed by providing the second precursor containing at least one element selected from a group consisting of oxygen, nitrogen, or germanium.
6. The method of claim 1, wherein the first precursor is diisopropylaminodisilane (((CH3)2CH)2N—SiH2SiH3).
7. A method of forming a layer, the method comprising:
- providing a first precursor having a chemical formula of R1—SixHy on a substrate to form a single-layered silicon atomic layer, wherein x is an integral number equal to 2 or 3, y satisfies an equation having a formula of y=2x+1, and R1 includes at least one of an amino group, an alkyl group, a cyclopentadienyl (C5H5) group, or a halogen, and wherein SixHy of the first precursor is separated from R1 to form the single-layered silicon atomic layer; and
- forming a poly-silicon layer using the single-layered silicon atomic layer as a seed layer by providing a second precursor on the single-layered silicon atomic layer, the second precursor being different from the first precursor,
- wherein providing the first precursor having the chemical formula of R1—SixHy on the substrate is carried out at a temperature of between about 200° C. and about 450° C.,
- wherein an oxide layer is provided on the substrate, and
- wherein silicon atoms of SixHy of the first precursor are bonded to oxygen atoms that are bonded to the oxide layer after SixHy is separated from R1.
8. The method of claim 7, wherein R1 has the following chemical formula 1,
- wherein each of R2 and R3 independently includes at least one of a methyl group, an ethyl group, a propyl group, an isopropyl group, or a butyl group.
9. The method of claim 7, wherein the second precursor comprises at least one of monosilane (SiH4), disilane (Si2H6), or a high-grade silane having a chemical formula of SinH2n+2, and
- wherein n is an integral number equal to or greater than 3.
10. The method of claim 7, wherein the single-layered silicon atomic layer is formed to provide silicon adsorption sites so that silicon atoms of the second precursor are bonded to the silicon adsorption sites.
11. The method of claim 7, wherein forming the poly-silicon layer comprises performing a chemical vapor deposition process.
12. A method of forming a poly-silicon layer, the method comprising:
- forming a single-layered silicon atomic layer on an underlying structure by providing diisopropylaminodisilane (DIPADS, ((CH3)2CH)2N—SiH2SiH3) on the underlying structure, wherein, during forming the single-layered silicon atomic layer, SiH2SiH3 of DIPADS is separated from (CH3)2CH)2N, and silicon atoms of SiH2SiH3 are bonded to a surface of the underlying structure, and wherein providing the DIPADS is carried out at a temperature of between about 200° C. and about 450° C.; and
- forming the poly-silicon layer using the single-layered silicon atomic layer as a seed layer by providing a precursor on the single-layered silicon atomic layer, wherein the precursor comprises monosilane (SiH4), disilane (Si2H6), or a high-grade silane having a chemical formula of SinH2n+2, n being an integral number equal to or greater than 3, and wherein the poly-silicon layer is formed by performing a chemical vapor deposition process,
- wherein the underlying structure comprises a silicon substrate and an oxide layer on the silicon substrate, and
- wherein the silicon atoms of SiH2SiH3 are bonded to oxygen atoms that are bonded to a surface of the oxide layer.
13. The method of claim 12, wherein the silicon atoms of SiH2SiH3 bonded to the oxygen atoms are silicon adsorption sites, and silicon atoms of the precursor are bonded to the silicon adsorption sites.
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Type: Grant
Filed: Jul 29, 2016
Date of Patent: Feb 20, 2018
Patent Publication Number: 20160336328
Assignees: SAMSUNG ELECTRONICS CO., LTD. (Suwon-si), DOW CORNING CORPORATION (Midland, MI)
Inventors: JunHyun Cho (Hwaseong-s), Michael David Telgenhoff (Midland, MI), Xiaobing Zhou (Midland, MI), Kyunghye Jung (Nam-gu), Younjoung Cho (Hwaseong-si)
Primary Examiner: Mohammed Shamsuzzaman
Application Number: 15/223,685
International Classification: H01L 21/20 (20060101); H01L 27/108 (20060101); H01L 21/02 (20060101); H01L 27/11556 (20170101);