Patents Issued in May 31, 2001
  • Publication number: 20010002033
    Abstract: A bar code reader for an automated storage library has a lens assembly with a pair of polarized liquid crystal lenses. Each lens has pair of parallel glass plates that are separated by upper and lower glass substrates. A series of polymer films are symmetrically spaced apart between the substrates. Both the substrates and the films are perpendicular to the glass plates. Electrodes are formed on the films and combine to form a semi-cylindrical stack of film. Liquid crystal fills the spaces between adjacent pairs of the films. The films are coated and/or treated by an alignment process to predispose the liquid crystals to a specific rotational direction. When a selected voltage is applied between adjacent ones of the electrodes, the liquid crystals are synchronously rotated to alter their refractive index to a desired value. Thus, when the layers of each lens are manipulated in unison, the bar code reader is able to quickly adjust its focal length to read bar codes at various distances.
    Type: Application
    Filed: January 16, 2001
    Publication date: May 31, 2001
    Applicant: International Business Machines Corp.
    Inventors: Daniel James Winarski, Masaki Hasegawa, Kamal Emile Dimitri, Robert LaMar Bingham
  • Publication number: 20010002034
    Abstract: A smart-card reader that includes a base, a first group of contact elements, a cover, a second group of contact elements and connecting means is disclosed. The smart-card reader can be readily soldered into a printed circuit board of a customer to be used in an apparatus in which the smart card reader is located.
    Type: Application
    Filed: November 30, 2000
    Publication date: May 31, 2001
    Inventors: Manfred Reichardt, Bernd Schuder
  • Publication number: 20010002035
    Abstract: The invention relates to a contactless or hybrid contact-contactless smart card, including an antenna on a support, this antenna being formed by at least one turn of electrically conductive ink which is screen printed on the support, two card bodies 24 on each side of the support, each of the card bodies consisting of at least one layer of plastic material, and a chip or module 26 connected to the antenna. The support is made of paper and features cutouts 22 in each corner at which the two card bodies are welded together, thus giving its capacity to delaminate, when the card is bent, at the location where the forces were generated, which highlights any act of deliberate damage a posteriori as the card retains the traces of the bending, and represents a countermeasure against fraud.
    Type: Application
    Filed: November 29, 2000
    Publication date: May 31, 2001
    Inventor: Georges Kayanakis
  • Publication number: 20010002036
    Abstract: A mobile products applicator includes a monitoring system particularly adaptable for use in selected product management applications, wherein application rates for selected products stored on-board one or more storage devices are measured on-the-go and visually reported to an applicator operator in near real-time. The mobile products applicator provides environmental advantages to all through enhanced resource management by eliminating or significantly reducing ground and/or water contamination.
    Type: Application
    Filed: January 4, 2001
    Publication date: May 31, 2001
    Applicant: Ag-Chem Equipment Co., Inc.
    Inventor: Dwayne A. Nystrom
  • Publication number: 20010002037
    Abstract: An apparatus and method for extracting sugar-containing juice from sugar-containing plant matter, such as sugar cane. The apparatus is adapted to be installed in or near the field in which the plant matter is to be harvested. The apparatus comprises an inlet means for receiving the plant matter, a comminuting means for finely comminuting the received plant matter, and a separating means for separating the sugar-containing juice from the finely comminuted plant matter. Use of the apparatus at or near the site of harvest reduces the quantity of fibrous material transported to the sugar mill. It also allows return to the field of much of the fibrous matter that is at present lost in the harvesting process.
    Type: Application
    Filed: September 30, 1999
    Publication date: May 31, 2001
    Inventor: TREVOR ESSEX CULLINGER
  • Publication number: 20010002038
    Abstract: A spool holder structure used in, for instance, a bonding apparatus and equipped with a spool holder that holds a spool around which a wire is wound, a holder shaft which is fastened to the inner circumference of the spool holder, a holder fastening shaft made of an insulating material and fastened to the inner circumference of the holder shaft, and a motor that has an output shaft fastened to the holder fastening shaft, in which the holder shaft is fastened to an attachment plate of, for instance, the bonding apparatus via a conductive bearing so that the holder shaft is rotatable, and the conductive bearing is grounded.
    Type: Application
    Filed: November 29, 2000
    Publication date: May 31, 2001
    Applicant: KABUSHIKI KAISHA SHINKAWA
    Inventors: Yoshimitsu Terakado, Takatoshi Kawamura, Tadashi Akiike
  • Publication number: 20010002039
    Abstract: Reflected light of each beam projected toward an object to be measured is received to provide a far signal and a near signal, and the far signal is compared with a preset clamp signal. The larger signal resulting from the comparison is outputted from a clamping circuit and a ratio of the output signal and the near signal is calculated to obtain an output ratio signal. Output ratio signals against light emissions from a light projecting unit are accumulated in an integral operation to obtain an integral signal. The integral signal is transformed to a distance signal according to the distance by either of different transformation equations, based on whether the number of clamp signals outputted as output signals from the clamping circuit during the integral operation is not less than a set number.
    Type: Application
    Filed: November 30, 2000
    Publication date: May 31, 2001
    Inventors: Miwa Yasuhiro, Tatsuo Saito
  • Publication number: 20010002040
    Abstract: The present invention relates to an improved vent valve for a gas strut, and to a gas strut incorporating such a vent valve. A vent valve (1) is provided having a first passage (9,12) in a body (2) extending from one side of a valve seat (8) to a surface of the body (2) which, in use, is exposed to the interior of a gas strut, and a second passage (15) in the body (2) extending from the other side of the valve seat (8) to a body surface which, in use, is exposed to the exterior of said gas strut. A ball (18) is provided between a screw (17), threadedly engaged with the second passage (15), and the valve seat (8), whereby tightening of the screw (17) forces the ball (18) into engagement with the valve seat (8). A controlled release of gas through the vent valve is thereby possible.
    Type: Application
    Filed: April 20, 1999
    Publication date: May 31, 2001
    Inventor: ROBERT BROOKFIELD LLOYD
  • Publication number: 20010002041
    Abstract: A valve element comprises a leaf spring carrying a movable core fitted thereto and is adapted to be mounted into a solenoid valve in order to open and close the valve seat of the solenoid valve. The leaf spring includes an outer peripheral ring section, a hub section having a central hole and one or more than one connection holes and a plurality of radial arm sections for connecting said outer peripheral ring section and said hub section. An outer peripheral seal is made of an elastic material such as rubber and arranged along the outer peripheral ring section of the leaf spring. A valve disk to be fitted to one of the opposite surfaces of said hub section of said leaf spring is provided with a valve seal also made of an elastic material such as rubber that is to be held in contact with the valve seat. A movable core having a flange section is arranged on the other surface of said hub section with the flange section held in contact with the hub section.
    Type: Application
    Filed: January 3, 2001
    Publication date: May 31, 2001
    Inventors: Tetsuya Hayakawa, Masashi Tsurumi
  • Publication number: 20010002042
    Abstract: An aqueous composition formed by mixing a hydrolysable silicon compound having a low solubility in water (e.g a fluorosilane), a major proportion of water, and a surfactant, also contains an effective amount of a co-solvent (e.g. certain glycol ethers) which is sparingly soluble in water to improve the stability of the composition. The composition may be used for surface treatment.
    Type: Application
    Filed: March 22, 1999
    Publication date: May 31, 2001
    Applicant: Richard W. Avery
    Inventor: RICHARD W. AVERY
  • Publication number: 20010002043
    Abstract: The present invention presents: (1) a starting method that is capable of quickly switching to the reforming process after warming up a catalyst; (2) a fuel supplying apparatus that is capable of maintaining a stable supply of a mixed water-methanol solution while preventing water from freezing in a cold climate, and is also capable of immediately supplying a mixed water-methanol gas that has a composition which is outside of the high-rate reaction region during the starting/stopping operation of the reformer when the control tends to be unstable; (3) a method to quickly cool down a catalyst layer without causing thermal runaway when stopping the operation of the methanol reforming apparatus; and (4) a method to quickly cool down the catalyst layer while preventing thermal runaway from occurring and removing residual fuel when stopping the operation of the methanol reforming apparatus.
    Type: Application
    Filed: November 30, 2000
    Publication date: May 31, 2001
    Inventors: Takahiro Naka, Hideaki Sumi, Masataka Furuyama, Shoji Isobe, Yasushi Hiramatsu, Mikio Yoneoka
  • Publication number: 20010002044
    Abstract: A method of forming conductive structures on the contact pads of a substrate, such as a semiconductor die or a printed circuit board. A solder mask is secured to an active surface of the substrate. Apertures through the solder mask are aligned with contact pads on the substrate. The apertures may be preformed or formed after a layer of the material of which the solder mask is comprised has been disposed on the substrate. Conductive material is disposed in and shaped by the apertures of the solder mask to form conductive structures in communication with the contact pads exposed to the apertures. Sides of the conductive structures are exposed through the solder mask, either by removing the solder mask from the substrate or by reducing the thickness of the solder mask. The present invention also includes semiconductor devices formed during different stages of the method of the present invention.
    Type: Application
    Filed: December 14, 2000
    Publication date: May 31, 2001
    Inventors: Michael B. Ball, Chad A. Cobbley
  • Publication number: 20010002045
    Abstract: Single substrate device is formed to have an image acquisition device and a controller. The controller on the substrate controls the system operation.
    Type: Application
    Filed: January 2, 2001
    Publication date: May 31, 2001
    Applicant: California Institute of Technology
    Inventors: Eric R. Fossum, Robert Nixon
  • Publication number: 20010002046
    Abstract: A memory cell and a method of fabricating the memory cell having a small active area. By forming a spacer in a window that is sized at the photolithographic limit, a pore may be formed in dielectric layer which is smaller than the photolithographic limit. Electrode material is deposited into the pore, and a layer of structure changing material, such as chalcogenide, is deposited onto the lower electrode, thus creating a memory element having an extremely small and reproducible active area.
    Type: Application
    Filed: December 19, 2000
    Publication date: May 31, 2001
    Inventors: Alan R. Reinberg, Russell C. Zahorik, Renee Zahorik
  • Publication number: 20010002047
    Abstract: A thin film transistor of this invention has a structure obtained by sequentially stacking, on an insulating substrate, a silicon nitride film, a silicon oxide film, a polysilicon thin film with a channel region and source and drain regions facing each other via the channel region, an insulating film, and a gate electrode. The boron concentration decreases from the channel region toward the silicon nitride film in the silicon oxide film region between the channel region and the silicon nitride film. The silicon oxide film region between the channel region and the silicon nitride film is made up of a first region which is in contact with the channel region and has a boron concentration of 1×1016 atoms/cm3 or more, and a second region between the first region and the silicon nitride film, which has a boron concentration of less than 1×1016 atoms/cm3. The first region has a thickness of 200 Å or less.
    Type: Application
    Filed: January 18, 2001
    Publication date: May 31, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mitsuaki Suzuki, Shinichi Kamagami, Takuji Nakazono
  • Publication number: 20010002048
    Abstract: A light-emitting semiconductor device provides an active layer which comprises thirteen (13) layers that includes six (6) pairs of quantum barrier layers made of Al0.95In0.05N and quantum well layers made of Al0.70In0 30N, which are laminated together alternately. The semiconductor device may also comprise a quantum well layer having a high composition ratio of indium (In). Forming the quantum barrier layer and the quantum well layer to have a high composition ratio of indium (In) increases the lattice constant of the active layer of the semiconductor device.
    Type: Application
    Filed: January 17, 2001
    Publication date: May 31, 2001
    Inventors: Masayoshi Koike, Shiro Yamakazi, Akira Kojima
  • Publication number: 20010002049
    Abstract: The light-radiating semiconductor component has a radiation-emitting semiconductor body and a luminescence conversion element. The semiconductor body emits radiation in the ultraviolet, blue and/or green spectral region and the luminescence conversion element converts a portion of the radiation into radiation of a longer wavelength. This makes it possible to produce light-emitting diodes which radiate polychromatic light, in particular white light, with only a single light-emitting semiconductor body. A particularly preferred luminescence conversion dye is YAG:Ce.
    Type: Application
    Filed: December 7, 2000
    Publication date: May 31, 2001
    Applicant: OSRAM OPTO SEMICONDUCTORS GmbH & Co., OHG
    Inventors: Ulrike Reeh, Klaus Hohn, Norbert Stath, Gunter Waitl, Peter Schlotter, Jurgen Schneider, Ralf Schmidt
  • Publication number: 20010002050
    Abstract: A thin-film transistor array includes a substrate, an electrically conductive portion, and a metal layer. The electrically conductive portion is made of one of indium tin oxide, indium oxide, and tin oxide. The electrically conductive portion and the metal layer are formed on a common surface of the substrate. The metal layer includes a first layer and a second layer. The first layer is made of one of aluminum and an aluminum alloy. The second layer extends on the first layer and is made of metal having an oxidization potential nobler than a reduction potential of said one of indium tin oxide, indium oxide, and tin oxide in alkaline aqueous solution.
    Type: Application
    Filed: January 8, 2001
    Publication date: May 31, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ikunori Kobayashi, Mamoru Takeda, Yoshiko Mino
  • Publication number: 20010002051
    Abstract: A semiconductor device including (a) a base plate, (b) an insulation substrate including of an insulator plate with a front electrode and a back electrode bonded thereon and fixed onto the base plate by the back electrode, (c) a semiconductor element fastened onto the insulation substrate by the front electrode, (d) an insulating cover covering the semiconductor element, and (e) electrodes that are led from the semiconductor element to the outside of the insulating cover. The back electrode is larger than the insulator plate, and the base plate has a through hole that is smaller than the back electrode and larger than the insulator plate. The insulation substrate is positioned in the through hole and is fastened onto the back surface of the base plate by the periphery of the back electrode. The insulation substrate can make direct contact with a heat sink without the base plate intervening therebetween, and thereby thermal resistance between the semiconductor element and the heat sink is decreased.
    Type: Application
    Filed: January 11, 2001
    Publication date: May 31, 2001
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventor: Hideo Matsumoto
  • Publication number: 20010002052
    Abstract: A new flash memory cell structure and operational bias approach for allowing programming operations significantly faster than prior approaches, is based on the use of band-to-band tunneling induced hot electron injection in cells to be programmed and on the use of triple-well floating gate memory structures. The method comprises inducing band-to-band tunneling current from the semiconductor body to one of the source and drain near the channel, and applying a positive bias voltage to the control gate to induce hot electron injection into the floating gate. The other of the source and drain terminals is floated, that is disconnected so that current does not flow through that terminal. The band-to-band tunneling current is induced by applying a reference potential to one of the source and drain sufficient to establish conditions for the band-to-band tunneling current.
    Type: Application
    Filed: January 3, 2001
    Publication date: May 31, 2001
    Inventors: Jyh-Chyurn Guo, W.J. Tsai
  • Publication number: 20010002053
    Abstract: In one aspect, the invention encompasses a method of forming a capacitor. A mass is formed over an electrical node. An opening is formed within the mass. The opening has a lower portion proximate the node and an upper portion above the lower portion. The lower portion is wider than the upper portion. A first conductive layer is formed within the opening and along a periphery of the opening. After the first conductive layer is formed, a portion of the mass is removed from beside the upper portion of the opening while another portion of the mass is left beside the lower portion of the opening. A dielectric material is formed over the first conductive layer, and a second conductive layer is formed over the dielectric material. The second conductive layer is separated from the first conductive layer by the dielectric material. In another aspect, the invention encompasses a capacitor construction.
    Type: Application
    Filed: December 1, 2000
    Publication date: May 31, 2001
    Inventors: Siang Ping Kwok, William F. Richardson
  • Publication number: 20010002054
    Abstract: A high speed/large capacity DRAM (Dynamic Random Access Memory) is generally refreshed each 0.1 sec because it loses information stored therein due to a leakage current. The DRAM also loses information stored therein upon cutoff of a power source. Meanwhile, a nonvolatile ROM (Read-only-Memory) cannot be configured as a high speed/large capacity memory.
    Type: Application
    Filed: December 4, 2000
    Publication date: May 31, 2001
    Inventors: Hideo Sunami, Kiyoo Itoh, Toshikazu Shimada, Kazuo Nakazato, Hiroshi Mizuta
  • Publication number: 20010002055
    Abstract: A method for making reduced-size FLASH EEPROM memory circuits, and to the resulting memory circuit. An FET integrated circuit having two different gate oxide thicknesses deposited at a single step, where a portion of the thickness of the thicker oxide is formed, that oxide is removed from the area of the chip to have the thinner oxide, then the rest of the thicker oxide is grown during the time that the thinner oxide is grown on the area of the chip to have the thinner oxide. Layers for the floating gate stacks are deposited. Trenches are etched in a first, and then a second perpendicular direction, and the perpendicular sides of the stacks are covered with vertical-plane nitride layers in two separate operations. Tungsten word lines and bit contacts are deposited. Aluminum-copper lines are deposited on the bit lines.
    Type: Application
    Filed: January 9, 2001
    Publication date: May 31, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Darwin A. Clampitt, James E. Green
  • Publication number: 20010002056
    Abstract: An SRAM cell is described which has a reduced cell area, and a reduced processing cost from conventional SRAM's. A fabrication process is described where self-aligned contacts to substrate active area and contact to a first layer of polysilicon are formed in one etch step. Electrical connection between the substrate and polysilicon is provided through a conductive layer coupled to the contacts. Self aligned contacts are fabricated to contact the active area.
    Type: Application
    Filed: January 10, 2001
    Publication date: May 31, 2001
    Applicant: Micron Technology, Inc.
    Inventor: H. Montgomery Manning
  • Publication number: 20010002057
    Abstract: Provides a semiconductor device that can separate components easily. Gate electrode 42 is formed only within component forming region 32, and gate electrode 42 and aluminum wiring 48 are connected in component forming region 32. Therefore, there is almost no inversion of the surface of the semiconductor substrate 36 that is under field oxide film 38 due to the voltage of the concerned connection area and gate electrode 42. Also, there is interlayer film 44 between aluminum wiring 48 and field oxide film 38, so there is almost no inversion of the surface of the semiconductor substrate 36 that is under field oxide film 38 due to the voltage of aluminum wiring 48. Therefore, it is possible to separate components without increasing overall length L1 of field oxide film 38, increasing the film thickness of field oxide film 38, or increasing the concentration of channel stop ions implanted into the surface of the semiconductor substrate 36 that is under field oxide film 38.
    Type: Application
    Filed: January 23, 2001
    Publication date: May 31, 2001
    Applicant: Rohm Co., Ltd
    Inventor: Noriyuki Shimoji
  • Publication number: 20010002058
    Abstract: A semiconductor apparatus (010) is disclosed that includes a gate electrode formed over an active area and isolation area that can address adverse current properties that may result in a subthreshold “hump” in a gate voltage (VG)-drain current (ID) response. A first embodiment (010) may include an active area (016) formed adjacent to an isolation area (018). A gate insulator (014) may be formed over active area (016). A gate electrode (020) can be formed over an active area (016) and an isolation area (018). A gate electrode (020) may include end portions (020a) formed in the vicinity of an active area (016)/isolation area (018) interface, and a central portion (020b) formed between end portions (020a). End portions (020a) may be doped differently than a central portion (020b) to effectively compensate for lower threshold voltages in such areas. End portions (020a) may be doped to a conductivity type that is different than a central portion (020b) and the same as a channel region.
    Type: Application
    Filed: November 29, 2000
    Publication date: May 31, 2001
    Inventor: Ryoichi Nakamura
  • Publication number: 20010002059
    Abstract: An integrated semiconductor device includes a substrate having a buried shallow trench isolation structure and an epitaxial layer disposed over the substrate and the buried shallow trench isolation structure. The epitaxial layer includes a shallow trench isolation structure that extends over the buried shallow trench isolation structure in the substrate to substantially reduce leakage current in the substrate to prevent device latch-up.
    Type: Application
    Filed: January 5, 2001
    Publication date: May 31, 2001
    Applicant: Winbond Electronics Corporation
    Inventors: Shyh-Chyi Wong, Shi-Tron Lin
  • Publication number: 20010002060
    Abstract: Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying methods are described. In one embodiment, a monolithic inductance-enhancing integrated circuit comprises a transistor supported by a bulk monocrystalline silicon substrate. An inductor assembly is supported by the substrate and operably connected with the transistor in an inductance-enhancing circuit configuration having a quality factor (Q) greater than 10. In another embodiment, a complementary metal oxide semiconductor (CMOS), inductance-enhancing integrated circuit includes a field effect transistor supported over a silicon-containing substrate and having a gate, a source, and a drain. A first inductor is received within an insulative material layer over the substrate, and is connected to the gate. A second inductor is received within the insulative material layer and is connected to the source.
    Type: Application
    Filed: January 24, 2001
    Publication date: May 31, 2001
    Inventor: Leonard Forbes
  • Publication number: 20010002061
    Abstract: An emitter contact structure including a silicon substrate having a collector region, a base region within the collector region, and an emitter region within the base region. A base polysilicon layer positioned on the silicon substrate in contact with the base region and defining an aperture, with side walls, exposing the base and emitter regions of the silicon substrate. A spacer extending upwardly from the silicon substrate and formed to cover the side walls, the spacer covering the base region and partially covering the emitter region. An emitter polysilicon layer positioned entirely within the aperture in engagement with the emitter region, the spacer and the substrate without overlapping the base polysilicon layer.
    Type: Application
    Filed: December 14, 2000
    Publication date: May 31, 2001
    Inventor: F. Scott Johnson
  • Publication number: 20010002062
    Abstract: High density static memory cells and arrays containing gated lateral bipolar transistors which can be latched in a bistable on state. Each transistor memory cell includes two gates which are pulse biased during the write operation to latch the cell. Also provided is a CMOS fabrication process to create the cells and arrays.
    Type: Application
    Filed: December 29, 2000
    Publication date: May 31, 2001
    Inventors: Wendell P. Noble, Leonard Forbes
  • Publication number: 20010002063
    Abstract: A substantially concentric lateral bipolar transistor and the method of forming same. A base region is disposed about a periphery of an emitter region, and a collector region is disposed about a periphery of the base region to form the concentric lateral bipolar transistor of the invention. A gate overlies the substrate and at least a portion of the base region. At least one electrical contact is formed connecting the base and the gate, although a plurality of contacts may be formed. A further bipolar transistor is formed according to the following method of the invention. A base region is formed in a substrate and a gate region is formed overlying at least a portion of the base region. Emitter and collector terminals are formed on opposed sides of the base region. The gate is used as a mask during first and second ion implants.
    Type: Application
    Filed: December 20, 2000
    Publication date: May 31, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Kirk D. Prall, Mike P. Violette
  • Publication number: 20010002064
    Abstract: A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.
    Type: Application
    Filed: January 17, 2001
    Publication date: May 31, 2001
    Inventors: Chuichi Miyazaki, Yukiharu Akiyama, Masanori Shibamoto, Tomoaki Kudaishi, Ichiro Anjoh, Kunihiko Nishi, Asao Nishimura, Hideki Tanaka, Ryosuke Kimoto, Kunihiro Tsubosaki
  • Publication number: 20010002065
    Abstract: An integrated circuit package that has the ability for interdevice communication. The integrated circuit package has a first device mounted within the integrated circuit package. A second device is also mounted within the integrated circuit package. The second device is directly coupled to the first device through interdevice bonding for allowing the first device and the second device to communicate and control one another.
    Type: Application
    Filed: December 8, 2000
    Publication date: May 31, 2001
    Inventors: Steve V. Drehobl, Joseph D. Fernandez, Mike Charles
  • Publication number: 20010002066
    Abstract: A semiconductor device, comprising: a semiconductor chip having on its main plane a plurality of external electrodes each having a joining portion; an insulating substrate having a predetermined pattern of leads thereon and having no device hole for said semiconductor chip, each of said leads being provided with an inner lead having a joining portion which is joined through solder to a corresponding one of the joining portions of said external electrodes of said semiconductor chip to provide a joined portion; and a molding resin for sealing said joined portion including the solder, wherein the joining portion of the external electrode comprises a metal selected from the group consisting of gold and tin, the joining portion of the inner lead comprises a metal selected from the group consisting of gold and tin, provided that, when the metal constituting the joining portion of the external electrode is gold, the metal constituting the joining portion of the inner lead is tin, or vice versa, and the solder compri
    Type: Application
    Filed: January 8, 2001
    Publication date: May 31, 2001
    Applicant: Hitachi Cable Ltd.
    Inventors: Mamoru Mita, Gen Murakami
  • Publication number: 20010002067
    Abstract: The present invention provides a resin-encapsulated semiconductor device having inner leads and at least a heat spreader, wherein at least an electrical insulator is provided between the inner leads and the heat spreader, or wherein suspension pins for suspending an island mounting a semiconductor device are formed to have a lower level than the inner leads, or wherein the heat spreader has a fixing means for fixing the heat spreader over position, or wherein the heat spreader has an elevated center region having a light level than a peripheral region of the heat spreader.
    Type: Application
    Filed: November 29, 2000
    Publication date: May 31, 2001
    Applicant: NEC CORPORATION
    Inventor: Kousuke Azuma
  • Publication number: 20010002068
    Abstract: An interconnect for testing semiconductor components having both bumped contacts, and planar contacts, is provided. The interconnect includes: a substrate, first contacts on the substrate for electrically engaging the bumped contacts, and second contacts on the substrate for electrically engaging the planar contacts. In illustrative embodiments the first contacts include recesses in the substrate covered with a conductive layer, or recesses formed in a compliant layer on the substrate, or conductive polymer donuts sized and shaped to retain the bumped contacts. In illustrative embodiments the second contacts include etched pillars having penetrating projections, or conductive polymer bumps having penetrating particles, or flat topped projections having a compliant layer thereon. The interconnect can be used to construct a die level test carrier for testing components in singulated form, or to construct a wafer level test carrier for testing components in wafer or panel form.
    Type: Application
    Filed: December 14, 2000
    Publication date: May 31, 2001
    Inventors: Warren M. Farnworth, Salman Akram
  • Publication number: 20010002069
    Abstract: A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.
    Type: Application
    Filed: January 19, 2001
    Publication date: May 31, 2001
    Inventors: Chuichi Miyazaki, Yukiharu Akiyama, Masanori Shibamoto, Tomoaki Kudaishi, Ichiro Anjoh, Kunihiko Nishi, Asao Nishimura, Hideki Tanaka, Ryosuke Kimoto, Kunihiro Tsubosaki, Akio Hasebe
  • Publication number: 20010002070
    Abstract: In a peripheral circuit region requiring a conductive path between layers at the periphery of a memory cell array region, a conductive path is provided, after removing a silicon nitride film used for self-alignment contact from the area of the contacting portion of a conductor, by forming an interlayer oxide film on the conductor and providing an opening through the interlayer oxide film. Alternatively, a conductive path is provided, after forming the interlayer oxide film on the silicon nitride film used for self-alignment contact, by forming an opening throughout the interlayer oxide film and silicon nitride film.
    Type: Application
    Filed: January 17, 2001
    Publication date: May 31, 2001
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takahisa Eimori, Hiroshi Kimura
  • Publication number: 20010002071
    Abstract: A diffusion barrier layer comprising TiNxBy is disclosed for protection of gate oxide layers in integrated transistors. The diffusion barrier layer can be fabricated by first forming a TiN layer and then incorporating boron into the TiN layer. The diffusion barrier layer can also be fabricated by forming a TiNxBy layer using a TDMAT process including boron. The diffusion barrier layer can also be fabricated by forming a TiNxBy layer using a CVD process.
    Type: Application
    Filed: December 15, 2000
    Publication date: May 31, 2001
    Inventors: Vishnu K. Agarwal, Gurtej S. Sandhu
  • Publication number: 20010002072
    Abstract: An integrated circuit having at least one electrical interconnect for connecting at least two components and a process for forming the same are disclosed. The integrated circuit comprises: a substrate, a plurality of adjacent conductive strips, a layer of dielectric material, and a conductive material. The substrate has a surface and the plurality of adjacent conductive strips is disposed on the substrate surface with each adjacent conductive strip having a length. The layer of dielectric material is deposited over the substrate surface and over and around the plurality of adjacent conductive strips to form at least two opposing, contoured, merging dielectric surfaces, each of which overhangs the substrate surface located between at least two of the plurality of adjacent conductive strips. The at least two opposing, contoured, merging dielectric surfaces define at least one elongated passageway which has at least one opening and is substantially encased therein and which extends along the length.
    Type: Application
    Filed: December 15, 2000
    Publication date: May 31, 2001
    Inventor: Philip J. Ireland
  • Publication number: 20010002073
    Abstract: In a method of and apparatus for producing sub-micron bubbles in liquids, slurries, and sludges, gas is maintained on the interior of the gas permeable partition at predetermined pressure. Relative movement between the gas permeable partition and the surrounding material forms sub-micron sized bubbles in the liquid, slurry, or sludge.
    Type: Application
    Filed: January 2, 2001
    Publication date: May 31, 2001
    Inventor: Jeffrey H. Sherman
  • Publication number: 20010002074
    Abstract: In a method for manufacture of an optical element, a thin film is formed on a surface, such as a grating surface, an aspherical surface or a spherical surface, formed on a mold. Then, a substrate is bonded to the thin film. Subsequently, the thin film and the substrate are separated from the mold.
    Type: Application
    Filed: January 5, 2001
    Publication date: May 31, 2001
    Inventors: Hideo Kato, Hiroshi Maehara, Makoto Ogusu
  • Publication number: 20010002075
    Abstract: The invention includes a process comprising (a) forming a polymeric admixture including at least one polyolefin which has been prepared using a single site catalyst and at least a crosslinking amount of at least one poly(sulfonyl azide) crosslinking agent; (b) shaping the resulting admixture; and (c) heating the resulting shaped admixture to a temperature at least the decomposition temperature of the crosslinking agent. The steps take place in any sequence and optionally include substeps. The single site catalyst is preferably a constrained geometry or metallocene catalyst, but optionally another transition metal catalyst which is not a traditional Ziegler Natta Ti/MgCl2 catalyst such as a vanadium catalyst.
    Type: Application
    Filed: August 26, 1998
    Publication date: May 31, 2001
    Inventors: BHARAT CHAUDHARY, THOI H. HO, SEEMA KARANDE, CHE-I KAO, ROBERT H. TERBRUEGGEN, DAVID A. BABB, CLARK H. CUMMINS, MICHAEL J. MULLINS, H. CRAIG SILVIS
  • Publication number: 20010002076
    Abstract: A sleeve-type gas spring for a turret indexing press has an annular piston operably associated with a punch tool to reciprocate therewith and defining in part an annular gas chamber constructed to receive a gas under pressure. As the punch tool and piston are driven to their extended position by a press ram or some such other power device, the volume of the gas chamber decreases thereby increasing the pressure within the gas chamber such that when the ram is retracted, the pressure of the gas acting on the piston displaces the piston and the punch tool to their retracted positions. The force acting to retract the piston and the punch is dependent on the initial pressure of the gas within the gas chamber and the change in volume of the gas chamber as the punch tool and piston are extended.
    Type: Application
    Filed: February 3, 1998
    Publication date: May 31, 2001
    Inventor: JONATHAN P. COTTER
  • Publication number: 20010002077
    Abstract: An apparatus capable of performing pick operations on multiple sizes in a printing device is disclosed. This apparatus separates a media sheet from a stack and drives it along a media path. The apparatus also corrects any pick skew of the media sheet caused during the pick operation before the media sheet is transferred to the drive roller. By ensuring that the traversing media sheet has a leveled leading edge, the pick skew of the media sheet is substantially eliminated.
    Type: Application
    Filed: June 22, 1998
    Publication date: May 31, 2001
    Inventors: CHING YONG CHUA, AH CHONG JOHNNY TEE, SENG LIM RICHARD WU, PUI WEN HUANG
  • Publication number: 20010002078
    Abstract: An image forming apparatus includes discharging bins in which image-formed sheets are stacked, and uses a bin elevating motor to switch discharging into one discharging bin. The image forming apparatus is provided with a sensor for detecting the amount of stacked paper in one discharging bin to which discharging can be performed. When the operational discharging bin is changed, the discharging bins are moved by the bin elevating motor, whereby the sensor detects the amount of stacked paper in the discharging bin to which discharging can be performed after the moving. Subsequently, the sensor directs a start of image formation.
    Type: Application
    Filed: January 8, 2001
    Publication date: May 31, 2001
    Inventor: Nobuyoshi Kakigi
  • Publication number: 20010002079
    Abstract: Described herein is a lottery ticket comprising a front surface having lottery indicia covered by a scratch-off layer printed thereon and a rear surface having a plurality of break-open windows for viewing the variable image printed lottery indicia beneath the windows. The ticket is one of a row of such tickets each connected to the next at a line of weakness allowing the tickets to be stacked in a dispenser in fan folded arrangement for dispensing. The game data is applied by variable imaging techniques allowing the use of fully variable games and validation bar codes.
    Type: Application
    Filed: September 27, 1999
    Publication date: May 31, 2001
    Inventors: LYLE HAROLD SCRYMGEOUR, MICHAEL JOHN BRICKWOOD
  • Publication number: 20010002080
    Abstract: Interface plate (1) intended to be inserted between a snowboard binding and the upper face of a snowboard, and which comprises:
    Type: Application
    Filed: November 29, 2000
    Publication date: May 31, 2001
    Inventor: Pascal Joubert Des Ouches
  • Publication number: 20010002081
    Abstract: A wheelchair has an adjustable seat that can be raised and lowered between a normal wheelchair operating height and ground level for enabling a wheelchair-dependent person to gain access to the seat from ground level and independently raise himself or herself from the ground level to the normal operating height. The seat can be further raised above the normal operating height to a higher level for improved reaching capability. In one embodiment, an elongate shaft is connected to the seat for rotation about its longitudinal axis. A plurality of cables have first ends that are connected to a wheelchair supporting frame and second ends that are connected to the elongate shaft. Rotation of the shaft about its longitudinal axis in one direction causes the cables to wind around the shaft to thereby raise the seat. Rotation of the shaft in the opposite direction causes the cables to unwind from the shaft to thereby lower the seat.
    Type: Application
    Filed: July 20, 1998
    Publication date: May 31, 2001
    Inventor: ANTHONY N. TOPPSES
  • Publication number: 20010002082
    Abstract: Cargo carry apparatus (20) for a tractor (500) for a semitrailer truck includes a rotatable deck (22) mounted between the fifth wheel (502) and the cab which pivots from a vertical position to a horizontal position until the deck rests upon the fifth wheel. With the deck in the horizontal position, the tractor may be utilized to transport cargo to sites which are inaccessible to the semitrailer truck. A variable length controller (32) such as a hydraulic cylinder is used to rotate the deck. In one embodiment, deck (222) has a main portion (224) and a longitudinally extendable portion (226) residing in substantially coplanar relationship. Extendable portion (226) is slidably connected to main portion (224) so that when main portion (224) is in an horizontal orientation, extendable portion (226) may be selectively extended or pulled out from main portion (224) to form an enlarged deck area.
    Type: Application
    Filed: January 2, 2001
    Publication date: May 31, 2001
    Inventor: Alan J. Walsh