Abstract: The present invention relates to a certificate handling method and system for ensuring secure identification of multiple electronic devices and especially to a method and a system for autonomously creating, transferring, verifying, issuing and status checking (e.g. revocation status) of digital certificates for electronic communication. The present invention provides a certificate handling method, wherein the electronic devices can mutually authenticate each others identity without the use of a certificate authority and the identities of a first electronic device and a second electronic device are mutually authenticated using a personal area network to establish a trust relationship between the first electronic device and the second electronic device.

Abstract: An apparatus and a method for generating a secure cipher key over an insecure channel. In one embodiment, a set of polynomials is generated and shared between a first party and a second party over the insecure channel. The first party generates a first random exponent for its private cipher key. The second party generates a second random exponent for its private cipher key. The first party operates on the set of polynomials with the first random exponent and sends the results to the second party. The second party operates on the set of polynomials with the second random exponent and sends the results to the first party. A shared cipher key is computed based on the exchanged operation results.

Abstract: A method and apparatus for an system and process for sharing a secret over an unsecured channel in conjunction with an authentication system. A client computes a message authentication code based on a hashed password value and a first random string received from the server. The client sends a response to the server that includes authentication data including a second random string. Both the client and server concatenate the first random string, second random string and username. Theses values are processed to generate as a shared master secret to further generate shared secrets or keys to establish a secured communication channel between the client and server. The secured communication can be based on stateless messaging where the decryption key associated with the message is identified by the message authentication code, which is placed within the message.

Abstract: Access to one or more data streams can be controlled by encrypting a description of how segments of the data streams can be assembled, for example, to produce an audio or video program. Access to the one or more data streams can also be provided by obfuscating names of at least some of the segments in order to make it more difficult to determine the proper order for assembling the segments. In at least some embodiments, the data contained in at least some of the segments themselves is not encrypted.

Abstract: A network comprising an authentication network limited to a family dwelling; a content source; and a content receiver. Wherein the content source is configured to transmit encrypted content to the content receiver, and the content receiver can decode the encrypted content only when both the content source and the content receiver are physically connect to the authentication network.

Abstract: The present invention relates to a method and a device of verifying the validity a digital signature based on biometric data. A basic idea of the invention is that a verifier attains a first biometric template of the individual to be verified, for instance by having the individual provide her fingerprint via an appropriate sensor device. Then, the verifier receives a digital signature and a second biometric template. The verifier then verifies the digital signature by means of using either the first or the second biometric template as a public key. The attained (first) biometric template of the individual is compared with the received (second) biometric template associated with the signature and if a match occurs, the verifier can be confident that the digital signature and the associated (second) biometric template have not been manipulated by an attacker for impersonation purposes.

Abstract: A user working on a client computer is allowed to remotely login to a server over a computer network. A first secure connection is established between the client and the server. Communications with a trusted device which is in the user's control is established via a communication channel between the trusted device and the client, where this channel is not part of the network. A second secure connection is established between the trusted device and the server through the client, where this second secure connection is tunneled within the first secure connection. The user remotely logs into the server over the second secure connection using the trusted device.

Abstract: The invention relates to extracting and embedding auxiliary data from and to a host signal. In an embodiment, the auxiliary data relates to remotely control of an application or a device, such as an interactive toy. Auxiliary data are extracted from a host signal, by periodically (32A-32C) with a predetermined first period searching a first section (33A-33C) of the host signal for a first watermark (34); and, upon detection of the first watermark, searching the host signal for a second watermark (35). In embodiments, information relating to timing and type of action to be performed by a remotely controlled device may be conveyed by the watermarks.

Abstract: A method and a system for protecting data are provided. When a computer system is powered on, a verification code is compared with a predetermined verification code. If the verification code matches the predetermined verification code, an encrypted configuration data stored in a configuration data block of a storage device is decrypted with the verification code to obtain an original configuration data of the storage device. Thereby, data loss is effectively prevented and a data protection mechanism is provided.

Abstract: An apparatus and a method for encrypting a username is described. In one embodiment, a hashed username is encrypted with a key. An input size of the key matches an output size of the key. The password associated with the hashed username is replaced with a function of the encrypted username. The function includes a linear combination operator of the password and the encrypted username. The encrypted username is then swapped with the replaced password. The encryption, replacement, and the swapping are iterated for at least two or more rounds using a different key with each iteration.

Abstract: Disclosing a secure personal identification number (“PIN”) associated with a financial account to an account holder. A PIN reveal application can interact with a hardware security module (“HSM”) to decrypt and disclose the PIN to the account holder one or more PIN character(s) at a time. The account holder also can set a new PIN in a secure manner. A PIN set application can interact with the HSM to encrypt PIN characters received by the PIN set application from the account holder. The HSM provides a secure platform to encrypt and decrypt the secure PIN.

Abstract: A method and a device for determining a unique content instance identifier of a content item, wherein the content item is received by a receiving device and provided to a content management system and includes an original content identifier of an original identification scheme. The method: defines a data structure of the unique content item identifier depending on the original identification scheme, the data structure including a first, a second and third part, wherein the size of at least one of the second and third parts depends on the original identification scheme; stores a code in the first part, wherein the code uniquely identifies the original identification scheme; stores the original content identifier, a derivative thereof, and/or a device identifier identifying the receiving device in the second part; and stores a freely allocatable value in the third part, such that no duplicate unique content instance identifiers are generated by the device.

Abstract: A method comprising the steps of creating a random permutation of data from a data input by executing at least one of a Pseudo-Random Permutation (PRP) and a Pseudo-Random Function (PRF), creating a first data block by combining the random permutation of data with a received second data block and executing an ?-differentially uniform function on the result of the combination, XORing the result of the ?-DU function evaluation with a secret key, and reducing the first data block to a first message authentication code.

Abstract: A system and method for encrypting an electronic file in a mobile electronic device reads bytes of the electronic file from a cache of a memory system and divides the bytes into a plurality of byte lines. The system and method further assigns a numerical cipher to each byte line and searches a position of each numerical cipher in a corresponding byte line. Furthermore, the system and method encrypt each byte line by inserting one or more random bytes into each byte line, and generates an encrypted electronic file by combining all the encrypted byte lines.

Abstract: A system and method that regulates the various operations between computing stations and storage or content. Any operation that involves or may lead to the exchange or accessing of content (data) between storage or hosting content container and computing station may be regulated by means of a policy which comprise a set of rules. Rules may be defined according to specific criteria, including the type of storage, the type of content, the attributes of the content, and other attributes associated with the storage device and/or the content. The policy will be dynamically installed/updated upon a computing station for specific User(s) and will regulate the data operations that may take place between the computing stations and storage or content based on evaluation of the policy. Based on the evaluation of the policy, the requested operation is permitted, restricted in some areas, or denied.

Abstract: A storage system including a storage unit, a connector, and a controller is provided. A personal identification number (PIN) message digest and a cipher text are stored in the storage unit. When the storage system is connected to a host system through the connector, the controller requests a password from the host system and generates a message digest through a one-way hash function according to the password. After that, the controller determinates whether the message digest matches the PIN message digest. If the message digest matches the PIN message digest, the controller decrypts the cipher text in the storage unit through a first encryption/decryption function according to the password to obtain an encryption/decryption key. Eventually, the controller encrypts and decrypts user data through a second encryption/decryption function according to the encryption/decryption key. Thereby, the user data stored in the storage system can be effectively protected.

Abstract: A right information encryption module 110a comprises a key generation part 111a, a right information encryption part 112a, and a key management information generation part 113a. Key information Km and key management information Mm corresponding to right information are generated and then recorded into a secret recording module 130a. In addition, the right information is encrypted, and then the encrypted right information Enc_a (ROm, Km) and the key management information Mm are recorded into a recording module 140a. This can eliminate the possibility of a capability shortage of a secret area caused by an increase in the data size of the right information including the key information and use restriction information for a content.

Abstract: A method and apparatus is provided for securing a region in a memory of a computer. According to one embodiment, the method comprises halting of all but one of a plurality of processors in a computer. The halted processors entering into a special halted state. Content is loaded into the region only after the halting of all but the one of the plurality of processors and the region is protected from access by the halted processors. The method further comprises placing the non-halted processor into a known privileged state, and causing the halted processors to exit the halted state after the non-halted processor has been placed into the known privileged state.

Abstract: An article of manufacture is provided for securing a region in a memory of a computer. According to one embodiment, the article of manufacture comprises a machine-accessible medium including data that, when accessed by a machine, causes the machine to: halt all but one of a plurality of processing elements in a computer, where the halted processing elements enter into a special halted state; load content into the region only after the halting of all but the one of the plurality of processing elements and the region is protected from access by the halted processing elements; place the non-halted processing element into a known privileged state; and cause the halted processing elements to exit the halted state after the non-halted processing element has been placed into the known privileged state.

Abstract: A tamper resistant apparatus 101 is mounted inside of a PC 900 and stores confidential information A through C. The tamper resistant apparatus 101 receives data from an application 118 which operates on the PC 900, processes the data using the confidential information A through C, and returns processed data to the application 118. To the tamper resistant apparatus 101, plural external sensors 110 provided to the PC 900 are connected. The plural external sensors 110 detect opening/closing of a case of the PC 900 or movement of the body of the PC 900 and send a detection signal to the tamper resistant apparatus 101. On inputting the detection signal from the plural external sensors 110, the tamper resistant apparatus 101 selects and erases confidential information to be erased from the confidential information A through C according to the tamper resistant policy stored previously.

Abstract: A system may comprise a plurality of processing units, and a control unit and monitoring unit interfacing with the processing units. The control unit may receive requests for transitioning the processing units to respective target power-states, and specify respective target HW power-states corresponding to the respective target power-states. The monitoring unit may monitor operating characteristics of the system, and determine based on operating characteristics whether to allow the processing units to transition to the respective target hardware (HW) power-states. The control unit may be configured to change the respective target HW power-state to a respective updated HW power-state for each processing units for which it is determined that transition to its respective target HW power-state should not be allowed.

Abstract: In the computer apparatus which has a processing unit, a power consumption measuring unit, and a power counter, the power consumption of running programs on the processing unit is measured at arbitrary constant period, wherein the measuring value is integrated to the power counter. When the power counter overflows, the processing unit is interrupted for sampling information required for analysis. Then the processing unit which received the interruption executes a sampling of the power consumption base. So, power consumption based sampling and profiling becomes to be enabled.

Abstract: To keep to a minimum a frequency of an occurrence of a necessity of changing a power consumption condition of a storage device from an energy saving condition to a normal condition. A controller unit and a plurality of storage devices being furnished, a log area and a normal area are provided based on the plurality of storage devices. A quantity of log storage devices forming a basis of the log area is smaller than a quantity of normal storage devices forming a basis of the normal area.

Abstract: A mutual awakening system and method thereof between a handheld device and a wireless communication module are disclosed. The system and method are applicable to the case that the wireless communication module is inserted and electrically coupled to the handheld device. The system includes a communication control line and a host control line which are used for electrically coupling the handheld device and the wireless communication module. When the handheld device is to transmit data, a second voltage signal of the communication control line is raised in value, which triggers a communication interrupt routine of the wireless communication module to awaken the wireless communication module from a sleep state. When the wireless communication module is to transmit data, a first voltage signal of the host control line is raised in value, which triggers a host interrupt routine of the handheld device to awaken the handheld device from a sleep state.

Abstract: A low power processor in a computer is kept energized in a suspend state in which a main processor of the computer is deenergized. The low power processor maintains a network connection by sending keepalive packets as required by the network communication protocol.

Abstract: A method of controlling power consumption of a power supply of a device may include receiving a control signal that switches the device between first and second modes of operation; and switching the supply between corresponding first and second modes based on the received signal, the supply being configured to draw different amounts of power in the first and second modes. A power supply for supplying electrical power to a device may include power supply mode circuitry configured to place the supply into one of at least two power modes: a first mode in which the supply draws a first amount of power and a second mode in which the supply draws less power. An electronic device may include circuitry that generates a control signal, based on which the power supply mode circuitry selectively places the electrical power supply into one of a plurality of power modes.

Abstract: Power management techniques include a method for power management of a processor chip which comprises the following steps. An initial operating level is set for the processor chip. After a predetermined time interval, slack is calculated. If the slack is greater than zero, the initial operating level is increased to a next higher level, otherwise the initial operating level is maintained. After the predetermined time interval, the slack is re-calculated and further includes accumulated slack. If the re-calculated slack is greater than zero, the operating level is increased to the next higher level if the processor chip is being operated at the initial operating level, otherwise the operating level is returned to the initial operating level if the processor chip is being operated at the next higher operating level. The steps to re-calculate the slack and either increase the operating level to the next higher level or return the operating level to the initial operating level are repeated.

Abstract: A power-saving device and method are applicable to a first electronic device having at least one connection interface, and the first electronic device is coupled to a second electronic device via a bus. The power-saving device includes a detection circuit, a power control circuit, and a connection control circuit. The detection circuit is coupled to the connection interface, to detect a load state of the connection interface and generate a detection signal. The power control circuit controls power supplied to the first electronic device via the bus in response to a state of the detection signal. The connection control circuit controls a connection state of the bus according to the detection signal.

Abstract: Energy-efficient multi-core processor systems are provided. A multi-core processor may include a plurality of processor cores configured to process a task in parallel and at least one of a lowest voltage level and a lowest clock frequency among available voltage levels and clock frequencies is chosen to enable the selected processor cores to complete a task within a task deadline.

Abstract: Methods (10, 70, 90, and 100) and systems (50, 80, 150, and 200) for enhancing user experiences on a mobile device use non-volatile execute-in-place memory (60, 160, 207) to provide faster boot-up, reduce current drain, improve security, and facilitate storage decisions that all enhance the operation of the mobile device for a user. Methods and systems embodied herein can include power management for handheld mobile electronic devices. Other embodiments are disclosed.

Abstract: A computer system has at least one supply device, at least one system component with a data-processing device and at least one communications device. The supply device has at least one programmable control module that is supplied with an operating energy by a voltage source coupled to the at least one supply device and operated independently thereof.

Abstract: A memory device includes memory sleep logic operative to detect a repetitive pattern within at least one memory block, and place the memory block into a sleep mode in response to detecting the repetitive pattern. The memory device memory sleep logic may also provide a response to read commands to the memory block while it is in sleep mode, where the response is a constant output for any address location of the memory block. The memory device memory sleep logic may include pattern detection logic, associated with each memory block, to detect the repetitive pattern; and data port logic, coupled to the pattern detection logic, operative to receive an activation command from the pattern detection logic, and operative to return a constant output pattern in response to any read command to read data from the memory block.

Abstract: A storage system and method are provided. The storage system includes, redundant disk arrays to which the same data is written and a write/read control section which controls writing and reading of data to and from the redundant disk arrays in response to a write request and a read request. The system includes disk rotation control section which continuously rotates disks of one of the disk arrays to perform a read process for written data and stops the rotation of disks of the other disk array when writing of data to the redundant disk arrays is completed, and further stops, when the write/read control section determines that the frequency of read requests from the host apparatus becomes less than a predetermined value after the completion of the writing of data, the rotation of the disks of the one of the disk arrays in accordance with the determination.

Abstract: An information handling system having plural processing modules, such as an information handling system blade chassis having plural information handling system blades, allocates power by determining an actual load sharing power loss associated with plural power supplies and applying the actual load sharing power loss to determine how much power to allocate to the information handling system modules. A chassis manager determines actual load sharing power loss by retrieving power information from plural power supplies. The actual load sharing power loss replaces a worst-case load sharing power loss assumed value to increase the amount power available for allocation to the information handling system modules.

Abstract: Some embodiments of the present invention provide a system that controls a device that characterizes the health of a computer system power supply. During operation, a signature for the power supply is generated based on measurements of a set of performance parameters for the power supply. Then, the health of the power supply is characterized based on a comparison between the signature for the power supply and signatures for one or more other power supplies.

Abstract: A method includes linking an owner to an electronic asset using an owner profile. The electronic asset may be coupled to a server through a network. A usage of the electronic asset may be monitored using an activities agent installed on the electronic asset and the agent may monitor a power mode of the electronic asset and usage statistics. A policy may be defined at the server including a first inactivity condition that, when satisfied by the usage statistics of the electronic asset, results in a first alert being generated by the agent indicating inactivity of the electronic asset. The policy may be communicated from the server to the agent, and the agent may determine whether the inactivity condition is satisfied by comparing the usage statistics against the first inactivity condition. When the first inactivity condition is satisfied, the alert may be received at the server from the first agent.

Abstract: A data processing apparatus includes a CPU including a register, a cache memory, a main memory configured to exchange data with the cache memory, a control part configured to control the exchanging of data between the main memory and the cache memory, and a power supply part configured to supply power to the register, the cache memory, and the main memory. The register, the cache memory, and the main memory are each configured to store data and maintain the stored data therein without being supplied with the power from the power supply part. The control part is configured to stop the CPU from accessing the register, the cache memory, and the main memory where an abnormality occurs in the power supply part.

Abstract: Updating timers of central processing units (CPUs) in a multiprocessor apparatus involves the repeated performance of update operations by a device that is coupled to the CPUs via a memory interface. The operations include selecting one of the plurality of CPUs and determining an offset value that estimates a delay time to process a timer update at the selected CPU. A corrected timer value of the selected CPU is determined based on the offset value and a reference time.

Abstract: A signal processing apparatus and method are provided. The signal processing apparatus includes a counter which counts the number of internal clocks; a clock adjustment value determiner which compares a count value of external clocks contained in a broadcast signal to a count value of internal clocks obtained by the counter, and determines a clock adjustment value according to a result of the comparing operation; and a clock adjuster which adjusts the number of the internal clocks based on the determined clock adjustment value. Therefore, it is possible to synchronize the count value of external clocks with the count value of internal clocks using a simple structure.

Abstract: A synchronization apparatus, comprising: a USB device having a USB microcontroller, circuitry for observing USB traffic, and circuitry for decoding from a USB data stream a periodic data structure (such as a clock carrier signal) containing information about a distributed clock frequency and phase and outputting a decoded carrier signal; and circuitry for receiving the decoded carrier signal, for generating a software interrupt upon receipt of a predefined data packet (such as a SOF packet) and for passing the software interrupt to the USB microcontroller; wherein the USB microcontroller is configured to respond to the software interrupt (such as with an interrupt service routine provided therein) by generating an output signal adapted to be used as a synchronization reference signal.

Abstract: Provided is a conveyance control system in which fast and smooth control is realized without causing a control delay by a processing delay of a control apparatus such as a PLC, and wiring between a control object and a central control unit is omitted. A conveyance control system according to the present invention includes a plurality of data processing slave stations connected through a common transmission line. The data processing slave station obtains information about a predetermined station from monitor/control data about a plurality of stations of the data processing slave station transmitted to the common transmission line, determines and adjusts control/monitoring of an own station and outputs information about an own station to the common transmission line. The information about an own station output to the common transmission line from the data processing slave station is obtained by a different station as part of the monitor/control data to become a control/monitor factor of the different station.

Abstract: High-speed serial data transceiver circuitry on a programmable logic device (“PLD”) includes some channels that are able to operate at data rates up to a first, relatively low maximum data rate, and other channels that are able to operate at data rates up to a second, relatively high maximum data rate. The relatively low-speed channels are served by relatively low-speed phase locked loop (“PLL”) circuitry, and have other circuit components that are typically needed for handling data that is transmitted at relatively low data rates. The relatively high-speed channels are served by relatively high-speed PLLs, and have other circuit components that are typically needed for handling data that is transmitted at relatively high data rates.

Abstract: A communication channel includes a first component having a transmitter coupled to a normal signal source, and a second component having a receiver coupled to a normal signal destination. A communication link couples the first and second components. Calibration logic provides for setting an operation value for a parameter of the communication channel, such as by executing an exhaustive calibration sequence at initialization of the link. A tracking circuit, including a monitoring function, tracks drift in the parameter by monitoring a feedback signal that has a characteristic that correlates with drift in the communication channel, and updates, or indicates the need for updating of, the operation value of the parameter in response to the monitoring function.

Abstract: A system and method are provided for reducing a latency associated with timestamps in a multi-core, multi threaded processor. A processor capable of simultaneously processing a plurality of threads is provided. The processor includes a plurality of cores, a plurality of network interfaces for network communication, and a timer circuit for reducing a latency associated with timestamps used for synchronization of the network communication utilizing a precision time protocol.

Abstract: This invention relates to methods for managing the transmission and reception of data fragments that contains one or more data blocks using a single timer. The methods include the following steps: A method for managing the transceiving of data fragments, comprising the steps of: processing said fragments sequentially, wherein each fragment having a processing index that corresponds to the sequential processing of that fragment; processing each of said fragments until a termination upon the meeting of a first pre-defined condition; assigning a timer to an un-terminated fragment having the lowest processing index; starting said timer having a timeout value; and running said timer until the processing of said un-terminated fragment is terminated. The methods of this invention use only one timer for each connection and therefore reduce memory and operational needs in the management of the data fragments that are being received or transmitted.

Abstract: Receiving an indication of a frequency ratio of first and second clocks; generating an indication of a number of clock pulses of the second clock occurring between first and second clock pulses of the first clock; and generating an indication of a time offset between (1) a clock pulse of the second clock occurring between the second clock pulse and a third clock pulse of the first clock, and (2) the second clock pulse of the first clock. Also, receiving an input data word representing a fractional number, a first part of the input data word comprising an integer portion of the fractional number and a second part comprising a decimal portion of the fractional number; providing a first output data word that is either the first part of the input data word or an increment by one of the first part; and providing a second output data word that is an integer multiple of the second part.

Abstract: To provide a semiconductor device including a data input circuit and a data output circuit connected to a plurality of data input/output terminals, where at least one of the data input circuit and the data output circuit fetches data in response to multi-phase clock signals having different phases to be timing signals for fetching data, and adjusts a valid range for fetching data to be substantially uniform for each of the multi-phase clock signals. According to the present invention, the window width of data can be made uniform by individually adjusting the multi-phase clock signals that are input or output timing signals, and thus characteristics of the semiconductor device can be improved.

Abstract: An installation and configuration system consolidates workloads of multiple applications and services, including applications or services that may be installed or configured on multiple server devices or remotely hosted services. The system gathers environmental information, analyzes dependencies among the workloads, and populates the input data used by the workloads from a common database. The system then executes the workloads, allowing branching within the workloads or the sequence of workloads. An example of branching may include detecting an error condition, pausing the sequence, and presenting alternative fixes to a user.

Abstract: Methods and apparatus involve file systems for virtual machines and image deltas. Representatively, a plurality of virtual machines are configured on a hardware platform and a file system includes both a read-only portion and a writable portion that together provides the entire file system for each virtual machine. Also, a union of the two portions provides an incremental snapshot of its corresponding virtual machine and can be used to restore the virtual machine upon a failure event. In content, the read-only portion contains substantially immutable information such as core basic system image, while the writable portion contains configuration information, state data and production information. An available storage device for the virtual machines is partitioned for each virtual machine and its corresponding writable portion is found therein. Other features contemplate particular configurations and computer program products, to name a few.

Abstract: An integrated circuit includes a plurality of processing stages each including processing logic 1014, a non-delayed signal-capture element 1016, a delayed signal-capture element 1018 and a comparator 1024. The non-delayed signal-capture element 1016 captures an output from the processing logic 1014 at a non-delayed capture time. At a later delayed capture time, the delayed signal-capture element 1018 also captures a value from the processing logic 1014. An error detection circuit 1026 and error correction circuit 1028 detect and correct random errors in the delayed value and supplies an error-checked delayed value to the comparator 1024. The comparator 1024 compares the error-checked delayed value and the non-delayed value and if they are not equal this indicates that the non-delayed value was captured too soon and should be replaced by the error-checked delayed value.