With Robot Arm Connected By Doors To Plural Other Chambers (i.e., Cluster Tool) Patents (Class 156/345.32)
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Patent number: 6599368Abstract: A semiconductor manufacturing equipment wherein degas chamber(s) are integrated to the conventional pass-through chamber location. A preferred embodiment for depositing Cu barrier and seed layers on a semiconductor wafer comprises a front opening unified pod(s), a single wafer load lock chamber(s), a degas chamber(s), a preclean chamber(s), a Ta or TaN process chamber(s), and a Cu process chamber(s). The degas chamber is integrated to a pass-through chamber. Such system may achieve system throughput higher than 100 wafers per hour.Type: GrantFiled: October 5, 2000Date of Patent: July 29, 2003Assignee: Applied Materials, Inc.Inventors: Ratson Morad, Ho Seon Shin
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Publication number: 20030136515Abstract: Two load lock chambers 130 and 132 are arranged between a first transfer chamber 122 and a second transfer chamber 133. Each of the load lock chambers is capable of accommodating a single wafer W. The first transfer chamber 122 is provided with a first transfer unit 124 having two substrate holders 124a, 124b each capable of holding a single object to be processed, in order to transport the wafer W among a load port site 120, the first load lock chamber 130, the second load lock chamber 132 and a positioning unit 150. The second transfer chamber 133 is provided with a second transfer unit 156 having two substrate holders 156a, 156b each capable of holding the single object to be processed, in order to transport the wafer between the first load lock chamber 130, the second load lock chamber 132 and respective vacuum processing chambers 158 to 164. Since the volume of each load lock chamber can be minimized, it is possible to perform the prompt control of atmospheres in the load lock chambers.Type: ApplicationFiled: March 5, 2003Publication date: July 24, 2003Inventors: Hiroaki Saeki, Keiichi Matsushima, Teruo Asakawa, Masaki Narushima
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Publication number: 20030106642Abstract: A method and apparatus for processing a semiconductor wafer to reduce CD variation feeds back information gathered during inspection of the wafer to a previously visited processing tool and feeds forward information to adjust the next process the wafer will undergo. The inspection and processing are performed at a single processing module without exposing the wafer to ambient atmospheric conditions. Embodiments include removing a wafer from a wafer cassette, and measuring a dimension of a feature on the surface of the wafer, such as the feature's CD using an optical measuring tool. A process, such as an etch process, is then performed on the wafer using a set of process parameter values, such as an etch recipe, selected based on the CD measurement, and the wafer is returned to a cassette. The CD measurements are also linked to photolithography adjustable parameters such as stepper focus and exposure settings.Type: ApplicationFiled: November 25, 2002Publication date: June 12, 2003Applicant: APPLIED MATERIALS, INC.Inventors: Kevin P. Fairbairn, Bo Su
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Patent number: 6565662Abstract: A plasma etching apparatus includes a process container formed of a container main body and an upper casing combined with each other. A detaching device is provided to move the upper casing between a mounted position where the upper casing is put on the container main body, and a retreated position where the upper casing is removed from the container main body. The detaching device supports the upper casing to be rotatable, movable up and down, and movable in a lateral direction, relative to the container main body. The retreated position is arranged such that the upper casing does not interfere with the container main body when the upper casing is rotated there.Type: GrantFiled: December 20, 2000Date of Patent: May 20, 2003Assignee: Tokyo Electron LimitedInventors: Kenji Amano, Yoshitsugu Tanaka
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Patent number: 6562141Abstract: A cluster tool includes a block which is formed with an inner high vacuum chamber, at least two loadlock chambers that are in fluid communication with the high vacuum chamber, and at least two slot valves for selectively isolating each loadlock chamber from the high vacuum chamber. The cluster tool also includes a high vacuum pump that is connected to the high vacuum chamber and a water pump comprising a refrigeration unit and a cryoplate. The cryoplate is cooled by the refrigeration unit and projects into the high vacuum chamber between the loadlock chambers. Selective operation of the slot valves allows a single water pump to serve a plurality of loadlock chambers. Each loadlock chamber includes a refrigerated platen that projects into the loadlock chamber, a heat lamp assembly that radiates into the loadlock chamber, and a tray for holding the wafer therein. The platen has a cooling system for selectively cooling the wafer, and selective radiation of the heat lamp assembly degasses the wafer.Type: GrantFiled: March 5, 2001Date of Patent: May 13, 2003Inventor: Andrew Peter Clarke
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Patent number: 6558506Abstract: The present invention provides an etching system having a plurality of etching chambers (16, 18, 20) disposed about a transfer chamber (14), wherein the etching chambers are adapted to be selectively mounted at different positions with respect to the transfer chamber.Type: GrantFiled: October 24, 2001Date of Patent: May 6, 2003Assignee: Tokyo Electron LimitedInventors: Richard J. Freeman, Jay R. Wallace, Yoichi Kurono, Arthur H. Laflamme, Jr., Louise Smith Barriss, Tadashi Onishi
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Publication number: 20030066606Abstract: A dual wafer position loadlock chamber for a cluster tool includes a block which defines the chamber, a platen that projects into the chamber, a heat lamp assembly that radiates into the loadlock chamber and a plurality of rails for positioning a wafer within the chamber. The platen selectively cools the wafer and includes a bell portion located within the loadlock chamber. The heat lamp assembly is mounted to the block across the chamber from the bell portion. The rails extend into the loadlock chamber around the bell portion, and an upper flange and lower flange extend perpendicularly from each rail. During cooling operations, the wafer is placed on the upper flanges, which positions the wafer immediately proximate the bell portion for cooling the wafer. During degassing operations, the wafer is placed on the lower flanges and the heat lamp assembly illuminates and establishes a focal plane of uniform radiation intensity which is co-planar with the wafer.Type: ApplicationFiled: November 8, 2002Publication date: April 10, 2003Inventor: Andrew P. Clarke
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Patent number: 6540869Abstract: A semiconductor processing system comprises a first vacuum processing unit and a second vacuum processing unit connected thereto. The first and second vacuum processing units respectively comprise I/O transfer chambers. Casings of the transfer chambers are connected to each other, and a common transfer robot is arranged in the casings. The transfer robot is moved along horizontal guide rails and formed by connecting rails of the transfer chambers. A rail adjusting mechanism is provided to obtain linearity of the horizontal rails.Type: GrantFiled: June 1, 2001Date of Patent: April 1, 2003Assignees: Tokyo Electron Limited, Shinko Electric Co., Ltd.Inventors: Hiroaki Saeki, Yasushi Taniyama
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Patent number: 6537415Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: GrantFiled: August 31, 2001Date of Patent: March 25, 2003Assignee: Hitachi, Ltd.Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara
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Patent number: 6537417Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: GrantFiled: November 2, 2001Date of Patent: March 25, 2003Assignee: Hitachi, Ltd.Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara
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Publication number: 20030051812Abstract: A subtract such as a semiconductor wafer, a glass substrate, or a liquid crystal display is polished to a flat mirror finish, and then is cleaned to a high degree of cleanliness. A polishing section having at least one polishing unit performs primary polishing and secondary polishing of the substrate by pressing the substrate against a polishing surface. A cleaning section cleans the substrate which has been polished to remove particles attached to the substrate by a scrubbing cleaning. Metal ions are removed from the substrate by supplying an etching liquid.Type: ApplicationFiled: October 30, 2002Publication date: March 20, 2003Inventors: Hiroshi Sotozaki, Koji Ato
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Publication number: 20030052079Abstract: A method of processing specimens, an apparatus therefor, and a method of manufacture of a magnetic head are provided wherein a complicated conventional post processing step for removing corrosion products is eliminated by a corrosion prevention processing for removing only a residual chlorine compound produced in the gas plasma etching. More specifically, the method is comprised of the steps of: forming a lamination film including a seed layer made of NiFe alloy, an upper magnetic pole made of NiFe alloy connected to the seed layer, a gap layer made of oxide film in close contact with the seed layer, and a shield layer made of NiFe alloy in close contact with the gap layer; plasma-etching the seed layer with a gas which contains chlorine using the upper magnetic pole as a mask; and after that removing the residual chlorine compound by a plasma post treatment with a gas plasma which contains H2O or methanol.Type: ApplicationFiled: October 25, 2002Publication date: March 20, 2003Inventors: Ken Yoshioka, Yoshimi Torii, Moriaki Fuyama, Tomohiro Okada, Saburou Kanai, Takehito Usui, Hitoshi Harata
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Publication number: 20030041970Abstract: A system and method for processing plural wafers in a plasma processing system using a single upper electrode. By placing plural wafer holders into a single plasma processing chamber, the footprint of a resulting plasma chamber may be made smaller than the total footprint of an equivalent number of individual chambers. Moreover, pumping may be increased by placing plural pumps below the wafer holders, and preferably in positions not obstructed by the wafer holders.Type: ApplicationFiled: August 29, 2002Publication date: March 6, 2003Applicant: TOKYO ELECTRON LIMITEDInventor: Steven T. Fink
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Publication number: 20030029833Abstract: A method and system for stripping a photoresist layer quickly. A pre-processing element (e.g., a pre-heater, pre-cooler, or pre-clamper) is integrated into a load lock chamber to increase throughput of the system. While a first wafer is processed inside a processing chamber, a second wafer is pre-processed using the pre-processing element.Type: ApplicationFiled: September 3, 2002Publication date: February 13, 2003Inventor: Wayne L Johnson
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Publication number: 20030021657Abstract: A semiconductor-manufacturing device is equipped with a load-lock chamber and a reactor, which are directly connected, wherein a semiconductor wafer is transferred by a transferring arm provided inside the load-lock chamber from the load-lock chamber onto a susceptor provided inside the reactor. The device includes a buffer mechanism for keeping a semiconductor wafer standing by inside the reactor. The buffer mechanism includes at least two supporting means, which are provided around the susceptor to support the semiconductor wafer and which rotate in a horizontal direction, a shaft means for supporting the supporting means in a vertical direction, a rotating mechanism for rotating the supporting means coupled to the shaft means, and an elevating means for moving the shaft means up and down.Type: ApplicationFiled: July 1, 2002Publication date: January 30, 2003Applicant: ASM JAPAN K.K.Inventor: Takayuki Yamagishi
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Patent number: 6508883Abstract: A semiconductor substrate processing system, including a single wafer reactor and a multi-wafer holder positionable in the reactor. The system also optionally includes an automated substrate transport assembly including a multi-wand array for transporting a corresponding plurality of wafers into and out of the reactor, and a multi-wafer cassette for simultaneously supplying multiple wafers to the multi-wand array. The multi-wafer modifications permit ready upgradeability to an existing single wafer reactor and markedly enhance the throughput capacity of the reactor while retaining the film uniformity and deposition process control advantages of the single wafer reactor system.Type: GrantFiled: April 29, 2000Date of Patent: January 21, 2003Assignee: Advanced Technology Materials, Inc.Inventor: Michael J. Tanguay
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Patent number: 6503365Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a cleanroom by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.Type: GrantFiled: January 26, 1999Date of Patent: January 7, 2003Assignee: Samsung Electronics Co., Ltd.Inventors: Ki-sang Kim, Gyu-chan Jeoung, Gyu-hwan Kwag
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Publication number: 20030000645Abstract: The present invention provides a unitary apparatus for manufacturing capacitor stacks to integrated circuits, the apparatus including a central wafer transfer chamber having a wafer transfer robot positioned therein and a wafer preparation chamber in communication with the central wafer processing chamber. The apparatus further includes a low thermal budget destabilizing chamber in communication with the central wafer transfer chamber and at least one wafer processing chamber in communication with a central wafer transfer chamber for depositing a dielectric layer on a wafer. The apparatus is configured so that the wafer preparation chamber and the low thermal budget destabilizing chamber cooperatively generate a first dielectric layer on a base electrode of a capacitor stack having minimal interface defects therebetween.Type: ApplicationFiled: June 27, 2001Publication date: January 2, 2003Inventor: Charles N. Dornfest
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Patent number: 6499427Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: August 24, 2001Date of Patent: December 31, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Publication number: 20020185224Abstract: In accordance with the present invention, a system for planarizing a substrate in fabricating semiconductor devices is provided. The system comprises at least two different types of polishing module which are arranged in an arbitrary sequence beginning with a first polishing module and ending with a last polishing module, means for transferring the substrate between the polishing modules, a load station, and an unload station. The load station is for loading the transferring means with the substrate prior to starting polishing at the first polishing module, and the unload station is for unloading the substrate from the transferring means after ending polishing at the last polishing module. A method for planarizing a substrate in fabricating semiconductor devices by using a polishing system is also provided.Type: ApplicationFiled: August 2, 2002Publication date: December 12, 2002Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chia-Lin Hsu, Shao-Chung Hu, Teng-Chun Tsai
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Publication number: 20020170673Abstract: A wafer susceptor for use in a substrate processing system, comprising of at least one recess formed therein, with each recess arranged and configured to hold at least one substrate therein, wherein a combination of the wafer holder and said at least one substrates form a composite substrate having uniform processing characteristics.Type: ApplicationFiled: December 26, 2001Publication date: November 21, 2002Inventor: Michael J. Tanguay
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Publication number: 20020155629Abstract: A method and apparatus for processing a semiconductor wafer to reduce CD variation feeds back information gathered during inspection of the wafer to a previously visited processing tool and feeds forward information to adjust the next process the wafer will undergo. The inspection and processing are performed at a single processing module without exposing the wafer to ambient atmospheric conditions. Embodiments include removing a wafer from a wafer cassette, and measuring a dimension of a feature on the surface of the wafer, such as the feature's CD using an optical measuring tool. A process, such as an etch process, is then performed on the wafer using a set of process parameter values, such as an etch recipe, selected based on the CD measurement, and the wafer is returned to a cassette. The CD measurements are also linked to photolithography adjustable parameters such as stepper focus and exposure settings.Type: ApplicationFiled: July 10, 2001Publication date: October 24, 2002Inventors: Kevin P. Fairbairn, Bo Su
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Patent number: 6467491Abstract: A pretreatment chamber 120 is disposed within a vacuum transfer chamber 102 of a processing apparatus 100. The pretreatment chamber 120 is equipped with an orienting mechanism 128 and a UV lamp 124. The orienting mechanism 128 orients a wafer W through rotation of a table 130, on which the wafer W is placed, and by use of an optical sensor 134. Synchronously with the orientation, the UV lamp 124 emits UV through a UV transmission window 126 fitted to a ceiling portion of the pretreatment chamber 120, to thereby irradiate the surface of the wafer W with UV. Thus adhering to the wafer W is removed. A processing gas supplied into the pretreatment chamber 120 is also irradiated with UV. Active atoms generated from the processing gas also contribute to removal of carbon. Since the pretreatment chamber 120 is formed within the vacuum transfer chamber 102, the footprint of the processing apparatus can be reduced.Type: GrantFiled: August 3, 2000Date of Patent: October 22, 2002Assignee: Tokyo Electron LimitedInventors: Masahito Sugiura, Hiroshi Shinriki, Hideki Kiryu, Shintaro Aoyama
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Publication number: 20020144782Abstract: A robot arm mechanism includes a handling member for supporting and handling an object, a robot arm made up of a plurality of links, and a robot arm driving mechanism for driving the robot arm to assume its contracted and extended position. The robot arm comprises first and second arm links, a link retaining mechanism pivotably retaining the first and second arm links and a link operating mechanism to operate one of the first and second arm links by a motion of the other of the first and second arm links. The link operating mechanism comprises a crank, a coupling link and a connecting link. The crank integrally connected to the coupling link is pivotably connected to one of the first and second arms and to the link retaining mechanism. The connecting link is pivotably connected to the other of the first and second arms. This leads to the advantage that the robot arms can be contracted and extended and rotated by only two electric motors.Type: ApplicationFiled: April 4, 2002Publication date: October 10, 2002Inventors: Chohei Okuno, Hiroki Mori, Tetsuya Watanabe
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Patent number: 6461437Abstract: An apparatus for manufacturing a liquid crystal display device that can prevent chemical contamination attributed to contacting an external atmosphere, and a method of manufacturing the liquid crystal display device. The apparatus includes a cleaning chamber, a film deposition chamber for depositing a film on a layer cleaned in the cleaning chamber, and a transporter for transporting a substrate from the cleaning chamber to the film deposition chamber while preventing the substrate from being exposed to the external atmosphere.Type: GrantFiled: November 20, 2000Date of Patent: October 8, 2002Assignees: Mitsubishi Denki Kabushiki Kaisha, Seiko Epson CorporationInventors: Takeshi Kubota, Norikazu Komatsu
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Publication number: 20020134310Abstract: A plasma treatment system in which untreated workpieces are serially received one at a time on an infeed table but stored in parallel on the infeed table. The untreated workpieces are transferred simultaneously, in parallel, into a plasma treatment chamber. Thereafter, treated workpieces are transferred simultaneously, in parallel, out of the plasma treatment chamber onto an outfeed table; and the outfeed table serially discharges the treated workpieces one at a time from the outfeed table.Type: ApplicationFiled: October 31, 2001Publication date: September 26, 2002Inventors: Robert S. Condrashoff, James P. Fazio, David E. Hoffman, James S. Tyler
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Publication number: 20020137346Abstract: An integrated workpiece vacuum processing system for processing semiconductor workpieces is provided using a stacked chamber design. The processing system comprises a multiple chamber support unit having a plurality of processing chamber support bays arranged in rows and columns wherein a vacuum processing chamber module is received in each support bay and a transfer chamber is coupled to the plurality of processing chamber modules.Type: ApplicationFiled: March 12, 2001Publication date: September 26, 2002Applicant: APPLIED MATERIALS. INC.Inventors: Gary R. Donaldson, William Wang
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Publication number: 20020129900Abstract: A method of processing specimens, an apparatus therefor, and a method of manufacture of a magnetic head are provided wherein a complicated conventional post processing step for removing corrosion products is eliminated by a corrosion prevention processing of the invention for removing only a residual chlorine compound produced in the gas plasma etching. More specifically, the method of the invention is comprised of the steps of: forming a lamination film including a seed layer made of NiFe alloy, an upper magnetic pole made of NiFe alloy connected to the seed layer, a gap layer made of oxide film in close contact with the seed layer, and a shield layer made of NiFe alloy in close contact with the gap layer; plasma-etching the seed layer with a gas which contains chlorine using the upper magnetic pole as a mask; and after that removing the residual chlorine compound by a plasma post treatment with a gas plasma which contains H2O or methanol.Type: ApplicationFiled: January 28, 2000Publication date: September 19, 2002Inventors: Ken Yoshioka, Yoshimi Torii, Moriaki Fuyama, Tomohiro Okada, Saburou Kanai, Saburou Kanai, Takehito Usui, Hitoshi Harata
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Publication number: 20020084033Abstract: Apparatus for processing multiple semiconductor wafers, includes a transfer chamber, a first processing chamber mounted in fixed relation to the transfer chamber and having a first wafer-holding platform with a center, a second processing chamber mounted in adjustable relation to the transfer chamber and to the first chamber and having a second wafer-holding platform with a center, and a robot rotatably mounted within the transfer chamber and having first and second wafer-holding arms spaced parallel to each other for inserting a pair of wafers simultaneously into the first and second chambers and for placing the wafers accurately centered over the respective platforms. The spacing of the platform centers is adjusted relative to the spacing of the robot arms such that the wafers are centered and placed with a preselected degree of accuracy onto the respective platforms for efficient processing of the wafers.Type: ApplicationFiled: January 4, 2001Publication date: July 4, 2002Inventors: Eric W. Schieve, Lawrence Chung-Lai Lei