Screw Or Bayonet Type Patents (Class 174/202)
  • Patent number: 8807241
    Abstract: Various embodiments are directed to a method and apparatus for horizontal directional drilling with a tool library. Various methods include storing a plurality of operational tool profiles in memory, the operational tool profiles of the plurality respectively associated with a plurality of boring tools attachable to a drill string for HHD and each of the operational tool profiles of the plurality including operating parameters for the boring tool of the plurality with which the operational profile is associated, and selectively displaying the operational tool profiles on a display screen based on user input.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: August 19, 2014
    Assignee: Vermeer Manufacturing Company
    Inventor: Philip R. Lane
  • Patent number: 6671951
    Abstract: In manufacturing a double-layered or a multi-layered printed wiring board, a layer of metamorphic substance, which is created by transmuting a substrate material, is formed on an inner wall of a hole during a perforation process of the substrate utilizing radiation energy. The layer of metamorphic substance prevents conductive materials constituting electrical connection means formed on the inner wall of the hole from dispersing over a surface of the substrate or permeating into the substrate.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: January 6, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hidenori Hayashi, Toru Fujimoto, Toshiharu Okada, Izuru Nakai
  • Patent number: 6571468
    Abstract: A method for forming a fine-pitch flip chip assembly interconnects fine pitch devices after they have been connected to a carrier substrate. A die having a plurality of conductive sections, such as solder balls, is attached to a conductive layer of the substrate. An interconnect pattern is then formed in the conductive layer to connect the conductive sections and generate electronic functionality to the assembly. By forming the interconnect pattern after the device have been connected to the carrier, the invention provides precise alignment between the devices and the interconnect pattern without actually aligning the two components during the assembly process.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: June 3, 2003
    Assignee: Saturn Electronics & Engineering, Inc.
    Inventors: Timothy Patterson, John Burke
  • Patent number: 6515237
    Abstract: A through-hole wiring board comprising through-holes passing through a substrate and filled with an electroconductive material; copper toil lands and copper foil circuits formed on surfaces of the substrate; insulating layers formed on the copper toil circuits and between necessary portions of the copper foil lands and the copper foil circuits; and printed circuits (jumper circuits) formed by another electroconductive material having a different composition from that filling the through-holes on a part of the copper foil circuits, and the copper foil lands and the insulating layers except for unnecessary portions for electroconductivity; wherein the printed circuits and ends of the through-holes are electrically connected with an electroconductive material having a different composition from that filling the through-holes, permits easy formation of an electrical connection of the through-holes, has a high reliability on connection and is suitable for industrial production.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: February 4, 2003
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Junichi Kikuchi, Kuniaki Sato, Hideji Kuwajima
  • Patent number: 6469259
    Abstract: A wiring board of the present invention readily controls a power source voltage and unwanted irradiation noises developed across a power source layer and a ground layer over a broad range of frequencies with a simple arrangement. The wiring board has an on-board surface on the surface of a dielectric substrate, on which a semiconductor device or the like is mounted, and a power source layer and a ground layer, which are made of a conductor material principally composed of at least one kind of element selected from Cu, W, and Mo, are provided on the back surface of the dielectric substrate or within the same. The periphery of at least one of low resistance areas of the power source layer and ground layer, respectively is provided with a corresponding high resistance area having a higher sheet resistance than that of the respective low resistance areas.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: October 22, 2002
    Assignee: Kyocera Corporation
    Inventors: Yoshihiro Takeshita, Shinya Terao, Satoru Takenouchi, Masaki Kaji, Ryuji Koga
  • Patent number: 6465729
    Abstract: A method for producing an electrical feedthru wherein a thin liquid conductive film is deposited into a shallow trough of an insulating machinable substrate. The conductive film and substrate are fired and then the resulting bound composite is ground flush with the adjacent surface of the insulating machinable substrate. The surface cohesion of the fired composite, and the resulting high quality surface finish of the grinding operation, combined with an elastomeric seal, create low leakage barriers capable of supporting a pressure differential while allowing isolated electrical conduction across a pressure or vacuum envelope. The method produces a space saving feedthru which allows a high signal line density in a limited space, is relatively simple to assemble, allows for disassembly rework, can be ‘designed into’ unique geometries of varied applications, and which has a single O-ring sealing across all traces.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: October 15, 2002
    Assignee: University of New Hampshire
    Inventors: Mark S. Granoff, Phillip D. Demaine, David Broderick, Stephen Ingemi
  • Patent number: 6297459
    Abstract: A low dielectric constant printed circuit board includes: a low dielectric constant porous polymer layer having holes therethrough, the porous layer having pores; and a patterned metallization layer over surfaces of the low dielectric constant porous polymer layer and surfaces of the holes, the patterned metallization layer not significantly protruding into the pores of the porous layer.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: October 2, 2001
    Assignee: General Electric Company
    Inventors: Robert John Wojnarowski, Herbert Stanley Cole, Theresa Ann Sitnik-Nieters, Wolfgang Daum
  • Patent number: 6259037
    Abstract: The present invention provides an organic chip carrier particularly useful with flip chips. The chip carrier comprises an organic dielectric layer, a first layer of circuitry disposed on the dielectric layer, an organic conformational coating disposed over the first layer of dielectric and the first layer of circuitry, and a layer of fine line circuitry. The fine line circuitry has a line width of about 2.0 mil or less, preferably about 1.0 mil or less, and more preferably about 0.7 mil, and a space between lines of about 1.5 mil or less, preferably about 1.1 mil or less. Preferably the dielectric layer is free of woven fiber glass. The conformational coating preferably has a dielectric constant of about 1.5 to about 3.5, and a percent planarization of greater than about 30%. The invention also relates to methods of making the dielectric coated chip carrier.
    Type: Grant
    Filed: October 4, 1999
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Natalie Barbara Feilchenfeld, John Steven Kresge, Scott Preston Moore, Ronald Peter Nowak, James Warren Wilson
  • Patent number: 6235991
    Abstract: An assembly including a back plate and a circuit board coupled to the back plate with mechanical fasteners is provided. The fastener has an end and a head with a top surface. The top surface of the head is between the top and bottom surfaces of the circuit board, inclusively, such that the head is either below or flush with the top surface of the circuit board. This allows solder to be deposited onto the circuit board with an automated surface mounted assembly system and components to be attached to the circuit board after the circuit board is attached to back plate. The circuit board has an opening that receives the head of the fastener. A portion of this opening has a diameter as large as the diameter of the widest portion of the head and another portion of this opening, located closer to the back plate has a smaller diameter.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: May 22, 2001
    Assignee: Lucent Technologies Inc.
    Inventor: Michael Gunnar Johnson
  • Patent number: 5119544
    Abstract: A tool for keeping an insulating member from turning comprising a base having a structure defining a recess for receiving and preventing an insulating member from turning when a bolt member is screwed into the insulating member; and an upright back secured to the base for supporting the base in a predetermined position. A method for securing a bolt to an insulator comprising inserting the insulator into the recess, and securing a bolt to the insulator while the insulator remains steadfastly in the recess.
    Type: Grant
    Filed: December 17, 1990
    Date of Patent: June 9, 1992
    Inventor: James J. Jackson
  • Patent number: 4940857
    Abstract: The insulator, preferably made of porcelain, is of the type comprising a lower bell-shaped portion, an intermediate annular, waist portion and an upper saddle portion for receiving and supporting an electric transmission overhead wire. The insulator is of the type having an axial blind bore opening at its lower end for receiving an upstanding support pin. The saddle portion includes a transversely-curved groove substantially normal to the axial bore and jutting parts on each side of the wire-receiving groove and laterally protruding from the waist portion. Each jutting part has an external face which is provided with a partly annular groove, generally coaxial with the bore and of greater radius than that of the waist portion. These annular grooves are adapted to positively retain the inturned flanges of a wire-retaining clamp despite an upward force or a laterally-upwardly-directed force exerted by the wire on the clamp. The waist portion can still be used for attaching the electric wire by a tie-wire.
    Type: Grant
    Filed: August 15, 1989
    Date of Patent: July 10, 1990
    Inventor: Pierre R. Giroux
  • Patent number: 4339630
    Abstract: An adapter for retaining a conductive rod within a high voltage bushing insulator is disclosed. The adapter is crimped onto parallel slots of the conductive rod and located within a cavity of the insulator. The crimped adapter prevents radial, axial, and angular movement of the conductive rod relative to the insulator.
    Type: Grant
    Filed: June 8, 1981
    Date of Patent: July 13, 1982
    Assignee: General Electric Company
    Inventor: Edgar E. McQuay
  • Patent number: 4047279
    Abstract: A method is disclosed for upgrading insulators of a current distribution system when the voltage of the system is to be increased. New, additional insulators are coupled with the existing ones, and the coupling is accomplished without detachment of the current conductor from the existing insulator. The mounting stud for the existing insulator is unsecured from a support member, such as a crossarm, is detached from the existing insulator, and is thereafter attached to a new, additional insulator. The two insulators are then coupled together to provide increased electrical insulation, and the mounting stud is resecured to the supporting member. Time and materials are saved by not having to detach and reattach the conductor, and by reusing the existing insulator, the conductor attachment means, and the mounting stud.
    Type: Grant
    Filed: October 26, 1976
    Date of Patent: September 13, 1977
    Assignees: W. Leon Sell, Ernest E. Pettit, R. Don Sell
    Inventor: Ernest E. Pettit