Abstract: A power module having a packaging structure includes a substrate having a first conductive area, a second conductive area, a third conductive area, a first fixing area and a second fixing area. The first, the second and the third conductive areas are electrically connected to a first terminal, a second terminal and a third terminal, and the first and the second fixing areas are electrically connected to a first switch set and a second switch set, so that they are in a parallel arrangement. The first terminal is a current input end, the second terminal is an intermediate end, and the third terminal is a current output end. When a current flows from the current input end to the intermediate end, or from the intermediate end to the current output end, the current flows straightly in order to reduce a crossover area and lower the stray inductance.

Abstract: A temperature sensitive element in a temperature sensor includes a covering member formed from alumina and aluminosilicate glass, and the volume ratio of the alumina to the aluminosilicate glass (the alumina/the aluminosilicate glass) in the covering member is 30 vol %/70 vol %. The aluminosilicate glass contained in the covering member is high heat-resistant glass having a softening point of 900° C. or higher. The covering member can hold output lines and pads and can restrain separation of the output lines from the pads and separation of the pads from a ceramic substrate even in an environment of higher temperature as compared with the case where the covering member is formed of the aluminosilicate glass only.

Abstract: A wired circuit board includes a metal pedestal portion formed from a metal material that is the same as the material of the metal supporting board at the pad portion, a pedestal opening formed by opening the metal pedestal portion, a lower conductive layer disposed on one side in the thickness direction of the metal pedestal portion as the first conductive layer, and an upper conductive layer as the second conductive layer formed on one side in the thickness direction of the lower conductive layer as the first conductive layer, wherein one of the lower conductive layer as the first conductive layer and the upper conductive layer as the second conductive layer is disposed in the pedestal opening when projected in the thickness direction, and the periphery of the other is disposed outside of the pedestal opening when projected in the thickness direction.

Abstract: A circuit board comprises a plurality of layers, first and second reference conductive vias extending in a vertical direction through at least a portion of the plurality of layers, first and second signal conductive vias extending in the vertical direction between and spaced apart in a horizontal direction from the first and second reference conductive vias through at least a portion of the plurality of layers, and a dielectric region extending in the vertical direction between the first and second signal conductive vias. An air via extends in the vertical direction through the dielectric region between the first and second signal conductive vias. An anti-pad extends in the horizontal direction between the first and second reference conductive vias and surrounding in the horizontal direction the first and second signal conductive vias, the air via, and the dielectric region.

Abstract: A printed wiring board includes a resin insulating layer having recess portions formed on first surface, a first conductor layer formed in the recess portions and including pads positioned to mount an electronic component, conductive pillars formed on the pads, respectively, and formed to mount the electronic component onto the resin insulating layer, a second conductor layer formed on second surface of the resin insulating layer on the opposite side with respect to the first surface, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the first and second conductor layers. The pillars is formed such that each of the pads has an exposed surface exposed from a respective one of the conductive pillars, and the pads are formed such that the exposed surface is recessed from the first surface of the resin insulating layer.

Abstract: Sheets are laminated on each other and pressure bonded with fixtures from upper and lower directions of a lamination direction while being heated to produce a laminated circuit substrate including therein a capacitor and a coil. The capacitor is defined by a first conductor pattern and a second conductor pattern that face each other across thermoplastic resin layers. In the laminated circuit substrate, the first conductor pattern includes a first principal surface, the second conductor pattern includes a second principal surface, the first principal surface faces the second conductor pattern, the second principal surface faces the first conductor pattern, and the first principal surface and the second principal surface are subject to a roughening process.

Abstract: A method of manufacturing a package structure is provided, including forming a first wiring layer on a carrier board, forming up plurality of first conductors on the first wiring layer, forming a first insulating layer that encapsulates the first wiring layer and the first conductors, forming a second wiring layer on the first insulating layer, forming a plurality of second conductors on the second wiring layer, forming a second insulating layer that encapsulates the second wiring layer and the second conductors, and forming at least an opening on the second insulating layer for at least one electronic component to be disposed therein. Since the first and second insulating layers are formed before the opening, there is no need of stacking or laminating a substrate that already has an opening, and the electronic component will not be laminated and make a displacement. Therefore, the package structure thus manufactured has a high yield rate. The present invention further provides the package structure.

Abstract: A method of producing a multilayer element with a substrate and at least one conductor structure connected in an areal manner to the substrate, which has first regions of electrically conductive material present in accordance with a prescribed pattern, electrically non-conductive second regions lying between the first regions to produce RFID antennas or flexible printed circuit boards in a roller-to-roller process, the method including connecting a conductor foil to the substrate by a laterally structured layer of adhesive lying in between such that in first regions a partial bonding contact between the substrate and the conductor foil is created at a multiplicity of bonding zones, and in laterally extended second regions the conductor foil is not connected or is connected less firmly by adhesive to the substrate; structuring the conductor foil by cutting the conductor foil along boundaries of the first regions; and removing contiguous pieces of foil of the conductor foil from laterally extended second region

Abstract: The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower surface and the upper surface. A first wiring layer is formed on the lower surface of the insulation layer. A second wiring layer is formed on the intermediate surface of the insulation layer. A recess is formed in the upper surface of the insulation layer. The recess overlaps, in a plan view, a first through hole that extends through the insulation layer. The first through hole is filled with a via wiring, which is formed integrally with the first wiring layer. A bump is formed integrally with the via wiring and projected into the recess. An upper end surface of the bump is located above an upper surface of the second wiring layer.

Abstract: A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.

Abstract: A multi-layer printed circuit board comprises: a core comprising a core insulation layer and traces formed on two sides of the core insulation layer; a plurality of insulation layers sequentially formed at two sides of the core; and a plurality of trace layers respectively formed between two insulation layers and on the outmost insulation layers; wherein the core insulation layer contains a resin material different from that of the insulation layers, such that the core insulation layer has a dimensional stability superior to that of the insulation layers.

Abstract: A printed wiring board includes a core laminate including insulating layers and conductor layers, a first build-up layer formed on first surface of the laminate and including first interlayer resin and conductor layers, and a second build-up layer formed on second surface of the core laminate on the opposite side and including second interlayer resin and conductor layers. The conductor layers in the laminate include first and second conductor layers such that the first conductor layer is embedded in one of the insulating layers forming the first surface of the laminate and has an exposed surface exposed from the insulating layer and that the second conductor layer is formed on one of the insulating layers forming the second surface of the laminate, and the first interlayer resin layer has thickness greater than thickness of the second interlayer resin layer.

Abstract: A warp controlled package includes a substrate that assumes a warped configuration according to the application of heat. At least one device is coupled along the substrate. A plurality of electrical contacts extend between at least the device and the substrate. One or more counter moment elements are coupled with the substrate. The one or more counter moment elements include a passive configuration and a counter moment configuration. In the counter moment configuration the one or more counter moment elements are configured to apply a counter moment to the substrate to counteract the warped configuration. In the passive configuration the one or more counter moment elements are configured to apply a neutral counter moment less than the counter moment of the counter moment configuration.

Abstract: A transparent conductive film. The film comprises a transparent polymer comprising fused latex polymer particles. A plurality of nanowires comprising silver are partially dispersed in the transparent polymer. Devices employing the transparent conductive film and methods of making the devices are also disclosed.

Abstract: The present invention (i) uses a mask unit (80) including: a shadow mask (81) that has an opening (82) and that is smaller in area than a vapor deposition region (210) of a film formation substrate (200) and; a vapor deposition source (85) that has a emission hole (86) for emitting a vapor deposition particle, the emission hole (86) being provided so as to face the shadow mask (81), the shadow mask (81) and the vapor deposition source (85) being fixed in position relative to each other, (ii) adjusts an amount of a void between the shadow mask (81) and the film formation substrate (200), (iii) moves at least a first one of the mask unit (80) and the film formation substrate (200) relative to a second one thereof while uniformly maintaining the amount of the void between the mask unit (80) and the film formation substrate (200), and (iv) sequentially deposit the vapor deposition particle onto the vapor deposition region (210) through the opening (82) of the shadow mask (81).

Abstract: A conductive pattern including a teardrop shaped portion, a routing line, and a connection portion is provided. The routing line links to the teardrop shaped portion through the connection portion, and a width of the connection portion decreases along an extending direction from the teardrop shaped portion to the routing line. Furthermore, an integrated fan-out package including the above-mentioned conductive pattern is also provided.

Abstract: A metal core substrate is obtained as a result of outline shaping performed on a substrate including a core plate and an insulating layer provided on each of two surfaces of the core plate. An outer circumferential edge of the metal core substrate has an insulating structural portion, which includes an end surface of the core plate that is retracted from an end surface of the outer circumferential edge of the metal core substrate and an insulating covering portion covers the end surface of the core plate. Separation portions to be filled with the resin and coupling portions which are to be removed before outline shaping are formed at outline shaping positions of the core plate. At the time of outline shaping, only the resin is present at the outline shaping positions.

Abstract: A differential trace pair system includes a board having a first board structure member and a second board structure member. A differential trace pair in the board includes a first differential trace pair portion of a first width outside the board structure, and a second differential trace pair portion of a second width extending through the board structure. A first outer edge and a second outer edge of the second differential trace pair portion define the second width that is less than the first width. A first board structure member channel is defined by the first outer edge adjacent the first board structure member, a second board structure member channel is defined by the second outer edge adjacent the second board structure member and the first and second board structure member channels provide a third width of the second differential trace pair portion that is less than the second width.

Abstract: Semiconductor substrates with unitary vias and via terminals, and associated systems and methods are disclosed. A representative system in accordance with a particular embodiment includes a semiconductor substrate having an opening that includes a generally cylindrical portion with a generally smooth, uniform surface. The opening also includes a terminal portion extending transversely to the cylindrical portion and intersecting. A single, uniform, homogeneous volume of conductive material is disposed in both the cylindrical portion and the terminal portion of the opening, the conductive material forming a conductive path in the cylindrical portion and at least a portion of a conductive terminal in the terminal portion. The conductive terminal has a cross-section with generally flat walls aligned with crystal planes of the semiconductor substrate material. The conductive terminal projects away from the semiconductor substrate.

Abstract: In a particular embodiment, a device includes a substrate, a via that extends at least partially through the substrate, and a capacitor. A dielectric of the capacitor is located between the via and a plate of the capacitor, and the plate of the capacitor is external to the substrate and within the device.

Abstract: A composite transmission line includes a laminated insulator including insulator layers, signal transmission lines including first and second signal transmission lines and a power transmission line. The power transmission line includes a power transmission conductor pattern along the insulator layers, and an interlayer connection conductor that interlayer-connects power transmission conductor patterns. The first signal conductor pattern of the first signal transmission line, the second signal conductor pattern of the second signal transmission line, and the power transmission conductor pattern are parallel or substantially parallel to each other on the insulator layers that are mutually different from each other. The first and second signal conductor patterns interpose a first ground conductor in the laminating direction of the insulator layers. The power transmission line is in a side portion of the first signal conductor pattern.

Abstract: A method of manufacturing a ceramic package is provided. An electrically conductive paste is applied to an inside of the first hole and an inside of the second hole of a ceramic green sheet. A ceramic member including first and second electrically conductive members is formed by burning the ceramic green sheet. The ceramic member is divided so as to divide each of the first and second electrically conductive members. A distance between first and second connecting portions is smaller than each of a length of the first connecting portion in a first direction and a length of the second connecting portion in a second direction. The length of the first connecting portion in the first direction is larger than a length of the first connecting portion in a third direction. The length of the second connecting portion has a similar relation.

Abstract: A semiconductor device includes a semiconductor substrate, a conductive pad on the semiconductor substrate, and a conductor over the conductive pad. The semiconductor device further has a molding compound surrounding the semiconductor substrate, the conductive pad and the conductor. In the semiconductor device, the conductor has a stud shape.

Abstract: In a method for manufacturing a multilayer substrate for having a BGA-type component thereon, a conductive through hole for restricting a signal interference and a resist film are formed on the multilayer substrate, an occurrence of a fault caused by a residual of a resist in the conductive through hole is reduced. In the method for manufacturing the multilayer substrate for having the BGA-type component thereon, a step of forming the resist film includes an applying step of applying a photosensitive resist to an entirety of a front surface portion of a base. The applying step is performed while restricting the resist from entering the conductive through hole by supplying a high pressure air to a rear surface of the base to pass through the conductive through hole using an air supply mechanism.

Abstract: A circuit board includes a first insulating layer having an upper surface on which mounting regions of electronic components and wiring patterns are provided, a metal core provided on the lower surface of the first insulating layer, in such a way as to vertically overlap with the mounting regions, and a second insulating layer provided on the lower surface of the first insulating layer, around the metal core. The lower surface of the metal core is exposed from the second insulating layer, the thermal conductivities of the first insulating layer and the metal core are higher than the thermal conductivity of the second insulating layer, and the hardness of the first insulating layer is higher than the hardness of the second insulating layer. Through holes that penetrate the insulating layers and that connect wiring patterns of the insulating layers are provided.

Abstract: A microelectronic package includes first and second encapsulated microelectronic elements, each of which includes a semiconductor die having a front face and contacts thereon. An encapsulant contacts at least an edge surface of each semiconductor die and extends in at least one lateral direction therefrom. Electrically conductive elements extend from the contacts and over the front face to locations overlying the encapsulant. The first and second microelectronic elements are affixed to one another such that one of the front or back surfaces of one of the first and second semiconductor dies is oriented towards one of the front or back surfaces of the other of the first and second semiconductor dies. A plurality of electrically conductive interconnects extend through the encapsulants of the first and second microelectronic elements and are electrically connected with at least one semiconductor die of the first and second microelectronic elements by the conductive elements.

Abstract: A wiring board of an embodiment includes a through via, a first insulating film disposed around the through via, a second insulating film disposed around the first insulating film, a third insulating film disposed around the second insulating film and a resin disposed around the third insulating film. The resin includes fillers. The second insulating film has a relative permittivity lower than a relative permittivity of the first insulating film. The third insulating film has a relative permittivity higher than a relative permittivity of the second insulating film.

Abstract: A method of making a stackable wiring board is characterized by positioning an electronic component in a dielectric recess to realize the thickness reduction of the wiring board and sidewalls of the recess can confine the dislocation of the electronic component to avoid misalignment between buildup circuitry and the electronic component. An array of metal posts that provide vertical electrical connections are formed by using the same metal carrier that forms the recess, so that the predetermined distance and relative location between metal posts and pads/bumps of the electronic component can be maintained.

Abstract: A component-embedded substrate includes: a resin substrate having a mount surface and a peripheral surface surrounding a perimeter of the mount surface; a first mounted component mounted on the mount surface; a second mounted component mounted on the mount surface and spaced from the first mounted component; a first chip-type electronic component disposed in the resin substrate; and a second chip-type electronic component disposed in the resin substrate and spaced from the first chip-type electronic component. The first and second chip-type electronic components are spaced from each other along a cross direction crossing an arrangement direction along which the first mounted component and the second mounted component that are arranged with respect to each other. The first and second chip-type electronic components are each arranged to cross the cross direction.

Abstract: A transmission line member includes a dielectric base body. At an intermediate point in a thickness direction of the dielectric base body, first and second signal conductors are disposed. A reference ground conductor is disposed at one side of the first and second signal conductors in the thickness direction, and an auxiliary ground conductor is disposed at the other side. At intermediate points of the first signal conductor, a coil conductor and a capacitor-defining plate conductor are disposed. The capacitor-defining plate conductor faces the reference ground conductor and the auxiliary ground conductor to connect a low pass filter and the first transmission line. A coil conductor is disposed between the second signal conductor and the reference ground conductor, and connected to the second signal conductor and the reference ground conductor to connect a high pass filter and the second transmission line.

Abstract: An electronic component capable of suppressing variations in dimension of plating growth of a plating film serving as an external electrode. The external electrodes include plating films formed so as to extend from each of end surfaces to side surfaces of an electronic component body by electrolytic plating. Underlying main electrodes in which the degree of plating growth is relatively high, and underlying sub-electrodes in which the degree of plating growth is relatively low, are formed as a seed electrode serving as a starting point of plating growth for forming a plating film.

Abstract: A package substrate is provided, which includes a plurality of dielectric layers and a plurality of circuit layers alternately stacked with the dielectric layers. At least two of the circuit layers have a difference in thickness so as to prevent warpage of the substrate.

Abstract: Apparatuses and methods for formation of a bond site including an opening with a discontinuous profile are disclosed herein. An example apparatus may at least include a substrate, a contact on the substrate, and a mask layer formed on the substrate and at least a portion of the contact. The mask layer may also include an opening formed therein, with the opening having a discontinuous profile from a top surface of the mask layer to the contact.

Abstract: Decorative, multi-layer surfacing materials, surfaces made therewith, methods of making such and wireless power transmission using the same, which surfacing materials comprise: a first resin-impregnated paper layer and a second resin-impregnated paper layer, and a first conductive material having a first terminus and a second terminus and capable of carrying an electric current from the first terminus to the second terminus; wherein the first conductive material is disposed on a first surface of the first resin-impregnated paper layer; wherein the first resin-impregnated paper layer and the second resin-impregnated paper layer are disposed in a stacked and compressed such that the first conductive material is encapsulated between the first resin-impregnated paper layer and the second resin-impregnated paper layer; and wherein at least one of the first resin-impregnated paper layer, the second resin-impregnated paper layer or an optional additional resin-impregnated paper layer is a decorative layer.

Abstract: A probe card assembly and associated processes of forming them may include a wiring substrate with a first surface and an opposite surface, an electrically conductive first via comprising electrically conductive material extending into the wiring substrate from the opposite surface and ending before reaching the first surface, and a plurality of electrically conductive second vias, and a custom electrically conductive terminal disposed on the first surface such that said custom terminal covers the first via and contacts one of the second vias adjacent to said first via without electrically contacting the first via. Each of the second vias may be electrically conductive from the first surface to the opposite surface. The first via may include electrically insulating material disposed within a hole in the first via.

Abstract: A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) is mounted to the temporary carrier using an adhesive. The IPD includes a capacitor and a resistor and has a plurality of through-silicon vias (TSVs). A discrete component is mounted to the temporary carrier using the adhesive. The discrete component includes a capacitor. The IPD and the discrete component are encapsulated using a molding compound. A first metal layer is formed over the molding compound. The first metal layer is connected to the TSVs of the IPD and forms an inductor. The temporary carrier and the adhesive are removed, and a second metal layer is formed over the IPD and the discrete component. The second metal layer interconnects the IPD and the discrete component and forms an inductor. An optional interconnect structure is formed over the second metal layer.

Abstract: A semiconductor device package includes an electronic component and an electrical interconnect. The electronic component is attached to the electrical interconnect. The electrical interconnect is configured to electrically couple the electronic component to external terminals of the semiconductor device package. The electrical interconnect has a first main face facing the electronic component and a second main face opposite the first main face. The semiconductor device package further includes a first semiconductor chip facing the second main face of the electrical interconnect.

Abstract: An LED package is described that acts as a sub-mount between a printed circuit board and a diode. The sub-mount includes a laminate to thermally isolate the diode, for example an LED, from the PCB while providing a thermal heat dissipative sink for the diode.

Abstract: A component-embedded substrate includes: a resin substrate having a mount surface and a peripheral surface surrounding a perimeter of the mount surface; a first mounted component mounted on the mount surface; a second mounted component mounted on the mount surface and spaced from the first mounted component; and a first embedded chip-type electronic component disposed in the resin substrate. The first embedded chip-type electronic component is located close to the peripheral surface of the resin substrate. The mount surface includes: a first region located between the first and second mounted components and extending along a cross direction crossing an arrangement direction along which the first and second mounted components are arranged with respect to each other; and a second region located outside the first region. The first embedded chip-type electronic component is arranged to extend in the first and second regions as seen from above the mount surface.

Abstract: A multilayer substrate comprises: a stack having a plurality of insulating base materials; a first component arranged within the stack at a first level in a thickness direction of the stack; a second component arranged within the stack at a second level different from the first level and arranged so that, in a plan view, at least a portion of the second component overlaps with a portion of the first component; and a supplementary member arranged to at least partly exist in a range, in a thickness direction, as high as or higher than a lower end of the second component and as high as or lower than an upper end of the second component, and in a plan view, within a region of a projected area of the first component not overlapped with the second component, the supplementary member having a rigidness higher than the insulating base materials.

Abstract: A radio frequency module includes a plurality of insulating base material layers made of a thermoplastic resin defining a multilayer circuit board and including a cavity inside thereof, an IC chip disposed in the cavity and including a noise generation source, and planar ground conductive bodies provided in the multilayer circuit board. The planar ground conductive bodies are disposed on a layer not exposed to the inner surface of the cavity, and include inter-layer connection conductive bodies protruding in the direction of the noise generation source from the planar ground conductive bodies.

Abstract: An electronic component includes a substrate configured to include a first portion that first thermal conductivity, and have a first surface and a second surface opposite to the first surface; a second portion configured to be formed inside the first portion, and have second thermal conductivity lower than the first thermal conductivity; a first terminal configured to be formed to correspond to the second portion on a side of the first surface; and a second terminal configured to be formed on a side of the second surface.

Abstract: A patterned ground shield includes a plurality of portions, a first connection member, a second connection member, and a third connection member. Each of the first connection member and the second connection member is coupled to any of two of the portions which are not adjacent to each other. The third connection member is coupled to two of the portions which are adjacent to each other.

Abstract: A printed circuit assembly (PCA) that provides for a method of rebuilding an electrically operated automatic transmission solenoid module. The PCA allows for a repairable yet rugged interconnection of several solenoids that reside within the span of the module assembly.

Abstract: A probe tip structure that decreases the accumulation rate of Sn particles to the probe tip and enables considerably more efficient and complete laser cleaning is disclosed. In an embodiment, the probe structure includes an array of probe tips, each probe tip having an inner core; an interfacial layer bonded to the inner core; and an outer layer bonded to the interfacial layer, wherein the outer layer is resistant to adherence of the solder of the ball grid array package.

Abstract: A dynamic random access memory includes a main body, a light-emitting portion and a transmission port, the main body has a substrate and a first coating layer, the substrate has a light-transmittable portion and a first face, the first coating layer is coated on the first face, the first coating layer has an emergent light-transmittable portion corresponding to the light-transmittable portion, and the substrate is provided with a memory module. The light-emitting portion is embedded in the substrate. The transmission port is disposed on the substrate and electrically connected with the memory module. The electronic device includes the dynamic random access memory and further includes a shell portion. The shell portion is covered on two opposite lateral faces of the dynamic random access memory, and the shell portion further has a second light-transmittable portion corresponding to the emergent light-transmittable portion.

Abstract: A wiring substrate includes an electronic component mounting pad, an electrode pad arranged at an outer side of the electronic component mounting pad, a first insulation layer formed on the electronic component mounting pad and the electrode pad, an opening formed in the first insulation layer on the electronic component mounting pad, a connection hole formed in the first insulation layer on the electrode pad, and recess portions formed at the electronic component mounting pad in the opening and at the electrode pad in the connection hole, respectively.

Abstract: A system on package SoP module includes a printed circuit board (PCB) having a first side and an opposing second side, a first IC attached to the first side, a second IC attached to the second side. The PCB also provides electrical paths for connecting the first IC and the second IC. Conductors by which the second IC is attached to the PCB also allow for electrical testing of the first IC when the SoP is in a system level state.

Abstract: A circuit board includes a main portion and at least one uneven portion. The main portion is obtained by stacking a plurality of base sheets made of a flexible material in a predetermined direction and subjecting the stacked base sheets to compression bonding. The at least one uneven portion is provided on one of the base sheets. The uneven portion includes a concave portion and a convex portion extending in a direction perpendicular or substantially perpendicular to the predetermined direction. The concave portion is sunken in the predetermined direction. The convex portion protrudes in an opposite direction to the predetermined direction.

Abstract: A connector system includes a connector mounted on a circuit board. The circuit board has deeper backdrilled vias and the connector has modified signal terminal that can mate with the backdrilled vias so as to provide a surprising increase in the performance of signal traces provided in the top layers of the circuit board.