With Sputter Etching Patents (Class 204/192.3)
  • Patent number: 6254739
    Abstract: A method for treating a silicon substrate is described. The silicon substrate is placed into a sputtering equipment. A sputtering step is performed to simultaneously dry clean and amorphize the silicon substrate surface by using the sputtering equipment. A titanium film is deposited on the silicon substrate by the sputtering equipment.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: July 3, 2001
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Su-Chen Fan
  • Patent number: 6228209
    Abstract: A fabrication equipment to form an opening plug is provided. The equipment at least includes a load/unload chamber, a degas chamber, an usual sputtering chamber, a radio frequency (RF) sputtering chamber, a physical vapor deposition (PVD) chamber, and a chemical vapor deposition (CVD). The load/unload chamber is used to load a substrate. The degas chamber is used to remove moisture on the substrate. The usual sputtering chamber is used to form an opening on the substrate. The PVD chamber is used to form a first glue layer. The RF sputtering chamber is used to remove an overhang structure on the first glue layer. The CVD chamber is used to form a second glue layer over the first glue layer.
    Type: Grant
    Filed: October 19, 1998
    Date of Patent: May 8, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Coming Chen, Juan-Yuan Wu, Water Lur
  • Patent number: 6220204
    Abstract: A film deposition apparatus to which the present invention is applied comprises a vacuum chamber 11, a plasma beam generator 13, a main hearth 30 which is disposed within the vacuum chamber and which serves as an anode containing a vaporizable material Cu, and an auxiliary anode 31 surrounding the main hearth, the auxiliary anode being formed of an annular permanent magnet 35 and a coil 36. A Cu film is formed on a substrate 41 placed opposite to the main hearth.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: April 24, 2001
    Assignee: Sumitomo Heavy Industries, Ltd.
    Inventors: Hiroyuki Makino, Masaru Tanaka, Kiyoshi Awai, Toshiyuki Sakemi
  • Patent number: 6217951
    Abstract: An impurity solid including boron as impurity and a solid sample to which boron is introduced are held in a vacuum chamber. Ar gas is introduced into the vacuum chamber to generate plasma composed of the Ar gas. A voltage allowing the impurity solid to serve as a cathode for the plasma is applied to the impurity solid and the impurity solid is sputtered by ions in the plasma, thereby mixing boron included in the impurity solid into the plasma composed of Ar gas. A voltage allowing the solid sample to serve as a cathode for the plasma is applied to the solid sample, and boron mixed into the plasma is introduced to the surface portion of the solid sample.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: April 17, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Bunji Mizuno, Hiroaki Nakaoka, Michihiko Takase, Ichiro Nakayama
  • Patent number: 6187682
    Abstract: A method for insitu performing a cleaning operation along with a physical sputtering operation begins by placing a wafer (26) into a chamber (12). A plasma (30) is generated within the chamber (12) using an inert, noble, or reducing gas. The gas is ionized to form ions (32) within the plasma (30). Power is provided to various components (16, 22, and 24) within the chamber (12) to ensure that the ions (32) are accelerated towards the wafer (26) during first stages of wafer processing. This acceleration of the ions (32) towards the wafer (26) will clean a surface of the wafer (26). Following this cleaning operation, power supplied within the chamber (12) is altered to accelerate the ions (32) into a reverse direction so that the ions (32) impact a sputter target (20). Due to ionic bombardment of the target (20), a material is sputtered onto a clean surface of the wafer (26) in an insitu manner.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: February 13, 2001
    Assignee: Motorola Inc.
    Inventors: Dean J. Denning, Rama I. Hegde, Sam S. Garcia, Robert W. Fiordalice
  • Patent number: 6187151
    Abstract: A method of in-situ cleaning and deposition of device structures in a high density plasma environment. A device structure is located in a reaction chamber containing a sputter target. An ion containing gas located in the reaction chamber is exposed to an RF voltage to generate a high density plasma containing ionized gas particles. The ionized gas particles are accelerated toward the device structure during a cleaning phase. By-products produced during the cleaning phase are either evacuated from the reaction chamber or platted to the chamber walls. Ionized gas particles are then accelerated toward the sputter target during a deposition phase so that a layer of the sputter target material is deposited on at least a portion of the device structure.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: February 13, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Shane P. Leiphart
  • Patent number: 6176983
    Abstract: The present invention provides methods of forming a semiconductor workpiece. One method of forming a semiconductor device in accordance with the present invention includes: providing a semiconductor workpiece; forming a via within the semiconductor workpiece, the via including plural sidewalls joining a bottom surface at respective plural corners; first sputtering a process layer upon at least a portion of the bottom surface using ionized metal plasma physical vapor deposition; and following the sputtering of the process layer, second sputtering at least some of the process layer towards the corners within the via.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: January 23, 2001
    Assignee: VLSI Technology, Inc.
    Inventors: Subhas Bothra, Dipankar Pramanik, Samit Sengupta
  • Patent number: 6176981
    Abstract: A plasma reactor for physical vapor deposition (PVD), also known as sputtering, which is adapted so that the atomic species sputtered from the target can self-sustain the plasma without the need of a working gas such as argon. The method is particularly useful for sputtering copper. According to the invention, a bias ring arranged around the wafer and rising somewhat above it is positively electrically biased to control the plasma potential, and hence to control the energy and directionality of the ions being sputter deposited on the wafer. The bias ring may be a separate biasing element which can be positioned at a selected height above the wafer.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: January 23, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Liubo Hong, John Forster, Jianming Fu
  • Patent number: 6171459
    Abstract: An improved apparatus and method for manufacturing semiconductor devices, and, in particular, for depositing material at the bottom of a contact hole, comprises sputtering a material onto a semiconductor substrate; applying a first bias voltage to the substrate, simultaneously removing the material surrounding the contact hole to form a facet at the top of the recess; and applying a second bias voltage to the substrate, simultaneously sputter-depositing the first material onto the bottom of the recess. A further embodiment of the invention utilizes an electrically isolated collimator for the sputtering apparatus. Another embodiment of the invention resputters a first material onto sidewalls of a contact hole during physical vapor deposition.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: January 9, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Shane P. Leiphart