At Least One Predominantly Copper Metal Coating Patents (Class 205/182)
-
Patent number: 7368047Abstract: Disclosed is a method of preparing a copper electroplating layer having high adhesion to a magnesium alloy, which is advantageous because the usability of the magnesium alloy, having the highest specific strength among actually usable metals, can be increased through the development of a process of forming a uniform copper plating layer upon electroplating of the magnesium alloy. The method of preparing a copper electroplating layer having high adhesion to a magnesium alloy of this invention is characterized in that the magnesium alloy is pretreated with a plating pretreatment solution to form a film for electroplating, serving as a magnesium alloy pretreatment layer, exhibiting a uniform current distribution, which is then electroplated with copper to form the copper plating layer. According to this invention, through the pretreatment of the magnesium alloy, the adhesion of the copper plating layer to the film for electroplating formed on the magnesium alloy can be increased.Type: GrantFiled: February 10, 2006Date of Patent: May 6, 2008Inventor: Byung Chul Park
-
Patent number: 7303663Abstract: Multilayer structures are electrochemically fabricated from at least one structural material (e.g. nickel), that is configured to define a desired structure and which may be attached to a substrate, and from at least one sacrificial material (e.g. copper) that surrounds the desired structure. After structure formation, the sacrificial material is removed by a multi-stage etching Operation. In some embodiments sacrificial material to be removed may be located within passages or the like on a substrate or within an add-on component. The multi-stage etching Operations may be separated by intermediate post processing activities, they may be separated by cleaning Operations, or barrier material removal Operations, or the like. Barriers may be fixed in position by contact with structural material or with a substrate or they may be solely fixed in position by sacrificial material and are thus free to be removed after all retaining sacrificial material is etched.Type: GrantFiled: May 7, 2003Date of Patent: December 4, 2007Assignee: Microfabrica, Inc.Inventors: Adam L. Cohen, Michael S. Lockard, Dale S. McPherson
-
Patent number: 7252861Abstract: Multi-layer structures are electrochemically fabricated by depositing a first material, selectively etching the first material (e.g. via a mask), depositing a second material to fill in the voids created by the etching, and then planarizing the depositions so as to bound the layer being created and thereafter adding additional layers to previously formed layers. The first and second depositions may be of the blanket or selective type. The repetition of the formation process for forming successive layers may be repeated with or without variations (e.g. variations in: patterns; numbers or existence of or parameters associated with depositions, etchings, and or planarization operations; the order of operations, or the materials deposited). Other embodiments form multi-layer structures using operations that interlace material deposited in association with some layers with material deposited in association with other layers.Type: GrantFiled: May 7, 2003Date of Patent: August 7, 2007Assignee: Microfabrica Inc.Inventor: Dennis R. Smalley
-
Patent number: 7198705Abstract: An improved copper ECD process. After the copper seed layer (116) is formed, a first portion of copper film (118) is plated onto the surface of the seed layer (116). The surface of the first portion of the copper film (118) is then rinsed to equalize the organic adsorption on all sites to prevent preferential copper growth in dense areas. After rinsing, the remaining copper of the copper film (118) is electrochemically deposited.Type: GrantFiled: December 19, 2002Date of Patent: April 3, 2007Assignee: Texas Instruments IncorporatedInventors: Linlin Chen, Jiong-Ping Lu, Changfeng Xia
-
Patent number: 7115196Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.Type: GrantFiled: February 27, 2003Date of Patent: October 3, 2006Assignee: Semitool, Inc.Inventors: Linlin Chen, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
-
Patent number: 7049007Abstract: A peelable composite foil includes a metallic carrier foil, a first barrier layer on one side of the metallic carrier and a second metallic layer on the first barrier layer. The second metallic layer includes a combination of a metal selected from the group including zinc, molybdenum, antimony and tungsten, and an electrodeposited, ultra-thin metal foil on the second metallic layer.Type: GrantFiled: July 10, 2002Date of Patent: May 23, 2006Assignee: Circuit Foil Luxembourg SarlInventors: Raymond Gales, Michel Streel, Rene Lanners
-
Patent number: 7048840Abstract: The invention relates to a method for metal coating the surface of high temperature superconductors with a copper-oxygen base structure. The aim of the invention is to achieve a method as above, which requires a low production complexity, serves for the production of contacts with a low electrical and/or thermal transfer resistance and which increases the stability of the metallization. Said aim is achieved whereby copper is applied to give low-ohmic contacts, and the linked achievement of a stable metallization between the HTS and the electrical and/or thermal coupling. Further advantageous effects are achieved with the method whereby the copper is applied in the form of copper alloys, in particular as copper-nickel or copper-zinc alloys. On applying the method it is furthermore of advantage for the creation of fine grained surface coatings to overlay the galvanic cell with a permanent and/or alternating magnetic field.Type: GrantFiled: August 29, 2000Date of Patent: May 23, 2006Assignee: Adelwitz Technologiezentrum GmbHInventors: Frank Werfel, Uta Flögel-Delor, Rolf Rothfeld, Dieter Wippich
-
Patent number: 6942781Abstract: A method for electroplating a strip of foam having two opposite sides and an electrically conductive surface, including: (a) continuously applying the strip of foam onto a moving cathode immersed in an electroplating bath so that the strip travels through the bath in contact with the moving cathode to electroplate metal on the strip of foam, a first side of the strip of foam facing a working surface of the moving cathode, and (b) continuously removing the electroplated strip of foam from the moving cathode when metal has been plated to a desired thickness; A metal foil is continuously formed by electrodeposition on the working surface of the moving cathode in such a way that the strip of foam is applied at step (a) onto the moving cathode over the metal foil; and, after step (b), the metal foil is continuously removed from the moving cathode.Type: GrantFiled: September 12, 2001Date of Patent: September 13, 2005Assignee: Efoam S.A.Inventors: Marc Kuhn, Louis Masotti, Damien Michel, Liyan Yang
-
Patent number: 6939621Abstract: A plated copper alloy material for connecting terminals is provided which comprises a parent material of copper or copper alloy, a nickel layer and a copper-tin alloy layer. The nickel layer has a thickness of 0.1-1.0 ?m. The copper-tin alloy layer has a thickness of 0.1-1.0 ?m and contains 35-75 at % of copper. The material may additionally have a tin layer no thicker than 0.5 ?m for an engaging type terminal containing 0.001-0.1 mass % of carbon, or thicker than 0.5 ?m for a non-engaging type connector. The material meets requirements for capability of insertion with a small force, good electric reliability (due to low contact resistance) in a high-temperature atmosphere, workability for sharp bending without cracking, good solder wettability and good corrosion resistance to sulfur dioxide gas.Type: GrantFiled: May 20, 2004Date of Patent: September 6, 2005Assignee: Kobe Steel, Ltd.Inventors: Toshihisa Hara, Yasuhiro Shintani, Masayasu Nishimura, Ryoichi Ozaki, Masahiro Kawaguchi
-
Patent number: 6919013Abstract: A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer having a thickness of less than or equal to about 500 Angstroms. The ultra-thin seed layer is then enhanced by depositing additional metal thereon to provide an enhanced seed layer. The enhanced seed layer has a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece.Type: GrantFiled: February 3, 2003Date of Patent: July 19, 2005Assignee: Semitool, Inc.Inventor: LinLin Chen
-
Patent number: 6872295Abstract: The present invention is related to a method for the preparation of a composition for electroplating a copper-containing layer on a substrate. This method makes use of an aqueous solution that has at least: a source of copper Cu(II) ions, an additive to adjust the pH to a predetermined value, and a complexing agent for complexing Cu(II) ions. The complexing agent has the chemical formula: COOR1—COHR2R3 in which R1 is an organic group covalently bound to the carboxylate group (COO), R2 is either hydrogen or an organic group, and R3 is either hydrogen or an organic group. The solution has no reducing agent. The method involves providing electrons from a source not in direct contact with the solution, through transport means that provides the contact between said source and said solution. The present invention is also related to a process for forming a copper-containing layer on a substrate in an electroplating bath prepared according to the foregoing method.Type: GrantFiled: December 12, 2001Date of Patent: March 29, 2005Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Roger Palmans, Yuri Lantasov
-
Patent number: 6866765Abstract: An R-T-B magnet (R is at least one kind of rare-earth elements including Y, and T is Fe or Fe and Co) has an electrolytic copper-plating film where the ratio [I(200)/I(111)] of the X-ray diffraction peak intensity I(200) from the (200) plane to the X-ray diffraction peak intensity I(111) from the (111) plane is 0.1-0.45 in the X-ray diffraction by CuKal rays. This electrolytic copper-plating film is formed by an electrolytic copper-plating method using an electrolytic copper-plating solution which contains 20-150 g/L of copper sulphate and 30-250 g/L of chelating agent and contains no agent for reducing copper ions and has a pH adjusted to 10.5-13.5.Type: GrantFiled: July 4, 2001Date of Patent: March 15, 2005Assignee: Hitachi Metals, Ltd.Inventors: Setsuo Ando, Minoru Endoh, Tsutomu Nakamura, Toru Fukushi
-
Patent number: 6863795Abstract: The invention is related to a method of plating of a metal layer on a substrate. The method is particularly preferred for the formation of metallization structures for integrated circuits.Type: GrantFiled: March 21, 2002Date of Patent: March 8, 2005Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Ivo Teerlinck, Paul Mertens
-
Patent number: 6863991Abstract: A coated metallic mesh having a molecular layer thereon comprising: (1) a metallic mesh comprising at least one aperture; (2) a coating disposed on the metallic mesh that at least partially fills at least one aperture so as to form a partially-filled aperture; and (3) a molecular layer comprising at least one molecule having a hydrophilic region and a hydrophobic region, wherein the hydrophilic region at least partially extends into the partially-filled aperture. Also, provided are coated metallic meshes having bilayers and a method of providing a molecular layer to a coated mesh.Type: GrantFiled: May 1, 2003Date of Patent: March 8, 2005Assignee: The Ohio State UniversityInventors: James V. Coe, Shaun M. Williams, Kenneth R. Rodriguez
-
Patent number: 6846401Abstract: A method for applying a metal layer onto at least one surface of an aluminium or aluminium alloy workpiece, including the steps of pretreating the surface and applying the metal layer by plating, wherein the pretreating step includes a non-electrolytic treatment by immersion of the workpiece in a single acidic solution, preferably a sulphuric acid solution, having a temperature of at most 100° C. A brazed assembly comprising at least one component of an aluminium workpiece made by this method is also disclosed.Type: GrantFiled: April 19, 2002Date of Patent: January 25, 2005Assignee: Corus Aluminium Walzprodukte GmbHInventors: Jacques Hubert Olga Joseph Wijenberg, Joop Nicolaas Mooij
-
Publication number: 20040222088Abstract: A method of fabricating a sputtering target for sputter depositing material onto a substrate in a sputtering chamber is described. In one embodiment of the method, a preform having a surface is formed and a layer of sputtering material is electroplated onto the surface of the preform to form the target. The method can be applied to form a sputtering target having a non-planar surface.Type: ApplicationFiled: May 6, 2003Publication date: November 11, 2004Applicant: Applied Materials, Inc.Inventors: Anantha K. Subramani, Anthony Vesci, Scott Dickerson
-
Patent number: 6811670Abstract: A method for forming electroplating cathode contacts around the periphery of a semiconductor wafer including forming an insulating layer over a conductive layer extending at least around the periphery of a semiconductor wafer substrate; etching a plurality of openings around a peripheral portion of the semiconductor wafer substrate through the insulating layer to extend through a thickness of the insulating layer in closed communication with the conductive layer said conductive area in electrical communication with a central portion of the semiconductor wafer substrate; filling the plurality of openings with metal to form electrically conductive pathways; planarizing the electrically conductive pathway surfaces; and, forming a metal layer over the electrically conductive pathway surfaces to form a plurality of contact pads for contacting a cathode for carrying out an electroplating process.Type: GrantFiled: November 21, 2001Date of Patent: November 2, 2004Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Chung-Shi Liu, Chen-Hua Yu
-
Publication number: 20040211672Abstract: A composite nickel and copper alloy plating film (3) containing nickel and copper. Nickel is of high wear resistance and a nickel alloy improves the wear resistance of the film. Copper is of high resistance of the film. The film may further contain self-lubricating particles and hard particles which ensure its wear resistance and lubricating property to a further extent.Type: ApplicationFiled: March 24, 2004Publication date: October 28, 2004Inventors: Osamu Ishigami, Tomohiro Hirata, Yoshimitsu Ogawa, Nobuhiko Yoshimoto
-
Patent number: 6797405Abstract: A method for electrodepositing a uniformly thick coating on a metallic mesh is provided, the method comprises the steps of: (1) providing a metallic mesh having a plurality of apertures having at least one dimension greater than nanometer scale sizes; (2) subjecting the metal mesh to a relatively fast deposition of an electrodeposited material so as to substantially uniformly coat said mesh with electrodeposited material; and (3) subjecting the product of the relatively fast deposition step to a relatively slow deposition of an electrodeposited material so as to reduce at least one dimension greater than nanometer scale size to a size of nanometer scale. Also provided are metallic meshes so prepared and spectral filters.Type: GrantFiled: April 30, 2003Date of Patent: September 28, 2004Assignee: The Ohio State UniversityInventors: James V. Coe, Shaun M. Williams
-
Publication number: 20040178078Abstract: Interconnect structures with copper conductors being at least substantially free of internal seams or voids are obtained employing an electroplating copper bath containing dissolved cupric salt wherein the concentration of the salt is at least about 0.4 molar and up to about 0.5 molar concentration of an acid. Also provided are copper damascene structures having an aspect ratio of greater than about 3 and a width of less than about 0.275 &mgr;m and via openings filled with electroplated copper than is substantially free of internal seams or voids.Type: ApplicationFiled: March 29, 2004Publication date: September 16, 2004Applicant: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel, Wilma Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Christopher C. Parks, Soon-Cheon Seo, Andrew H. Simon, Erick G. Walton
-
Patent number: 6777108Abstract: To control peel strength at an organic release interface between a carrier foil and a copper-microparticle layer which constitute an electrodeposited copper foil with carrier. In the present invention, (1) a barrier copper layer is formed on the release interface layer and copper microparticles are formed on the barrier layer; (2) the anti-corrosion treatment is carried out by use of a plating bath containing a single metallic component or a plurality of metallic components for forming an alloy, the plating bath(s) having a deposition potential less negative than −900 mV (vs. AgCl/Ag reference electrode); and (3) methods (1) and (2) are combined.Type: GrantFiled: May 18, 2001Date of Patent: August 17, 2004Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Shin-ichi Obata, Makoto Dobashi
-
Publication number: 20040154926Abstract: Embodiments of the invention generally include a method and intermediate plating solution for plating metal onto a substrate surface. The method generally includes filling the features and/or growing a film layer on the field areas by plating a metal from a first solution on a seed layer under an applied first current, wherein the first solution includes an acid in an amount sufficient to provide a first solution pH of about 6 or less, copper ions, and at least one suppressor. The method may further include substantially filling features by plating metal ions from a second solution onto the substrate under an applied second current to form a metal layer, wherein the second solution includes an acid in an amount sufficient to provide a second solution pH of from about 0.Type: ApplicationFiled: December 24, 2003Publication date: August 12, 2004Inventors: Zhi-Wen Sun, Bo Zheng, Nicolay Y. Kovarsky, You Wang, Toshiyuki Nakagawa, Terukazu Aitani, Koji Hara, Daxin Mao, Michael X. Yang
-
Patent number: 6759142Abstract: A plated copper alloy material for connecting terminals is provided which comprises a parent material of copper or copper alloy, a nickel layer and a copper-tin alloy layer. The nickel layer has a thickness of 0.1-1.0 &mgr;m. The copper-tin alloy layer has a thickness of 0.1-1.0 &mgr;m and contains 35-75 at % of copper. The material may additionally have a tin layer no thicker than 0.5 &mgr;m for an engaging type terminal containing 0.001-0.1 mass % of carbon, or thicker than 0.5 &mgr;m for a non-engaging type connector. The material meets requirements for capability of insertion with a small force, good electric reliability (due to low contact resistance) in a high-temperature atmosphere, workability for sharp bending without cracking, good solder wettability and good corrosion resistance to sulfur dioxide gas.Type: GrantFiled: July 30, 2002Date of Patent: July 6, 2004Assignee: Kobe Steel Ltd.Inventors: Toshihisa Hara, Yasuhiro Shintani, Masayasu Nishimura, Ryoichi Ozaki, Masahiro Kawaguchi
-
Patent number: 6755957Abstract: A method of plating for filling via holes, in which each via hole is formed in an insulation layer covering a substrate so as to expose, at its bottom, part of a conductor layer located on the substrate. A copper film is formed on the top surface of the insulation layer covering the substrate, and the side walls and bottoms of the respective via holes. A strike plating of copper is provided on the copper film, and the substrate is immersed in an aqueous solution containing a plating promoter to thereby deposit the plating promoter on the surface of the copper strike. The plating promoter is removed from the copper strike plating located on the top surface insulation layer while leaving the plating promoter on the side walls and bottoms of the respective via holes. The substrate is subsequently electroplated with copper to fill the via holes.Type: GrantFiled: January 30, 2001Date of Patent: June 29, 2004Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kenji Nakamura, Masao Nakazawa
-
Patent number: 6753254Abstract: A method for forming a metallization layer. A first layer is formed outwardly from a semiconductor substrate. Contact vias are formed through the first layer to the semiconductor substrate. A second layer is formed outwardly from the first layer. Portions of the second layer are selectively removed such that the remaining portion of the second layer defines the layout of the metallization layer and the contact vias. The first and second layers are electroplated by applying a bi-polar modulated voltage having a positive duty cycle and a negative duty cycle to the layers in a solution containing metal ions. The voltage and surface potentials are selected such that the metal ions are deposited on the remaining portions of the second layer. Further, metal ions deposited on the first layer during a positive duty cycle are removed from the first layer during a negative duty cycle. Finally, exposed portions of the first layer are selectively removed.Type: GrantFiled: August 13, 2002Date of Patent: June 22, 2004Assignee: Micron Technology, Inc.Inventors: Gurtej Singh Sandhu, Chris Chang Yu
-
Patent number: 6746589Abstract: The present invention relates to a plating method and a plating apparatus which can attain embedding of copper into fine interconnection patterns with use of a plating liquid having high throwing power and leveling properties, and which can make film thickness of a plated film substantially equal between an interconnection region and a non-interconnection region. A plating method comprises filling a plating liquid containing metal ions and an additive into a plating space formed between a substrate and an anode disposed closely to the substrate so as to face the substrate, and changing concentration of the additive in the plating liquid filled into the plating space during a plating process.Type: GrantFiled: September 19, 2001Date of Patent: June 8, 2004Assignees: Ebara Corporation, Kabushiki Kaisha ToshibaInventors: Koji Mishima, Hiroaki Inoue, Natsuki Makino, Junji Kunisawa, Kenji Nakamura, Tetsuo Matsuda, Hisashi Kaneko, Toshiyuki Morita
-
Patent number: 6692629Abstract: A flip-chip bumping method is proposed for the fabrication of solder bumps on a semiconductor wafer for flip-chip application. The proposed flip-chip bumping method is intended for use on a semiconductor wafer predefined with a plurality of chip regions which are delimited from each other by a predefined cutting line and each of which is formed with a plurality of aluminum or copper based bond pads, and is characterized in the provision of a plating bus over and along the cutting line and connected to each bond pad. By means of this plating bus, the required UBM (Under Bump Metallization) fabrication and solder-bump fabrication can be both carried out through plating. Since plating process is considerably lower in cost than sputtering process and etching process, the proposed flip-chip bumping method can be more cost-effective to implement than prior art.Type: GrantFiled: September 7, 2000Date of Patent: February 17, 2004Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chih-Shun Chen, Po-Hao Yuan, Shih-Kuang Chiu, Feng-Lung Chien, Ke-Chuan Yang
-
Patent number: 6689268Abstract: A composite material includes a structural carrier layer and a relatively thin metal foil layer separated by a release layer. The release layer, that may be an admixture of a metal such as nickel or chromium and a non-metal such as chromium oxide, nickel oxide, chromium phosphate or nickel phosphate, provides a peel strength for the metal foil layer from the carrier strip that is typically on the order of 0.1 pound per inch to 2 pounds per inch. This provides sufficient adhesion to prevent premature separation of the metal foil layer from the carrier layer, but easy removal of the carrier layer when desired. Typically, the metal foil layer is subsequently bonded to a dielectric and the carrier layer then removed. The metal foil layer is then imaged into circuit features in the manufacture of printed circuit boards and flexible circuits.Type: GrantFiled: April 26, 2001Date of Patent: February 10, 2004Assignee: Olin CorporationInventors: Szuchain Chen, Julius Fister, Andrew Vacco, Nina Yukov, A. James Brock
-
Patent number: 6660155Abstract: A process of coating the surface of articles made of glass pieces assembled in a came to minimize breakage of glass during application and hardening of the coating The process includes the steps of preprocessing the article, electrodepositing the coating on the article, and hardening the electrodeposited and coated article glass step-by-step.Type: GrantFiled: November 27, 2001Date of Patent: December 9, 2003Assignee: Korea Houghton CorporationInventor: Kwang Soon Kim
-
Patent number: 6638410Abstract: A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer having a thickness of less than or equal to about 500 Angstroms. The ultra-thin seed layer is then enhanced by depositing additional metal thereon to provide an enhanced seed layer. The enhanced seed layer has a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece.Type: GrantFiled: November 22, 2002Date of Patent: October 28, 2003Assignee: Semitool, Inc.Inventors: Linlin Chen, Thomas Taylor
-
Patent number: 6632341Abstract: Described is a process for producing a self-supporting metal foil (40), in particular copper foil, which by virtue of its constitution has a low shearing strength and which can be structured in a sharp-edged configuration. In this case a base layer of the metal foil (40) is galvanically deposited on a roller cathode (22). A cauliflower structure (60) comprising the metal is deposited in firmly adhering relationship on the metal base layer (58) by means of an additional anode (32) provided between the roller cathode (22) and the anode cage (24). The metal foil (40) comprising the metal base layer (58) and the cauliflower structure (60) is detached from the roller cathode (22), rinsed and dried. The dried foil (40) comprising the metal base layer (58) provided with the cauliflower structure (60) is moved through a black oxide bath (46). There then follows a rinsing operation and a drying operation.Type: GrantFiled: February 27, 2002Date of Patent: October 14, 2003Assignee: Bolta-Werke GmbHInventors: Axel Schäfer, Oswald Beetz, Jürgen Hackeŕt
-
Patent number: 6632345Abstract: In accordance with one embodiment of the invention, a process for applying a metal to a workpiece is set forth. The workpiece initially includes a seed layer deposited on at least a portion of a surface thereof that is generally unsuitable for bulk electrochemical deposition. The process starts with this workpiece and repairs the seed layer by depositing a metal using a first electrochemical deposition process to provide a repaired seed layer that is suitable for subsequent bulk electrochemical deposition. After the seed layer has been repaired, a bulk metal deposition over the repaired seed layer is executed by electrochemically depositing a bulk amount of a metal onto the repaired seed layer using a second electrochemical deposition process. The processing parameters of the second electrochemical deposition process are different from processing parameters used in the first electrochemical deposition process. A corresponding apparatus is also set forth.Type: GrantFiled: October 23, 2000Date of Patent: October 14, 2003Assignee: Semitool, Inc.Inventor: LinLin Chen
-
Patent number: 6610418Abstract: The present invention provides electrodeposited copper foil with carrier which has an organic adhesive interface layer permitting control of the lower limit of peel strength between a carrier foil and an electrodeposited copper foil and to a method for producing the electrodeposited copper foil with carrier. In the electrodeposited copper foil with carrier including a carrier foil, an adhesive interface layer formed on the carrier foil, and an electrodeposited copper foil formed on the adhesive interface layer, the carrier foil is formed of a copper foil and the adhesive interface layer contains an organic agent and metallic particles, the organic agent and the metallic particles being in an intermingled state.Type: GrantFiled: November 7, 2001Date of Patent: August 26, 2003Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Junshi Yoshioka, Akiko Sugimoto, Makoto Dobashi, Ken-ichiro Iwakiri, Yutaka Hirasawa
-
Patent number: 6610191Abstract: The present invention provides plating solutions, particularly metal plating solutions, designed to provide uniform coatings on substrates and to provide substantially defect free filling of small features, e.g., micron scale features and smaller, formed on substrates with none or low supporting electrolyte, i.e., which include no acid, low acid, no base, or no conducting salts, and/or high metal ion, e.g., copper, concentration. Additionally, the plating solutions may contain small amounts of additives which enhance the plated film quality and performance by serving as brighteners, levelers, surfactants, grain refiners, stress reducers, etc.Type: GrantFiled: November 13, 2001Date of Patent: August 26, 2003Assignee: Applied Materials, Inc.Inventors: Uziel Landau, John J. D'Urso, David B. Rear
-
Patent number: 6605369Abstract: The present invention is directed to provision of a surface-treated copper foil exhibiting a maximum effect of a silane coupling agent which is adsorbed onto the copper foil and is employed in order to enhance adhesion between the copper foil and a substrate during manufacture of printed wiring boards. The invention is also directed to provision of a method for producing such a copper foil. To attain these goals, a surface-treated copper foil for producing printed wiring boards is provided, wherein an anti-corrosion treatment comprises forming a zinc layer or a zinc alloy layer on a surface of the copper foil and forming an electrodeposited chromate layer on the zinc or zinc alloy layer; forming a silane-coupling-agent-adsorbed layer on the electrodeposited chromate layer without causing the electrodeposited chromate layer of the nodular-treated surface to dry; and drying.Type: GrantFiled: August 14, 2001Date of Patent: August 12, 2003Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Naotomi Takahashi, Yutaka Hirasawa
-
Publication number: 20030141194Abstract: A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer having a thickness of less than or equal to about 500 Angstroms. The ultra-thin seed layer is then enhanced by depositing additional metal thereon to provide an enhanced seed layer.Type: ApplicationFiled: February 3, 2003Publication date: July 31, 2003Inventor: LinLin Chen
-
Patent number: 6589413Abstract: A composite for use in forming a multi-layer printed circuit board, comprised of an INVAR® sheet having a thickness of between 0.5 mil and 5 mil; and a layer of electrodeposited copper on at least one side thereof. The copper has a thickness of between 1&mgr; and 50&mgr;, wherein the composite has a thermal coefficient of expansion (TCE) of about 2.8 to 6.0 ppm at temperatures between 0° F. and 200° F.Type: GrantFiled: August 9, 2001Date of Patent: July 8, 2003Assignee: Gould Electronics Inc.Inventors: Chin-Ho Lee, Thomas J. Ameen, John P. Callahan
-
Publication number: 20030079997Abstract: A method for coating a light metal alloy component to form a protective layer comprising Sn. First, a surface of the light metal alloy component is cleaned and passivated. A layer comprising Zn is formed on the surface, and a layer comprising Sn is deposited. An intermediate layer is preferably deposited between the Zn-containing layer and the Sn containing layer. The Sn-containing layer may additionally be varnished.Type: ApplicationFiled: October 11, 2002Publication date: May 1, 2003Applicant: Enthone Inc.Inventor: Wolf-Dieter Franz
-
Patent number: 6547946Abstract: A method of processing a printed wiring board by single bath electrodeposition. Initial processing steps are implemented on the printed wiring board. Copper is plated on the printed wiring board from a bath containing nickel and copper. Nickel is plated on the printed wiring board from the bath containing nickel and copper and final processing steps are implemented on the printed wiring board.Type: GrantFiled: March 16, 2001Date of Patent: April 15, 2003Assignee: The Regents of the University of CaliforniaInventors: Michael P. Meltzer, Christopher P. Steffani, Ray A. Gonfiotti
-
Patent number: 6537438Abstract: The present invention is directed to methods for applying a protective layer (42) to the cathode (40) of an electrolysis cell (10), where the cell also contains inert anodes (50) and the protective layer (42) can comprise a plurality of layers (70, 72, 74) with an inner layer (70) of TiB2 being preferred, and the protective layer (42) protects the cathode (40)from hot gases (64) used to pre-heat the cell (10).Type: GrantFiled: August 27, 2001Date of Patent: March 25, 2003Assignee: Alcoa Inc.Inventor: Roy A. Christini
-
Patent number: 6533915Abstract: The invention provides a surface-treated copper foil for producing printed wiring boards whose surface has,,been subjected to nodular treatment and anti-corrosion treatment, wherein the anti-corrosion treatment includes forming a-zinc-copper-tin ternary alloy anti-corrosive plating layer on a surface of the copper foil; forming an electrolytic chromate layer on the anti-corrosive plating layer; forming a silane-coupling-agent-adsorbed layer on the electrolytic chromate layer; and drying the copper foil for 2-6 seconds such that the copper foil reaches 105° C.-200° C.Type: GrantFiled: January 26, 2001Date of Patent: March 18, 2003Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Masakazu Mitsuhashi, Takashi Kataoka, Naotomi Takahashi
-
Patent number: 6531045Abstract: The invention provides a surface-treated copper foil for producing printed wiring boards whose surface has been subjected to nodular treatment and anti-corrosion treatments, wherein the anti-corrosion treatment includes forming a zinc-copper-nickel ternary alloy anti-corrosive plating layer on a surface of the copper foil; forming an electrolytic chromate layer on the anti-corrosive plating layer; forming a silane-coupling-agent-absorbed layer on the electrolytic chromate layer; and drying the copper foil for 2-6 seconds such that the copper foil reaches 105° C.-200° C.Type: GrantFiled: January 26, 2001Date of Patent: March 11, 2003Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Masakazu Mitsuhashi, Takashi Kataoka, Naotomi Takahashi
-
Publication number: 20030010645Abstract: A damascene process for introducing copper into metallization layers in microelectronic structures includes a step of forming an enhancement layer of a metal alloy, such as a copper alloy or Co—W—P, over the barrier layer, using PVD, CVD or electrochemical deposition prior to electrochemically depositing copper metallization. The enhancement layer has a thickness from 10&mgr; to 100&mgr; and conformally covers the discontinuities, seams and grain boundary defects in the barrier layer. The enhancement layer provides a conductive surface onto which a metal layer, such as copper metallization, may be applied with electrochemical deposition. Alternatively, a seed layer may be deposited over the enhancement layer prior to copper metallization.Type: ApplicationFiled: June 14, 2002Publication date: January 16, 2003Applicant: Mattson Technology, Inc.Inventors: Chiu H. Ting, Igor Ivanov
-
Patent number: 6497806Abstract: A method of producing a roughening-treated copper foil, comprising (A) a copper foil, (B) a composite metal layer, which is formed on a bonding surface of the copper foil and comprises (I) copper, (II) at least one metal selected from the group consisting of tungsten and molybdenum and (III) at least one metal selected from the group consisting of nickel, cobalt, iron and zinc, and (C) a roughened layer comprising copper, which is formed on the composite metal layer.Type: GrantFiled: April 20, 2001Date of Patent: December 24, 2002Assignee: Nippon Denkai, Ltd.Inventor: Yasuhiro Endo
-
Patent number: 6495022Abstract: A copper foil for fine wiring is produced by forming on a bonding surface of a copper foil a composite metal layer comprising (I) copper, (II) at least one of tungsten and molybdenum and (III) at least one of nickel, cobalt, iron and zinc by carrying out electrolysis in a plating bath (A) containing ions of these metals and chloronium ions, and then forming a roughened layer comprising copper on the composite metal layer by carrying out electrolysis in a plating bath (B) containing copper ions at a current density not lower than a limiting current density of the plating bath to form a dendritic copper electrodeposition layer and then carrying out subsequent electrolysis at a current density lower than the limiting current density of plating bath to form nodular copper.Type: GrantFiled: September 18, 2001Date of Patent: December 17, 2002Assignee: Nippon Denkai, Ltd.Inventors: Yasuhiro Endo, Hiroki Hara, Nobuchika Yagihashi
-
Publication number: 20020182433Abstract: A roughening-treated copper foil, comprising (A) a copper foil, (B) a composite metal layer, which is formed on a bonding surface of the copper foil and comprises (I) copper, (II) at least one metal selected from the group consisting of tungsten and molybdenum and (III) at least one metal selected from the group consisting of nickel, cobalt, iron and zinc, and (C) a roughened layer comprising copper, which is formed on the composite metal layer.Type: ApplicationFiled: April 20, 2001Publication date: December 5, 2002Inventor: Yasuhiro Endo
-
Patent number: 6475629Abstract: Adhesive film useful for the production of semiconductor devices is produced from a siloxane-modified polyamideimide resin composition, comprising 100 parts by weight of a siloxane-modified polyamideimide resin and 1 to 200 parts by weight of a thermosetting resin ingredient.Type: GrantFiled: February 2, 2001Date of Patent: November 5, 2002Assignee: Hitachi Chemical Company, Ltd.Inventors: Kazumasa Takeuchi, Tetsuya Saito, Ken Nanaumi
-
Publication number: 20020153259Abstract: The present invention is related to a method for the preparation of a composition for electroplating a copper-containing layer on a substrate. This method makes use of an aqueous solution that has at least: a source of copper Cu (II) ions, an additive to adjust the pH to a predetermined value, and a complexing agent for complexing Cu (II) ions.Type: ApplicationFiled: December 12, 2001Publication date: October 24, 2002Inventors: Roger Palmans, Yuri Lantasov
-
Publication number: 20020130046Abstract: A method of forming a copper layer with increased electromigration resistance. A doped copper layer is formed by controlling the incorporation of a non-metallic dopant during copper electroplating.Type: ApplicationFiled: March 15, 2001Publication date: September 19, 2002Applicant: Applied Materials, Inc.Inventors: Robin Cheung, Liang-Yuh Chen
-
Patent number: 6447929Abstract: A component for use in forming a printed circuit board comprised of a copper foil, a layer of chromium chemically deposited thereon, the layer of chromium having a thickness of less than about 0.10 &mgr;m; and a layer of electrodeposited copper on the layer of chromium, the layer of electrodeposited copper having a thickness of less than 35 &mgr;m. A nodular treatment layer is provided on the copper foil and the layer of electrodeposited copper.Type: GrantFiled: August 29, 2000Date of Patent: September 10, 2002Assignee: Gould Electronics Inc.Inventors: Jiangtao Wang, Dan Lillie, Sidney J. Clouser