Mask Resist Contains Organic Compound Patents (Class 216/49)
  • Patent number: 8161608
    Abstract: To provide a method of manufacturing a quartz-crystal resonator, in which without adding new processes, a desired quartz-crystal piece can be obtained from a quartz-crystal wafer by etching and electrodes can be provided without restraint. When a quartz-crystal piece 10 is formed, etching masks 6 having dummy regions 44, 48 that are provided at two positions corresponding to corner portions on a +X side of the quartz-crystal piece 10 and extend toward a +X axis direction of a wafer W are formed, and when the quartz-crystal piece 10 is formed, etching in groove portions 7 at positions corresponding to the dummy regions 44, 48 is delayed. Accordingly, it is possible to form the quartz-crystal piece 10 without chipped portions at the corner portions in a state where the quartz-crystal piece 10 and the wafer W are connected to and supported by a connection support portion 11.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: April 24, 2012
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Akihiko Tashiro, Hiroyuki Sasaki
  • Patent number: 8163189
    Abstract: Nanoporous substrate with fine pores having a diameter from 3 to 40 nm arranged with less than 60 nm periodicity is prepared by a method comprising the steps of coating amphipathic block copolymer on a substrate, forming a film containing hydrophilic cylinders aligned perpendicularly to the surface of the film on a substrate, and immersing the substrate into a solution containing an etchant.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: April 24, 2012
    Assignee: Tokyo Institute of Technology
    Inventors: Tomokazu Iyoda, Kaori Kamata, Ryoko Watanabe
  • Publication number: 20120080404
    Abstract: A method of forming patterns includes forming a layer composed of a ketene based random copolymer on a substrate, forming a block copolymer on the ketene based random copolymer layer and patterning the ketene based random copolymer layer by removing a part of the block copolymer and a portion of the ketene based random copolymer layer.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 5, 2012
    Inventors: Su Mi LEE, Mio Hyuck Kang, Eun-Ae Kwak, Moon Gyu Lee, Bong-Jin Moon, Joona Bang, Hyun Jung Jung
  • Publication number: 20120082822
    Abstract: Methods for fabricating a random graft PS-r-PEO copolymer and its use as a neutral wetting layer in the fabrication of sublithographic, nanoscale arrays of elements including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Application
    Filed: December 13, 2011
    Publication date: April 5, 2012
    Inventor: Dan B. Millward
  • Patent number: 8137569
    Abstract: A method of fabricating a membrane having a tapered pore, a polymeric membrane having a tapered pore, and uses of such polymeric membrane are disclosed. The membrane includes apertures of increasing diameter which are aligned with each other to form the tapered pore.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: March 20, 2012
    Assignees: Sony Deutschland GmbH, Oxford Nanopore Technologies Limited
    Inventors: Oliver Harnack, Jurina Wessels, Akio Yasuda, James Clarke, Terry Reid
  • Patent number: 8138088
    Abstract: A manufacturing method of a structure by an imprint process includes a first imprint step of forming a first resin material layer by applying a first resin material onto a substrate and then transferring an imprint pattern of a mold onto the first resin material layer, a second imprint step of forming a second resin material layer by applying a second resin material onto the first resin material layer formed in the first imprint step and onto an area of the substrate adjacent to the first resin material layer and then transferring the imprint pattern of the mold onto the second resin material layer, and a step of forming a pattern by etching the first and second resin material layers.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: March 20, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsunori Terasaki, Shingo Okushima, Junichi Seki
  • Patent number: 8123961
    Abstract: Methods for fabricating sublithographic, nanoscale arrays of openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the invention use a self-templating or multilayer approach to induce ordering of a self-assembling block copolymer film to an underlying base film to produce a multilayered film having an ordered array of nanostructures that can be removed to provide openings in the film which, in some embodiments, can be used as a template or mask to etch openings in an underlying material layer.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: February 28, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward
  • Patent number: 8123960
    Abstract: Methods for fabricating sublithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: February 28, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward
  • Patent number: 8123962
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: February 28, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
  • Patent number: 8120144
    Abstract: Methods for forming a front-end-of-the-line (FEOL) dual high-k gate using a photoresist mask and structures thereof are disclosed. One embodiment of the disclosed method includes depositing a high-k dielectric film on a substrate of a FEOL CMOS structure followed by depositing a photoresist thereon; patterning the high-k dielectric according to the photoresist; and removing the photoresist thereafter. The removing of the photoresist includes using an organic solvent followed by removal of any residual photoresist including organic and/or carbon film. The removal of residual photoresist may include a degas process, alternatively known as a bake process. Alternatively, a nitrogen-hydrogen forming gas (i.e., a mixture of nitrogen and hydrogen) (N2/H2) or ammonia (NH3) may be used to remove the photoresist mask. With the use of the plasma nitrogen-hydrogen forming gas (N2/H2) or a plasma ammonia (NH3), no apparent organic residual is observed.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: February 21, 2012
    Assignees: International Business Machines Corporation, GLOBALFOUNDRIES Inc.
    Inventors: Michael P. Chudzik, Rashmi Jha, Naim Moumen, Keith Kwong Hon Wong, Ying H. Tsang
  • Patent number: 8114306
    Abstract: Methods involving the self-assembly of block copolymers are described herein, in which by beginning with openings (in one or more substrates) that have a targeted CD (critical dimension), holes are formed, in either regular arrays or arbitrary arrangements. Significantly, the percentage variation in the average diameter of the formed holes is less than the percentage variation of the average diameter of the initial openings. The formed holes (or vias) can be transferred into the underlying substrate(s), and these holes may then be backfilled with material, such as a metallic conductor. Preferred aspects of the invention enable the creation of vias with tighter pitch and better CD uniformity, even at sub-22 nm technology nodes.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: February 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: Joy Cheng, Kafai Lai, Wai-Kin Li, Young-Hye Na, Charles Rettner, Daniel P. Sanders, Da Yang
  • Patent number: 8114300
    Abstract: Methods for fabricating sublithographic, nanoscale polymeric microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: February 14, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward
  • Patent number: 8114301
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures in line arrays utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: February 14, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland
  • Patent number: 8101013
    Abstract: A film-forming material that is capable of forming, at a low temperature, a film having a high degree of etching resistance and a high etching selectivity ratio relative to an organic film, as well as a method of forming a pattern that uses the film-forming material. The film-forming material includes a metal compound (W) capable of generating a hydroxyl group upon hydrolysis, and a solvent (S) in which the metal compound is dissolved, wherein the solvent (S) includes a solvent (S1) with a boiling point of at least 155° C. that contains no functional groups that react with the metal compound (W). The method of forming a pattern includes the steps of: coating a pattern, which has been formed on top of an organic film of a laminate that includes a substrate and the organic film, using the above film-forming material, and then conducting etching of the organic film using the pattern as a mask.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: January 24, 2012
    Assignees: Tokyo Ohka Kogyo Co., Ltd., Riken
    Inventors: Shogo MatsuMaru, Hideo Hada, Shingenori Fujikawa, Toyoki Kunitake
  • Patent number: 8101092
    Abstract: A method for controlling ADI-AEI CD difference ratios of openings having different sizes is provided. First, a first etching step using a patterned photoresist layer as a mask is performed to form a patterned Si-containing material layer and a polymer layer on sidewalls thereof. Next, a second etching step is performed with the patterned photoresist layer, the patterned Si-containing material layer and the polymer layer as masks to at least remove an exposed portion of a etching resistive layer to form a patterned etching resistive layer. A portion of a target material layer is removed by using the patterned etching resistive layer as an etching mask to form a first and a second openings in the target material layer. The method is characterized by controlling etching parameters of the first and second etching steps to obtain predetermined ADI-AEI CD difference ratios.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: January 24, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Wen Feng, Pei-Yu Chou, Chun-Ting Yeh, Jyh-Cherng Yau, Jiunn-Hsiung Liao, Feng-Yi Chang, Ying-Chih Lin
  • Patent number: 8097176
    Abstract: Methods, materials, and systems for texturizing mold surfaces is disclosed. In one method and system of the invention, a first step involves generating a graphics file of a desired texture pattern. The graphics file is subsequently output to an ink jet printer, which is configured to print using an acid-etch resist ink. The acid-etch resist ink is formulated to provide optimal properties for ink-jet printing, while also providing excellent acid-etch resist and superior handling properties. The acid-etch resist ink is printed onto a sheet of a carrier substrate that allows the acid-etch resist to be transferred to a mold surface, after which the mold surface is etched with a strong acid.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: January 17, 2012
    Assignee: Ikonics Corporation
    Inventors: Toshifumi Komatsu, Jeremy W. Peterson, Alexander S. Gybin
  • Publication number: 20120006789
    Abstract: The present invention relates to a method for adjusting the resonant frequencies of a vibrating microelectromechanical (MEMS) device. In one embodiment, the present invention is a method for adjusting the resonant frequencies of a vibrating mass including the steps of patterning a surface of a device layer of the vibrating mass with a mask, etching the vibrating mass to define a structure of the vibrating mass, determining a first set of resonant frequencies of the vibrating mass, determining a mass removal amount of the vibrating mass and a mass removal location of the vibrating mass to obtain a second set of resonant frequencies of the vibrating mass, removing the mask at the mass removal location, and etching the vibrating mass to remove the mass removal amount of the vibrating mass at the mass removal location of the vibrating mass.
    Type: Application
    Filed: September 16, 2011
    Publication date: January 12, 2012
    Inventors: Jeffrey F. DeNatale, Philip A. Stupar
  • Patent number: 8088295
    Abstract: A method according to one embodiment comprises forming a thin film layer; forming a hardmask layer above the thin film layer, the hardmask layer comprising laminated layers of diamond-like carbon; removing a portion of the hardmask layer; and removing a portion of the thin film layer that is unprotected by the hardmask layer. A method according to another embodiment comprises forming a thin film layer; forming a patterned hardmask layer above the thin film layer, the hardmask layer comprising laminated layers of diamond-like carbon; and implanting a material into a portion of the thin film layer that is unprotected by the patterned hardmask layer. Additional methods are disclosed.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: January 3, 2012
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Yi Zheng
  • Patent number: 8083958
    Abstract: Disclosed are embodiments of a lithographic patterning method that incorporates a combination of photolithography and self-assembling copolymer lithography techniques in order to create, on a substrate, a grid-pattern mask having multiple cells, each with at least one sub-50 nm dimension. The combination of different lithographic techniques further allows for precise registration and overlay of the individual grid-pattern cells with corresponding structures within the substrate. The resulting grid-pattern mask can then be used, in conjunction with directional etch and other processes, to extend the cell patterns into the substrate and, thereby form openings, with at least one sub-50 nm dimension, landing on corresponding in-substrate structures. Once the openings are formed, additional structures can be formed within the openings.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Wai-Kin Li, Haining S. Yang
  • Patent number: 8083953
    Abstract: Methods for fabricating sublithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multilayer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: December 27, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Eugene P. Marsh
  • Patent number: 8075788
    Abstract: A printed circuit board fabrication method allows a fabrication time and a fabrication cost to be reduced. The fabrication method of the printed circuit board includes steps of forming a resist layer on a surface of the printed circuit board whose surface is made of an insulator, of forming a hole that is connected from the surface of the resist layer to a conductor pattern of an inner layer and a hole and grooves having a depth not connected with the conductor layer of the inner layer by irradiating lasers, of filling a conductive material into the holes and the grooves to form a conductor pattern and of removing the resist layer to project a portion of the conductor pattern out of the surface of the insulating layer.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: December 13, 2011
    Assignee: Hitachiviamechanics, Ltd.
    Inventors: Kunio Arai, Hiroshi Aoyama, Yasuhiko Kanaya
  • Publication number: 20110297646
    Abstract: A method of forming a pattern on a substrate includes forming spaced features over a substrate. A polymer is adsorbed to outer lateral surfaces of the spaced features. Either material of the spaced features is removed selectively relative to the adsorbed polymer or material of the adsorbed polymer is removed selectively relative to the spaced features to form a pattern on the substrate. In one embodiment, the polymer is of known chain length and has opposing longitudinal ends. One of the longitudinal ends of the polymer adsorbs to the outer lateral surfaces whereby the adsorbed polymer projects lengthwise from the outer lateral surfaces, with said chain length defining a substantially uniform lateral thickness of the adsorbed polymer on the spaced features. Additional embodiments are contemplated.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 8, 2011
    Inventors: Anton deVillers, Scott Sills
  • Patent number: 8043518
    Abstract: The method of manufacturing a nozzle plate which includes a nozzle having a tapered section and a linear section includes the steps of: forming an etching stopper layer for stopping dry etching of a silicon substrate, on a first surface of the silicon substrate; forming a mask layer on a second surface of the silicon substrate reverse to the first surface; performing a first patterning process with respect to the mask layer so that an opening section is formed in the mask layer; carrying out the dry etching of the silicon substrate through the opening section in the mask layer so that the tapered section of the nozzle is formed in the silicon substrate; carrying out dry etching of the etching stopper layer through the opening section in the mask layer so that at least a part of the linear section of the nozzle is formed in the etching stopper layer; and removing the mask layer.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: October 25, 2011
    Assignee: Fujifilm Corporation
    Inventor: Shuji Takahashi
  • Patent number: 8021564
    Abstract: A method for detecting an end point of a resist peeling process in which a resist is gasified to be peeled off by producing hydrogen radicals by catalytic cracking reaction where a hydrogen-containing gas contacts with a high-temperature catalyst, and contacting the produced hydrogen radicals with a resist on a substrate, includes monitoring one or more parameters indicating a state of the catalyst and detecting the end point of the resist peeling process based on variations of the monitored parameters. The hydrogen-containing gas may be a H2 gas. The parameters indicating the state of the catalyst may be one or more electrical parameters when a power is supplied to the catalyst. Further, the catalyst may be a filament made of a high melting point metal.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: September 20, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Isamu Sakuragi, Kazuhiro Kubota
  • Publication number: 20110210096
    Abstract: A method of chemically milling a workpiece includes depositing a masking material on portions of the workpiece according to a predefined masking pattern such that other portions of the workpiece that are desired to be milled are unmasked. Material from the unmasked desired milling areas of the workpiece is chemically removed.
    Type: Application
    Filed: March 1, 2010
    Publication date: September 1, 2011
    Inventor: Edris Raji
  • Patent number: 7981810
    Abstract: The present invention addresses this need by providing a method for forming transparent PECVD deposited ashable hardmasks (AHMs) that have high plasma etch selectivity to underlying layers. Methods of the invention involve depositing the AHM using dilute hydrocarbon precursor gas flows and/or low process temperatures. The AHMs produced are transparent (having absorption coefficients of less than 0.1 in certain embodiments). The AHMs also have the property of high selectivity of the hard mask film to the underlying layers for successful integration of the film, and are suitable for use with 193 nm generation and below lithography schemes wherein high selectivity of the hard mask to the underlying layers is required. The lower temperature process also allows reduction of the overall thermal budget for a wafer.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: July 19, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Pramod Subramonium, Zhiyuan Fang, Jon Henri
  • Patent number: 7964107
    Abstract: Block copolymers can be self-assembled and used in methods as described herein for sub-lithographic patterning, for example. The block copolymers can be diblock copolymers, triblock copolymers, multiblock copolymers, or combinations thereof. Such methods can be useful for making devices that include, for example, sub-lithographic conductive lines.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: June 21, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward
  • Patent number: 7951723
    Abstract: A method and apparatus involve providing a substrate having a dielectric layer formed thereon, forming a photoresist mask over the dielectric layer, the photoresist mask defining an opening, etching the dielectric layer through the at least one opening in the photoresist mask, treating a portion of the photoresist mask with an etching species, and removing the treated photoresist mask with a supercritical fluid. The etching, treating, and removing can be performed in one chamber.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: May 31, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Ya Wang, Weng-Jin Wu, Henry Lo, Jean Wang
  • Patent number: 7947187
    Abstract: When forming an opening conforming to a groove of a quartz resonator in a metal film serving as a mask of the quartz resonator by conducting etching, the outer periphery of the metal film is wavingly etched. Therefore, when the groove is formed on the quartz resonator, the quartz resonator is formed according to the above-described metal film, which results in appearance defects or dimension defects. In order to solve the problems, the outer shape of the metal film is formed smaller than the outer shape of the quartz resonator before forming the opening conforming to the groove of the quartz resonator in the metal film, then etching of the metal film and etching of the quartz resonator are performed.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: May 24, 2011
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Takefumi Saito
  • Publication number: 20110117323
    Abstract: The present invention provides a surface processing method for forming recesses and protrusions on a surface of an object to be processed, at least including: a process for attaching a polymer film mask containing a binding resin and organic pigment particles which are contained in the binding resin on the surface of the object to be processed; and a process for etching the surface of the object to be processed to which the polymer film mask has been attached so as to form recesses and protrusions on the surface of the object to be processed. Also, the present invention provides a mask for surface processing used for the surface processing method.
    Type: Application
    Filed: June 18, 2009
    Publication date: May 19, 2011
    Applicant: FUJIFILM CORPORATION
    Inventor: Kimio Ichikawa
  • Patent number: 7938974
    Abstract: A method of fabricating a printhead having a hydrophobic ink ejection face, the method comprising the steps of: (a) providing a partially-fabricated printhead comprising a plurality of nozzle chambers and a nozzle plate having relatively hydrophilic nozzle surface, the nozzle surface at least partially defining the ink ejection face of the printhead; (b) defining a plurality of nozzle openings in the nozzle plate; (c) depositing a hydrophobic polymeric layer onto the nozzle surface; (d) depositing a protective metal film onto the polymeric layer; (e) subjecting the printhead to an oxidizing plasma; and (f) removing the protective metal film, thereby providing a printhead having a relatively hydrophobic ink ejection face. Step (b) may be performed immediately after any of steps (a), (c) or (d).
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: May 10, 2011
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Gregory John McAvoy, Misty Bagnat, Emma Rose Kerr, Kia Silverbrook
  • Patent number: 7922924
    Abstract: An internal filter includes a lower substrate and an upper substrate. Fluid passages are formed by etching grooves into the surface(s) of the upper and/or lower substrates, and/or in one or more intermediate layers. The filter pores extending between the fluid passages are formed by etching second grooves that fluidly connect the fluid passages. Two or more sets of the one or two intermediate layers can be implemented to provide additional filter passages and/or pores. Each set can be connected to a separate fluid source and/or a separate microfluidic device. In another internal filter, the inlet and outlet passages and the filter pores are formed on the same upper or lower substrate. The inlet and outlet passages are partially formed in a first step. In a second step, the inlet and outlet passages are completed at the same time that the filter pores are formed.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: April 12, 2011
    Assignee: Xerox Corporation
    Inventor: Gary A. Kneezel
  • Patent number: 7915115
    Abstract: Methods for forming a front-end-of-the-line (FEOL) dual high-k gate using a photoresist mask and structures thereof are disclosed. One embodiment of the disclosed method includes depositing a high-k dielectric film on a substrate of a FEOL CMOS structure followed by depositing a photoresist thereon; patterning the high-k dielectric according to the photoresist; and removing the photoresist thereafter. The removing of the photoresist includes using an organic solvent followed by removal of any residual photoresist including organic and/or carbon film. The removal of residual photoresist may include a degas process, alternatively known as a bake process. Alternatively, a nitrogen-hydrogen forming gas (i.e., a mixture of nitrogen and hydrogen) (N2/H2) or ammonia (NH3) may be used to remove the photoresist mask. With the use of the plasma nitrogen-hydrogen forming gas (N2/H2) or a plasma ammonia (NH3), no apparent organic residual is observed.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: March 29, 2011
    Assignees: International Business Machines Corporation, Advanced Micro Devices, Inc.
    Inventors: Michael P. Chudzik, Rashmi Jha, Naim Moumen, Keith Kwong Hon Wong, Ying H. Tsang
  • Patent number: 7906031
    Abstract: A Method. The method includes forming a substructure, on a substrate, including a feature having a sidewall of a first material and a bottom surface of a second material. Applying a solution including two immiscible polymers and third material to the substructure. The immiscible polymers include a first and second polymer. A selective chemical affinity of the first polymer for the material is greater than a selective chemical affinity of the second polymer for the material. The first polymer is segregated from the second polymer. The first polymer selectively migrates to the at least one sidewall, resulting in the first polymer being disposed between the at least one sidewall and the second polymer. The first polymer is selectively removed. The second polymer remains, resulting in forming structures including the substructure, the third material, and the second polymer. The substructure has a pattern. The pattern is transferred to the substrate.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: March 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joy Cheng, Daniel P. Sanders, Ratnam Sooriyakumaran
  • Patent number: 7897056
    Abstract: Disclosed are an apparatus for etching or stripping a substrate of a liquid crystal display device and a method thereof. The present invention includes carrying out an etching or stripping process on substrates using an etchant in a first etchant tank, counting a number of the substrates etched or stripped using the etchant in the first etchant tank, checking readiness of a second etchant tank at a predetermined point in time before the counted number reaches a maximum substrate number set up previously for the etchant tanks, and carrying out the etching or stripping process on the substrates using an etchant in the second etchant tank when the second etchant tank is in readiness for use and the counted number reaches the maximum substrate number.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: March 1, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Won Jae Lee, Dug Jang Lee
  • Patent number: 7862859
    Abstract: A method of correcting for pattern run out in a desired pattern in directional deposition or etching comprising the steps of providing a test substrate; providing a stencil of known thickness on the test substrate; providing a stencil pattern extending through the stencil to the test substrate.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: January 4, 2011
    Assignee: RFMD (UK) Limited
    Inventor: Jason McMonagle
  • Patent number: 7862732
    Abstract: In a method for forming micro lenses, a lens material layer made of an inorganic material is formed on a substrate, and an intermediate layer made of an organic material is formed on the lens material layer. Then, a mask layer made of an organic material is formed on the intermediate layer, and lens shapes are formed in the mask layer. The lens shapes of the mask layer are transcribed to the intermediate layer by etching the mask layer and the intermediate layer. Thereafter, the lens shapes of the intermediate layer are transcribed to the lens material layer to form micro lenses by etching the intermediate layer and the lens material layer using a processing gas containing SF6 gas and CHF3 gas.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: January 4, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Hiroki Amemiya
  • Patent number: 7862731
    Abstract: To form an isolation structure in a semiconductor substrate, at least two trenches are formed with a rib therebetween in the semiconductor substrate, and then the semiconductor material in the area of the trenches and particularly the rib is converted to an electrically insulating material. For example, this is accomplished by thermal oxidation of silicon semiconductor material of the rib.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: January 4, 2011
    Assignee: Conti Temic microelectronic GmbH
    Inventors: Matthias Aikele, Albert Engelhardt, Marcus Frey, Bernhard Schmid, Helmut Seidel
  • Patent number: 7838432
    Abstract: Methods to etch an opening in a substrate layer with reduced critical dimensions are described. A multi-layered mask including a lithographically patterned photoresist and an unpatterned organic antireflective coating (BARC) is formed over a substrate layer to be etched. The BARC layer is etched with a significant negative etch bias to reduce the critical dimension of the opening in the multi-layer mask below the lithographically define dimension in the photoresist. The significant negative etch bias of the BARC etch is then utilized to etch an opening having a reduced critical dimension into the substrate layer. To plasma etch an opening in the BARC with a significant negative etch bias, a polymerizing chemistry, such as CHF3 is employed. In a further embodiment, the polymerizing chemistry provide at low pressure is energized at a relatively low power with a high frequency capacitively coupled source.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: November 23, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Judy Wang, Shin-Li Sung, Shawming Ma
  • Publication number: 20100279228
    Abstract: One embodiment of the present invention provides a photosensitive organo-metallic hybrid material which functions as both a structural material and a photoresist material. More specifically, this photosensitive organo-metallic hybrid material includes an organo-metallic compound comprised of at least one unsaturated double bond. The photosensitive organo-metallic hybrid material also includes a cross-linking agent comprised of at least two unsaturated double bonds capable of cross-linking the organo-metallic compound to form an organo-metallic hybrid material. Additionally, the photosensitive organo-metallic hybrid material includes a photoactive compound capable of absorbing exposure light during a photolithography process to form the photosensitive organo-metallic hybrid material.
    Type: Application
    Filed: December 19, 2008
    Publication date: November 4, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Cristina Davis, Farrokh Yahgmaie, Huilan Han, Abhinav Bhushan
  • Patent number: 7807063
    Abstract: A solid polymer electrolyte composite membrane and method of manufacturing the same. According to one embodiment, the composite membrane comprises a rigid, non-electrically-conducting support, the support preferably being a sheet of polyimide having a thickness of about 7.5 to 15 microns. The support has a plurality of cylindrical pores extending perpendicularly between opposing top and bottom surfaces of the support. The pores, which preferably have a diameter of about 0.1 to 5 microns, are made by plasma etching and preferably are arranged in a defined pattern, for example, with fewer pores located in areas of high membrane stress and more pores located in areas of low membrane stress. The pores are filled with a first solid polymer electrolyte, such as a perfluorosulfonic acid (PFSA) polymer. A second solid polymer electrolyte, which may be the same as or different than the first solid polymer electrolyte, may be deposited over the top and/or bottom of the first solid polymer electrolyte.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: October 5, 2010
    Assignee: Giner Electrochemical Systems, LLC
    Inventors: Han Liu, Anthony B. LaConti
  • Publication number: 20100233429
    Abstract: A base plate having a surface on which a plurality of hydroxyl groups can be introduced, a metallic membrane disposed on the base plate and having a plurality of wells reaching the base plate, and a crosslinkable polymer membrane disposed on the metallic membrane are included.
    Type: Application
    Filed: September 6, 2006
    Publication date: September 16, 2010
    Applicant: YAMATAKE CORPORATION
    Inventors: Yasuhiro Goshoo, Takaaki Kuroiwa, Naohiro Ishikawa, Daisuke Obara, Shinsuke Yamasaki, Kazuko Sasaki, Yasuko Horiguchi
  • Patent number: 7795148
    Abstract: A method for removing a damaged dielectric material following an etch process, an ashing process, or a wet cleaning process is described. A dry, non-plasma removal process is implemented to remove a thin layer of damaged material on a feature following formation of the feature. The dry, non-plasma removal process includes a chemical treatment of the damaged material, followed by a thermal treatment of the chemically treated surface layer. The two steps, chemical and thermal treatment, can be repeated.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: September 14, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Ian J. Brown
  • Patent number: 7794613
    Abstract: A method of fabricating a printhead having a hydrophobic ink ejection face is provided. The method comprises the steps of: (a) providing a partially-fabricated printhead comprising a plurality of nozzle chambers and a relatively hydrophilic nozzle surface, the nozzle surface at least partially defining the ink ejection face; (b) depositing a layer of relatively hydrophobic polymeric material onto the nozzle surface, the polymeric material being resistant to removal by ashing; and (c) defining a plurality of nozzle openings in the nozzle surface, thereby providing a printhead having a relatively hydrophobic ink ejection face. Steps (b) and (c) may be performed in any order.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: September 14, 2010
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Gregory John McAvoy, Kia Silverbrook, Emma Rose Kerr, Misty Bagnat, Vincent Patrick Lawlor
  • Publication number: 20100193469
    Abstract: A method for manufacturing a micro/nano three-dimensional structure including the following steps is described. A mold is provided, and a pattern structure including a plurality of convex portions and concave portions is set in the mold. A transfer material layer including a first portion on the convex portions and a second portion on the concave portions is formed. A flexible substrate is disposed on the mold and contacts with the first portion of the transfer material layer. A heating step is performed to partially heat the flexible substrate through the first portion. A pressure is applied on the flexible substrate to adhere or press the first portion to the flexible substrate. The mold is removed. An etching step is performed on the flexible substrate by using the first portion of the transfer material layer as a mask to form a micro/nano three-dimensional structure in the flexible substrate.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 5, 2010
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Yung-Chun LEE, Chun-Hung CHEN, Te-Hui YU
  • Patent number: 7767104
    Abstract: A fabrication method in thin layers, for example of integrated electronic circuits or MEMS. A correction method allows design errors made for example by photolithography in a thin layer to be repaired, and without necessarily having to utilize a new mask or without having to correct an erroneous mask. A lithography device allows certain of operations of such a method to be employed.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: August 3, 2010
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Laurent Pain
  • Patent number: 7767099
    Abstract: The present invention is directed to the formation of sublithographic features in a semiconductor structure using self-assembling polymers. The self-assembling polymers are formed in openings in a hard mask, annealed and then etched, followed by etching of the underlying dielectric material. At least one sublithographic feature is formed according to this method. Also disclosed is an intermediate semiconductor structure in which at least one interconnect wiring feature has a dimension that is defined by a self-assembled block copolymer.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: August 3, 2010
    Assignee: International Business Machines Corporaiton
    Inventors: Wai-Kin Li, Haining S. Yang
  • Patent number: 7763319
    Abstract: A method of orienting microphase-separated domains is disclosed, comprising applying a composition comprising an orientation control component, and a block copolymer assembly component comprising a block copolymer having at least two microphase-separated domains in which the orientation control component is substantially immiscible with the block copolymer assembly component upon forming a film; and forming a compositionally vertically segregated film on the surface of the substrate from the composition. The orientation control component and block copolymer segregate during film forming to form the compositionally vertically-segregated film on the surface of a substrate, where the orientation control component is enriched adjacent to the surface of the compositionally segregated film adjacent to the surface of the substrate, and the block copolymer assembly is enriched at an air-surface interface.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: July 27, 2010
    Assignee: International Business Machines Corporation
    Inventors: Joy Cheng, Ho-Cheol Kim, Daniel P. Sanders, Linda Sundberg
  • Patent number: 7758759
    Abstract: A process for etching a metal or alloy surface which comprises applying an etch-resist ink by ink jet printing to selected areas of the metal or alloy, solidifying the etch-resist ink without the use of actinic light and/or particle beam radiation and then removing the exposed metal or alloy by a chemical etching process wherein the etch-resist ink comprises the components: A) 60 to 100 parts carrier vehicle comprising one or more components which contain at least one metal chelating group; D) 0 to 40 parts colorant; and E) 0 to 5 parts surfactant; wherein the ink has a viscosity of not greater than 30 cPs (mPa·s) at the firing temperature, all parts are by weight and the total number of parts A)+B)+C)=100.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: July 20, 2010
    Assignee: Fujifilm Imaging Colorants Limited
    Inventors: Mark Robert James, David Cottrell
  • Patent number: 7749915
    Abstract: A method of protecting a polymeric layer from contamination by a photoresist layer. The method includes: (a) forming a polymeric layer over a substrate; (b) forming a non-photoactive protection layer over the polymeric layer; (c) forming a photoresist layer over the protection layer; (d) exposing the photoresist layer to actinic radiation and developing the photoresist layer to form a patterned photoresist layer, thereby exposing regions of the protection layer; (e) etching through the protection layer and the polymeric layer where the protection layer is not protected by the patterned photoresist layer; (f) removing the patterned photoresist layer in a first removal process; and (g) removing the protection layer in a second removal process different from the first removal process.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Ute Drechsler, Urs T. Duerig, Jane Elizabeth Frommer, Bernd W. Gotsmann, James Lupton Hedrick, Armin W. Knoll, Tobias Kraus, Robert Dennis Miller