Abstract: A method of processing substrates, in one example microelectronic workpieces, is disclosed that includes forming a multi-layer metal hard mask (MHM) layer in which at least one lower layer of the multi-layer MHM is comprised of ruthenium (Ru). The Ru MHM layer may be an atomic layer deposition (ALD) Ru MHM layer formed over one or more underlying layers on a substrate. The ALD Ru MHM layer may be etched to provide a patterned ALD Ru MHM layer, and then the one or more underlying layers may be etched using, at least in part, the patterned ALD Ru MHM layer as a mask to protect portion of the one or more underlying layers. In one embodiment, at least one of the underlying layers is a hard mask layer.

Abstract: A capacitor is fabricated by generating a sheet of material that has a first active region that includes tunnels extending into an electrode metal. The sheet of material has a first inactive region that includes the electrode metal but does not include the tunnels extending into the electrode metal. The first inactive region has a first shape that includes multiple first projections that each projects from a perimeter of a circle. An electrode is removed from the sheet of material such that the electrode includes a portion of the inactive region. Additionally or alternately, fabricating a capacitor include using a first etching solution to etch a first sheet of material so as to generate a spent etchant. At least one chemical component is recovered from the spent etchant. A second etching solution is used to etch a second sheet of material. The second etchant includes at least one of the chemical components that was recovered from the spent etchant.

Abstract: Disclosed is a solid electrolytic capacitor 1 including capacitor elements 2A to 2C, an anode terminal 4, and a resin package body enclosing at least the capacitor elements, the capacitor elements 2A to 2C each including an anode body 6 having a porous portion as a surface layer, a dielectric layer 7, and a cathode part 8 covering at least part of the dielectric layer 7. The anode body 9 has a cathode forming portion and an anode thin-thickness portion adjacent to the cathode forming portion. The dielectric layer 7 covers at least part of a surface of the porous portion in the cathode forming portion. The porous portion is removed in the anode thin-thickness portion or is thinner in the anode thin-thickness portion than in the cathode forming portion. The anode body is connected to the anode terminal 4 at the anode thin-thickness portion.

Abstract: A patterning method includes sequentially forming a target layer, a first layer, a second layer, a third layer, and a first mask pattern. A first spacer is formed on a sidewall of the first mask layer. The first mask pattern is removed to form a plurality of peripheral openings surrounding a central opening in the first spacer. A rounding process is performed to round the peripheral openings and form a second mask pattern. A portion of the second layer is removed by using the second mask pattern as a mask, so as to form a third mask pattern. A second spacer is formed in the third mask pattern. The third mask pattern is removed. Portions of the first layer and the target layer are removed by using the second spacer as a mask.

Abstract: An example device for repairing a nerve is described herein. The device can include a flexible carrier layer made of a biologic material, and a metallic support member including a plurality of micro-protrusions extending therefrom. The metallic support member can be at least partially integrated with the flexible carrier layer. Additionally, the flexible carrier layer can be configured to cover at least a portion of the nerve, and the micro-protrusions can be configured to attach to a superficial tissue of the nerve.

Abstract: A description is given below of an intelligent semiconductor switch and also a method for operating an intelligent semiconductor switch integrated in a chip package. In accordance with one exemplary embodiment, the method comprises, in a first mode, in which a state control signal having a first logic level is received at a control terminal of the chip package, driving a first and a second semiconductor switch of a half-bridge in accordance with an input signal received at an input terminal of the chip package. In a second mode, in which a state control signal having a second logic level is received at the control terminal of the chip package, the method comprises setting an operating parameter depending on a pulse pastern of the input signal received at the input terminal.

Abstract: An acoustic wave device fabrication method includes: forming on a piezoelectric substrate a comb-shaped electrode and a wiring layer coupled to the comb-shaped electrode; forming on the piezoelectric substrate a first dielectric film having a film thickness greater than those of the comb-shaped electrode and the wiring layer, covering the comb-shaped electrode and the wiring layer, and being made of silicon oxide doped with an element or undoped silicon oxide; forming on the first dielectric film a second dielectric film having an aperture above the wiring layer; removing the first dielectric film exposed by the aperture of the second dielectric film by wet etching using an etching liquid causing an etching rate of the second dielectric film to be less than that of the first dielectric film so that the first dielectric film is left so as to cover an end face of the wiring layer and the comb-shaped electrode.

Abstract: A device for ascertaining the orientation of a drill relative to a plane, the device being capable of being connected to the drill, the device having a laser distance measuring unit by which, from a prespecified position relative to the plane, a first distance to a first point in the plane and a second distance to a second point in the plane can be measured, and having an evaluation unit that is configured such that on the basis of the first distance and the second distance the orientation of the device relative to the plane can be ascertained.

Abstract: There is provided a method for manufacturing a ferroelectric thin film device including: a lower electrode film formation step of forming a lower electrode film on a substrate; a ferroelectric thin film formation step of forming a ferroelectric thin film made of a potassium sodium niobate on the lower electrode film; a ferroelectric thin film etching step of shaping the ferroelectric thin film into a desired micro-pattern by etching; and a thin film laminated substrate cleaning step of cleaning the substrate provided the ferroelectric thin film having a desired micro-pattern as a whole with a predetermined cleaning solution after the ferroelectric thin film etching step. The predetermined cleaning solution is a solution mixture containing hydrofluoric acid and ammonium fluoride, the hydrofluoric acid in the solution mixture having a molarity of 0.5 M or more and less than 5 M.

Abstract: The present invention provides a thin film capacitor including a first electrode layer, a second electrode layer, and a dielectric layer provided between the first electrode layer and the second electrode layer, wherein a ratio (S/S0) of a surface area S of a surface of the first electrode layer on an opposite side to the dielectric layer to a projected area S0 in a thickness direction of the first electrode layer is 1.01 to 5.00.

Abstract: Provided is a method of manufacturing a porous current collector, which can fabricate a porous current collector in such a way as to fabricate alcohol-resolvable resin as an etch mask pattern by printing polyhydric alcohol on a surface of the alcohol-resolvable resin in a pattern and to form a plurality of through holes in a metal sheet using the etch mask pattern. The method includes the steps of forming an alcohol-resolvable resin layer by coating alcohol-resolvable resin on a surface of a metal sheet, forming an alcohol-resolvable mask pattern layer by printing polyhydric alcohol on a surface of the alcohol-resolvable resin layer after the alcohol-resolvable resin layer is formed, and etching the metal sheet so that a plurality of through holes is formed in the metal sheet using the alcohol-resolvable mask pattern layer as a mask after the alcohol-resolvable pattern layer is formed.

Abstract: A liquid immersion transfer process for applying electronics on a 3D object and a system is disclosed. In one embodiment, the process comprises providing a foil on a solid carrier in a foil provision stage, providing electronic wiring and an electronic component to the foil in an electronics provision stage, to provide said electronics, removing the solid carrier and arranging the foil on or in a liquid in a liquid application stage, and transferring the electronics to the 3D object in a transfer stage, as well as a 3D object obtainable by such process.

Abstract: In one exemplary embodiment of the invention, an apparatus includes: at least one functional circuit; and an electrically-conductive protective layer on a protected surface of the apparatus, where the protective layer is arranged to be substantially opaque to incident light, where at least one portion of the protective layer is electrically isolated from a remainder of the protective layer, where the at least one portion is a plate of a capacitor for coupling at least one signal to said at least one functional circuit.

Abstract: A transistor gate dielectric including a first dielectric material having a first dielectric constant and a second dielectric material having a second dielectric constant different from the first dielectric constant.

Abstract: A capacitor forming method includes forming an electrically conductive support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 25 at % carbon. Another capacitor forming method includes forming a support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 20 at % carbon. The support material has a thickness and the opening has an aspect ratio 20:1 or greater within the thickness of the support material.

Abstract: A method for producing a capacitor including an array of nanocapacitors, in which the following operations are performed using a mold having a sealed surface, as a lower surface, and a top surface through which a network of pores extend: (a) filling the pores of the mold and covering a top surface of the mold with an electrically conductive material, to form a structure including an array of nanoscale objects connected by a single substrate; (b) removing the mold; (c) depositing, on an outline of the structure obtained at the end of (b), at least one bilayer including a first layer of an electrically insulating material and a second layer of an electrically conductive material; and then (d) locally removing the at least one bilayer deposited in (c) from the substrate to form the electrical contact.

Abstract: In an aspect of the invention, an array of microprotrusions is formed by providing a mold with cavities corresponding to the negative of the microprotrusions, casting atop the mold a first solution comprising a biocompatible material and a solvent, removing the solvent, casting a second solution atop the first cast solution, removing the solvent from the second solution, and demolding the resulting array from the mold. The first solution preferably contains an active ingredient.

Abstract: A method for production of a capacitive sensor including a carrier whereupon electrodes separated from each other by a porous material rest, the porous material being made by porosifying trenches formed in a carrier.

Abstract: A capacitor structure includes at least two capacitors. A first electrode includes a bottom conductive plane and first vertical conductive structures. The bottom conductive plane is disposed over a substrate. The bottom conductive plane has a first area and a first shape. At least two second electrodes include top conductive planes and second vertical conductive structures. A combined area of the top conductive planes and a gap area between adjacent top conductive planes has a second area and a second shape. The first area and the second area are about the same and the first shape and the second shape are about the same. An insulating structure is disposed between the first electrode and the second electrodes. The first vertical conductive structures and the second vertical conductive structures are interlaced with each other. The capacitors share the bottom conductive plane and have separate top conductive planes.

Abstract: A method and system for integrated circuit fabrication is disclosed. In an example, the method includes determining a first process parameter of a wafer and a second process parameter of the wafer, the first process parameter and the second process parameter corresponding to different wafer characteristics; determining a variation of a device parameter of the wafer based on the first process parameter and the second process parameter; constructing a model for the device parameter as a function of the first process parameter and the second process parameter based on the determined variation of the device parameter of the wafer; and performing a fabrication process based on the model.

Abstract: The present disclosure provides a touch screen sensing device, a method for manufacturing the same, and a touch screen sensing assembly having the same. The touch screen sensing device includes a COA structure including a TFT and a multilayer color film configured on the TFT, a common electrode located above the COA structure and corresponding to an upper portion of the multilayer color film, a capacitor electrode configured between the common electrode and the COA structure, and a spacer configured between the common electrode and the COA structure to space the lateral section from the capacitor electrode. The capacitor electrode includes a lateral section located on an upper portion of the multilayer color film and an extending section extending from one end of the lateral section and covering a side portion of the multilayer color film.

Abstract: An all-silicon electrode capacitive transducer comprising: a movable silicon microstructure coupled to a glass substrate, the movable silicon microstructure having a movable silicon electrode, the glass substrate having a top surface and at least one recess, the movable silicon electrode having a first flat surface parallel to a plane of the top surface of the glass substrate, the movable silicon electrode having a first electronic work function; and a stationary silicon electrode coupled to a glass substrate, the stationary silicon electrode located adjacent to the movable silicon electrode, the stationary silicon electrode configured to sense or actuate displacement of the movable silicon microstructure, wherein the stationary silicon electrode has a second flat surface parallel to the first flat surface, the stationary silicon electrode having a second electronic work function equal to the first electronic work function.

Abstract: A capacitance type transducer includes a plurality of cells each having a structure in which a vibrating film is supposed so as to be vibrated. The vibrating film includes: a second electrode formed so that a gap is interposed between the second electrode and a first electrode; and an insulating film formed on the second electrode. The capacitance transducer manufacturing method includes: forming a sacrificial layer on the first electrode; forming a layer including a vibrating film on the sacrificial layer; forming an etching hole to remove the sacrificial layer; and forming a sealing film for sealing the etching hole. Before forming the etching hole to remove the sacrificial layer, a through hole is formed in an insulating film on the second electrode, and a conductor film is formed on the insulating film having the through hole to electrically connect a conductor in the through hole and the second electrode.

Abstract: Systems and methods are provided for fabricating a thin film capacitor involving depositing an electrode layer of conductive material on top of a substrate material, depositing a first layer of ferroelectric material on top of the substrate material using a metal organic deposition or chemical solution deposition process, depositing a second layer of ferroelectric material on top of the first layer using a high temperature sputter process and depositing a metal interconnect layer to provide electric connections to layers of the capacitor.

Abstract: One of objects is to reduce the effect caused by the volume expansion of an active material. An embodiment is a method for manufacturing an electrode for a power storage device which includes an active material over one of surfaces of a current collector. The active material is formed by forming a conductive body functioning as the current collector; forming a mixed layer including an amorphous region and a microcrystalline region over one of surfaces of the conductive body; and etching the mixed layer selectively, so that a part of or the whole of the amorphous region is removed and the microcrystalline region is exposed. Thus, the effect caused by the volume expansion of the active material is reduced.

Abstract: The embodiment of the present invention discloses a touch screen, its manufacturing method and a display device. The method comprise the following steps: first, forming patterns of shielding layer on a substrate; then forming patterns of bridging layer and peripheral traces on the shielding layer by a single patterning process; thereafter, forming patterns of insulating layer on the peripheral traces; and finally, forming patterns of touch control electrode layer. In the present invention, the patterning of the bridging layer and peripheral traces can be achieved by a single patterning process using a mask plate, which reduces the number of patterning processes in the manufacturing process and improves the manufacturing efficiency of the touch screen thereby reducing the cost of production.

Abstract: A method of fabricating a capacitance touch panel module includes forming a plurality of first conductive patterns on a substrate comprising a touching area and a peripheral area along a first orientation, a plurality of second conductive patterns along a second orientation, and a plurality of connecting portions in the touching area; forming a plurality of insulated protrusions, in which each insulated protrusion covering one connecting portion, and forming an insulated frame on the peripheral area; and forming a bridging member on each insulated protrusion.

Abstract: A method of fabricating a capacitance touch panel module includes forming a plurality of first conductive patterns on a substrate comprising a touching area and a peripheral area along a first orientation, a plurality of second conductive patterns along a second orientation, and a plurality of connecting portions in the touching area; forming a plurality of insulated protrusions, in which each insulated protrusion covering one connecting portion, and forming an insulated frame on the peripheral area; and forming a bridging member on each insulated protrusion.

Abstract: An apparatus, system, and/or method are described to enable optically transparent reconfigurable integrated electrical components, such as antennas and RF circuits to be integrated into an optically transparent host platform, such as glass. In one embodiment, an Ag NW film may be configured as a transparent conductor for antennas and/or as interconnects for passive circuit components, such as capacitors or resistors. Ag NW may also be used as transmission lines and/or interconnect overlays for devices. A graphene film may also be configured as active channel material for making active RF devices, such as amplifiers and switches.

Abstract: A capacitive acceleration sensor with an “H”-shaped beam and a preparation method. The sensor at least includes: a first electrode structural layer, a middle structural layer and a second electrode structural layer; the first electrode structural layer and the second electrode structural layer are provided with electrode lead via holes, respectively; the middle structural layer includes: a frame formed at SOI silicon substrate having a double device layer, a seismic mass whose double sides are symmetrical, and an “H”-shaped elastic beam whose double sides are symmetrical, with one end connected to the frame and the other end connected to the seismic mass, there are anti-overloading bumps and damping grooves symmetrically provided on the two sides of the seismic mass, and the “H”-shaped elastic beam and a bulk silicon layer of the oxygen containing silicon substrate satisfy the requirements therebetween: ?{square root over (2)}(a+b+c)<h, ?{square root over (2)}d<h.

Abstract: A method for making a touch panel is provided. A number of first transparent conductive layers are formed on an insulative substrate. Each of the first transparent conductive layers is resistance anisotropy. An adhesive layer is formed on the insulative substrate to cover only part of the first transparent conductive layers. A carbon nanotube layer is formed on the adhesive layer. The carbon nanotube layer is patterned to obtain a number of second transparent conductive layers spaced from each other and with each corresponding to one first transparent conductive layer. A number of first electrodes, a first conductive trace, a number of second electrodes, and a second conductive trace are formed contemporaneously.

Abstract: A touch panel is provided. The touch panel includes a window, a sensor layer formed on a visible area of the window and comprising sensor patterns for detecting an input, a light shielding layer formed on a non-visible area of the window located around the sensor layer, wiring electrodes formed on the light shielding layer and connected to the sensor patterns such that the sensor layer is connected to an external connector, and etching masks formed on the wiring electrodes, respectively.

Abstract: A method for manufacturing a capacitive transducer is provided having a structure in which a vibrating film is supported to be able to vibrate. The method includes forming a sacrificial layer on a first electrode; forming a layer on the sacrificial layer, the layer forming at least part of the vibrating film; removing the sacrificial layer, including forming etching holes to communicate with the sacrificial layer; forming a sealing layer for sealing the etching holes; and etching at least part of the sealing layer. Before forming the sealing layer, an etching stop layer is formed on the layer forming at least part of the vibrating film. In the step of etching at least part of the sealing layer, the sealing layer is removed until the etching stop layer is reached.

Abstract: An energy storage device includes a middle section (610) including a plurality of double-sided porous structures (500), each of which contain multiple channels (511) in two opposing surfaces (515, 525) thereof, an upper section (620) comprising a single-sided porous structure (621) containing multiple channels (622) in a surface (625) thereof, and a lower section (630) including a single-sided porous structure (631) containing multiple channels (632) in a surface (635) thereof.

Abstract: An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.

Abstract: An energy storage device comprises at least one porous structure (500, 900) containing multiple channels (510), each one of which has an opening to a surface (505) of the porous structure. Each one of the channels has a first end (511) having a first average width (513) and a second end (512) having a second average width (514), with the first end being located where the channel opens to the surface of the porous structure and the second end being located at a distance from the first end as measured along a length of the channel. For at least some of the channels, the first average width is larger than the second average width.

Abstract: Ultracapacitor electrodes having an enhanced electrolyte-accessible surface area are provided. Such electrodes can include a porous substrate having a solution side and a collector side, the collector side operable to couple to a current collector and the solution side positioned to interact with an electrolytic solution when in use. The electrode can also include a conductive coating formed on the solution side of the porous substrate. The coating can have a first side positioned to interact with an electrolytic solution when in use and a second side opposite the first side. The coating can have discontinuous regions that allow access of an electrolyte solution to the second side during use to enhance electrolyte-accessible surface area of the conductive coating.

Abstract: A method for producing a mirror plate for a Fabry-Perot interferometer includes providing a base slab, which includes a substrate coated with a reflective multilayer coating, forming one or more intermediate layers on the base slab such that the lowermost intermediate layer substantially consists of silica, and such that the multilayer coating is at least partially covered by the lowermost intermediate layer, forming one or more capacitive sensor electrodes by depositing conductive material on top of the intermediate layers, and removing material of the lowermost intermediate layer by etching in order to form an exposed aperture portion of the multilayer coating.

Abstract: In a MEMS device, the manner in which the membrane lands over the RF electrode can affect device performance. Bumps or stoppers placed over the RF electrode can be used to control the landing of the membrane and thus, the capacitance of the MEMS device. The shape and location of the bumps or stoppers can be tailored to ensure proper landing of the membrane, even when over-voltage is applied. Additionally, bumps or stoppers may be applied on the membrane itself to control the landing of the membrane on the roof or top electrode of the MEMS device.

Abstract: A method of forming a capacitor comprises forming a first electrode of the capacitor over a substrate. The first electrode includes a bottom conductive plane and a plurality of first vertical conductive structures on the bottom conductive plane. The method also comprises forming an insulating structure over the first electrode. The method further comprises forming a second electrode of the capacitor over the insulating structure. The second electrode includes a top conductive plane and a plurality of second vertical conductive structures under the top conductive plane. The first vertical conductive structures of the plurality of first vertical conductive structures and the second vertical conductive structures of the plurality of second vertical conductive structures are interlaced with each other.

Abstract: A capacitor forming method includes forming an electrically conductive support material over a substrate, with the support material containing at least 25 at % carbon. The method includes forming an opening through at least the support material where the opening has an aspect ratio of at least 20:1 within a thickness of the support material. After forming the opening, the method includes processing the support material to effect a reduction in conductivity, and forming a capacitor structure in the opening.

Abstract: A beverage holding device comprising a container and a removably engageable lid. The container includes a partition extending between opposing sides of the sidewall of the container to define a plurality of separated cavities. The partition includes an edge surface forming an interior seal against a lower surface of the lid upon an engagement of the lid with the container for maintaining the plurality of cavities fluidly separated. A plurality of apertures in offset elevated positions above an upper surface of the lid are provided, with each communicating with a respective one of the plurality of cavities. The elevated and offset apertures provide a respective relief area to accommodate a projecting nose of a user during an engagement of the user's mouth with a respective aperture while tipping the container.

Abstract: A transducer includes at least one element including a plurality of cells. Each of the cells includes a pair of electrodes disposed with a gap therebetween and a vibrating membrane including one of the electrodes, and the vibrating membrane is vibratably supported. First and second cells of the plurality of cells in the element have the gaps that communicate with each other, and the first cell and a third cell in the element have the gaps that do not communicate with each other.

Abstract: The disclosure describes an improved electrode with high voltage standoff characteristics and improved graphene-based materials and methods of making them for use therein. A graphene-based thin film material is described that may be applied or transferred to a current collector to create the improved electrode. The thin film comprises high aspect ratio graphene platelets applied to the surface of a current collector or other substrate in a known ratio to a film binder material. The film is produced with a desired layer thickness and graphene-to-binder ratio to produce a desired voltage standoff for the electrode. The film may include additional materials to achieve the desired dielectric and mechanical characteristics for the application, such as ferroelectric ceramic nanorods with a high aspect ratio and high dielectric constant and/or graphene sheets.

Abstract: A capacitive switch includes: a first conductive cantilever, a second conductive cantilever, a substrate, a coplanar waveguide arranged on the substrate, the coplanar waveguide includes a first conductor configured to transmit an electrical signal, a second conductor and a third conductor are arranged as ground wires on two sides of the first conductor; an insulation medium layer is arranged on the first conductor, a conducting layer is arranged on the insulation medium layer; the first conductive cantilever is connected to the second conductor by using a first fixed end, the second conductive cantilever is connected to the third conductor by using a second fixed end; when a direct-current signal is transmitted on the capacitive switch, a first free end of the first conductive cantilever and a second free end of the second conductive cantilever contact the conducting layer.

Abstract: A configuration of a touch panel in which an electrode pattern is not readily visible is attained in the present invention. A touch panel (1) is provided with an insulating substrate (10), first island-shaped electrodes (121) formed on the substrate (10) and arranged in one direction, second island-shaped electrodes (111) formed on the substrate (10) and arranged in a direction intersecting the direction in which the first island-shaped electrodes (121) are arranged, a first connecting member (122) for connecting the first island-shaped electrodes (121), a metallic film (17) formed on the first connecting member (122), an insulating film (16) formed so as to completely cover the metallic film (17), and a second connecting member (112) for connecting the second island-shaped electrodes (111) over the insulating film (16).

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming an electrochemical capacitor device by forming pores in low-purity silicon materials. Various embodiments described herein enable the fabrication of high capacitive devices using low cost techniques.

Abstract: An aluminum slug anode usable in capacitors is produced from multiple-stacked layers of aluminum foils. The foils are stacked (possibly after cutting them to have an area similar to the area desired for the anode), hot-pressed, sintered, and anodized to generate the anode. A contact in electrical communication with the foils is formed, as by welding a contact across at least some of the foils. A capacitor casing be formed by situating the anode within a casing which serves as a cathode, with the anode being wrapped in a dielectric such as separator paper.

Abstract: Systems, devices, and methods for micro-electro-mechanical system (MEMS) tunable capacitors can include a fixed actuation electrode attached to a substrate, a fixed capacitive electrode attached to the substrate, and a movable component positioned above the substrate and movable with respect to the fixed actuation electrode and the fixed capacitive electrode. The movable component can include a movable actuation electrode positioned above the fixed actuation electrode and a movable capacitive electrode positioned above the fixed capacitive electrode. At least a portion of the movable capacitive electrode can be spaced apart from the fixed capacitive electrode by a first gap, and the movable actuation electrode can be spaced apart from the fixed actuation electrode by a second gap that is larger than the first gap.

Abstract: A method for making a capacitive touch sensitive housing, comprises: forming a non-patterned active metal layer on a housing wall; patterning the non-patterned active metal layer on the housing wall by laser ablation such that the non-patterned active metal layer is formed into a patterned active metal layer including a plurality of plating portions separated from each other, and a plurality of non-plating portions separated from the plating portions; and forming a metal layer on the patterned active metal layer such that the metal layer has first portions formed on the plating portions of the patterned active metal layer, and second portions formed on the non-plating portions of the patterned active metal layer.