Etchant Contains Solid Particle (e.g., Abrasive For Polishing, Etc.) Patents (Class 216/89)
  • Patent number: 7250112
    Abstract: A method for making an angular velocity sensor having two masses which are laterally disposed in an X-Y plane and indirectly connected to a frame is provided. The two masses are linked together by a linkage such that they necessarily move in opposite directions along Z. Angular velocity of the sensor about the Y axis can be sensed by driving the two masses into Z-directed antiphase oscillation and measuring the angular oscillation amplitude thereby imparted to the frame.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: July 31, 2007
    Assignee: InvenSense Inc
    Inventors: Steven S. Nasiri, Anthony Francis Flannery, Jr.
  • Patent number: 7247256
    Abstract: A first chemical mechanical polishing (CMP) slurry includes a polishing agent, an oxidant, a pH control additive, and an oxide film removal retarder which reduces a removal rate of the silicon oxide film. A second chemical mechanical polishing (CMP) slurry includes a polishing agent, an oxidant, a pH control additive, an oxide film removal retarder which reduces a removal rate of silicon oxide, and a defect prevention agent which inhibits scratch defects and/or corrosion defects at a surface of an aluminum film. In a one-step CMP process, either of the first or second slurry is used throughout CMP of an aluminum layer until an upper surface of an underlying silicon oxide layer is exposed. In a two-step CMP process, the first slurry is used in an initial CMP of the aluminum layer, and then the second slurry is used in a subsequent CMP until the upper surface of the underlying silicon layer is exposed.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: July 24, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-heon Park, Jae-dong Lee, Sung-jun Kim, Chang-ki Hong
  • Patent number: 7232528
    Abstract: The surface treatment agent for copper and copper alloys contains hydrogen peroxide, a mineral acid, an azole compound, silver ion and a halide ion. The surface treatment agent for copper and copper alloys is useful in the production of printed wiring boards in electronics industry. The surface treatment agent roughens the surface of copper and copper alloys. Particularly, the surface treatment agent can form a uniform and undulation-free roughened surface on copper-clad substrates having plated mirror surface, this having been difficult in conventional techniques, thereby significantly improving the adhesion to etching resists, solder resists, in addition, to prepregs and a resin for mounting electronic parts.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: June 19, 2007
    Assignee: Mitsubishi Gas Chemical Company, Inc.
    Inventors: Akira Hosomi, Naoki Kogure, Kenichi Moriyama, Kenichi Takahashi, Atsushi Hosoda, Kazuhiko Ikeda
  • Patent number: 7199053
    Abstract: Disclosed is a method for detecting an end-point of a CMP process of a semiconductor device. More specifically, when all polishing processes are performed using a nitride film as a polishing barrier film, a buffer layer including nitrogen is formed on the nitride film and a polishing process is performed. Then, the concentration of NO from ammonia gas generated from the buffer layer is detected so that the nitride film may be polished to a desired target without damage of the nitride film. As a result, an end-point can be set.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: April 3, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jong Goo Jung
  • Patent number: 7196011
    Abstract: The present invention relates to a polishing apparatus for polishing a workpiece such as a semiconductor wafer to a flat mirror finish, and more particularly to a polishing apparatus having a workpiece transfer robot for transferring a workpiece from one operation to the next. The polishing apparatus according to the present invention comprises a polishing section including a top ring for holding a workpiece to be polished and a turntable having a polishing surface for polishing a surface of the workpiece held by the top ring; a cleaning section including a cleaning device for cleaning the workpiece that has been polished in the polishing section; and a workpiece transfer robot for transferring the workpiece to be polished to the polishing section or for transferring the workpiece that has been polished to the cleaning section.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: March 27, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Woo Cho, Jae-Phil Boo, Myung-Seok Kim, Jong-Muk Kang, Ik-Joo Kim, Jung-Hwan Sung, Ki-Hong Jung, Keon-Sik Seo
  • Patent number: 7163644
    Abstract: A CMP abrasive comprising a cerium oxide slurry containing cerium oxide particles, a dispersant and water, and a liquid additive containing a dispersant and water; and a liquid additive for the CMP abrasive. A method for polishing a substrate which comprises holding a substrate having, formed thereon, a film to be polished against a polishing pad of a polishing platen, followed by pressing, and moving the substrate and the polishing platen while supplying the above CMP abrasive in between the film to be polished and the polishing pad to thereby polish the film to be polished. The CMP abrasive and the method for polishing can be used for polishing a surface to be polished such as a silicone oxide film or a silicon nitride film without contaminating the surface to be polished with an alkali metal such as sodium ions and with no flaws, and the CMP abrasive is excellent in storage stability.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: January 16, 2007
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Toshihiko Akahori, Toranosuke Ashizawa, Keizo Hirai, Miho Kurihara, Masato Yoshida, Yasushi Kurata
  • Patent number: 7138072
    Abstract: Methods and apparatuses for planarizing microelectronic substrate assemblies on fixed-abrasive polishing pads with non-abrasive lubricating planarizing solutions. One aspect of the invention is to deposit a lubricating planarizing solution without abrasive particles onto a fixed-abrasive polishing pad having a body, a planarizing surface on the body, and a plurality of abrasive particles fixedly attached to the body at the planarizing surface. The front face of a substrate assembly is pressed against the lubricating planarizing solution and at least a portion of the fixed abrasive particles on the planarizing surface of the polishing pad. At least one of the polishing pad or the substrate assembly is then moved with respect to the other to impart relative motion therebetween. As the substrate assembly moves relative to the polishing pad, regions of the front face are separated from the abrasive particles in the polishing pad by a lubricant-additive in the lubricating planarizing solution.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: November 21, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Gundu M. Sabde, Whonchee Lee
  • Patent number: 7135124
    Abstract: In accordance with the foregoing objects and advantages, the present invention provides a fabrication device that may be used during the grinding operation of the fabrication process. The fabrication device comprises a socket plate that includes a plurality of cavities formed therein that correspond in position and number to the solder (or other conductive material) bumps formed on the front surface of a product wafer.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: November 14, 2006
    Assignee: International Business Machines Corporation
    Inventors: Timothy C. Krywanczyk, Edmund J. Sprogis
  • Patent number: 7094131
    Abstract: A microelectronic substrate and method for removing conductive material from a microelectronic substrate. In one embodiment, the microelectronic substrate includes a conductive or semiconductive material with a recess having an initially sharp corner at the surface of the conductive material. The corner can be blunted or rounded, for example, by applying a voltage to an electrode in fluid communication with an electrolytic fluid disposed adjacent to the corner. Electrical current flowing through the corner from the electrode can oxidize the conductive material at the corner, and the oxidized material can be removed with a chemical etch process.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: August 22, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Whonchee Lee, Scott G. Meikle, Scott E. Moore
  • Patent number: 7090786
    Abstract: The aqueous dispersion comprising (A) abrasive grains, (B) at least one compound selected from the group consisting of 2-bromo-2-nitro-1,3-propanediol, 2-bromo-2-nitro-1, 3-butanediol, 2,2-dibromo-2-nitroethanol, and 2,2-dibromo-3-nitrilopropionamide, and (C) an organic component other than the compounds of component (B) is disclosed. The aqueous dispersion has no problem of rotting even if stored or used in a neutral pH region and produces an excellent polished surface with almost no dishing or scratches, when applied particularly to the STI process for manufacturing of semiconductor devices.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: August 15, 2006
    Assignee: JSR Corporation
    Inventors: Masayuki Hattori, Nobuo Kawahashi
  • Patent number: 7081417
    Abstract: To provide a planarization method which does not depend upon the size and the density of a wiring pattern and in which a reliable wiring system and a Josephson device can be formed and wiring structure, an insulation layer is planarized by forming a reversal pattern mask of wiring and selectively removing the insulation layer on the wiring.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: July 25, 2006
    Assignees: Hitachi, Ltd., NEC Corporation, International Superconductivity Technology Center, the Judicial Foundation
    Inventors: Kenji Hinode, Shuichi Nagasawa, Yoshihiro Kitagawa, Mutsuo Hidaka, Keiichi Tanabe
  • Patent number: 7074725
    Abstract: An improved method of manufacturing a capacitor on a semiconductor substrate is disclosed. A portion of an insulation film on a semiconductor substrate is etched to form a first opening in the insulation film. A passivation film is formed on the insulation film and within the first opening thereof. A portion of the passivation film on a bottom of the first opening is thinner than portions of the passivation film on the insulation film and on a sidewall of the first opening. The passivation film is etched to expose the bottom of the first opening.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: July 11, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Sik Hong, Young-Ki Hong, Tae-Hyuk Ahn, Jong-Seo Hong
  • Patent number: 7070703
    Abstract: A polished glass disk is prepared for a magnetically recordable coating by texturing the surfaces with a highly abrasive material being abrasively engaged with the surfaces as the disk is rotated, thereby creating a relatively coarse texture with the abrasions concentric with the axis of rotation of the disk. Thereafter, the roughness of the texturing is reduced by abrading the surface of the disk with a polishing pad and an etchant slurry of colloidal silica. The etchant component has the property of attacking or softening the glass disk during the fine polishing with the colloidal silica slurry. As both the texturing step and the fine polishing step deposit a plurality of concentric abrasions on a glass disk, these abrasions aid in retaining the magnetically recordable coating deposited thereon to complete a magnetically recordable disk for use as a data storage member.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: July 4, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Frederick P. Benning, Steven L. Maynard, David C. Paurus, Jon Edward Podolske
  • Patent number: 7060197
    Abstract: In a mass flow sensor having a layered structure on the upper side of a silicon substrate (1), and having at least one heating element (8) patterned out of a conductive layer in the layered structure, thermal insulation between the heating element (8) and the silicon substrate (1) is achieved by way of a silicon dioxide block (5) which is produced beneath the heating element (8) either in the layered structure on the silicon substrate (1) or in the upper side of the silicon substrate (1). As a result, the sensor can be manufactured by surface micromechanics, i.e. without wafer back-side processes.
    Type: Grant
    Filed: June 8, 2002
    Date of Patent: June 13, 2006
    Assignee: Robert Bosch GmbH
    Inventors: Matthias Fuertsch, Frank Fischer, Lars Metzger, Frieder Sundermeier
  • Patent number: 7052625
    Abstract: A slurry containing abrasive particles, an oxidizing agent having a low static etch rate on at least one acid or salt metal, and having a pH of about 5 to about 11 is especially useful for polishing surfaces, including both metal and silicon dioxide, such as present in microelectronics, at the same or substantially the same polishing rates.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: May 30, 2006
    Assignee: International Business Machines Corporation
    Inventors: Timothy Scott Chamberlin, Michael J. MacDonald, Mark P. Murray
  • Patent number: 7041229
    Abstract: To provide a manufacturing method for simultaneously forming machined patterns different in dept in a small number of steps and a machined pattern having a U-shaped sectional form in which depths and widths are smoothly changed. Mask patterns 62 respectively having a semicircular sectional form and mask patterns 65 respectively having a V-shaped sectional form are formed at different opening widths 63 and 64 respectively to perform sandblasting by using the mask patterns 62 and 65 as masks. Though a deep groove is formed between the semicircular-sectional-form mask patterns 62, a shallow groove is formed between the V-shaped-sectional-form mask patterns 65.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: May 9, 2006
    Assignee: Pioneer Corporation
    Inventor: Yoshitaka Kawanishi
  • Patent number: 7041599
    Abstract: High through-put Cu CMP is achieved with reduced erosion and dishing by a multi-step polishing technique. Deposited Cu is polished with fixed abrasive polishing pads initially at a high removal rate and subsequently at a reduced removal rate and high Cu:barrier layer (Ta) selectivity. Embodiments of the present invention include reducing dishing by: controlling platen rotating speeds; increasing the concentration of active chemicals; and cleaning the polishing pads between wafers. Embodiments also include removing particulate material during CMP by increasing the flow rate of the chemical agent or controlling the static etching rate between about 100 ? and about 150 ? per minute, and recycling the chemical agent. Embodiments further include flowing an inhibitor across the wafer surface after each CMP step to reduce the static etching rate.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: May 9, 2006
    Assignee: Applied Materials Inc.
    Inventors: Shijian Li, Fred C. Redeker, John White, Ramin Emami
  • Patent number: 7037839
    Abstract: A method for polishing an organic film, comprising polishing an exposed organic film provided on a semiconductor substrate by use of slurry containing resin particles.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: May 2, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Takayasu, Satoshi Murakami
  • Patent number: 7029596
    Abstract: A new method is provided that extends the process of automation of the CMP process by monitoring the in-line removal rate, by using methods of curve-fitting that enable a reduction in the frequency of monitoring the removal rate of the CMP process, by enhancing the life expectancy of the polishing pad thereby further reducing the frequency of the required Preventive Maintenance and by allowing for the polishing of non-standard lots of wafers.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: April 18, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Heng Chang Hsieh, Wen-Cheng Chien
  • Patent number: 7022248
    Abstract: A method for patterning a self-aligned coil using a damascene process is disclosed. Coil pockets are formed in a first insulation layer disposed over a first pole layer. A barrier/seed layer is deposited along walls of the coil pockets in the insulation layer. Copper is formed in the coil pockets and over the insulation layer. The copper is planarized down to the insulation layer. The self-aligned coil process packs more copper into the same coil pocket and relaxes the coil alignment tolerance. Protrusions are prevented because of the more efficient and uniform spacing of the coil to reduce heat buildup in the head during a write.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: April 4, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Daniel Wayne Bedell, Quang Le, Edward Hin Pong Lee, Son Van Nguyen, Vladimir Nikitin, Murali Ramasubramanian
  • Patent number: 7014537
    Abstract: A post-CMP cleaning process includes brush cleaning a CMPed surface, followed by at least partially drying the CMPed surface, followed by spray cleaning the CMPed surface. A method of cleaning residue from registration alignment markings formed on a semiconductor substrate includes polishing a material within which the registration alignment markings are received with a polishing solution comprising a liquid and a solid, followed by brush cleaning a remaining outermost polished surface, followed by at least partially drying the polished surface, followed by spray cleaning the outermost polished surface. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: March 21, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Michael T. Andreas
  • Patent number: 6995091
    Abstract: The invention relates to a process for chemically mechanically polishing and grinding wafers. The CMP slurry that is used for grinding is analyzed using slurry atomic absorption spectroscopy. This allows rapid and sensitive analysis of the slurry constituents, in particular of interfering ions. The process can be automated and makes it possible to process wafers with a constant quality. Furthermore, rapid fault analysis or optimization of the process parameters used during the grinding is possible.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: February 7, 2006
    Assignee: Infineon Technologies AG
    Inventor: Germar Schneider
  • Patent number: 6972096
    Abstract: A chemical-mechanical polishing process for planarizing at least one or more of thin films formed on a substrate, wherein the chemical-mechanical polishing is performed using a slurry containing abrasive particles mainly made of sialon or boehmite. This process is advantageous in improvement of a polishing rate without degradation in planarity of the processed surface and in level of metal impurities.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: December 6, 2005
    Assignee: Sony Corporation
    Inventor: Junichi Sato
  • Patent number: 6955586
    Abstract: The present invention provides a chemical metal polishing (CMP) method with improved flexibility and improved processing window, especially as it relates to the chemical aspect of CMP technology. Broadly speaking, the invention has two aspects: according to one aspect, the invention provides a new CMP composition, comprising as an oxidizer, at least one of inorganic halogen derivative and dissolved oxygen while in a second aspect the invention provides an improved method for polishing metals.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: October 18, 2005
    Assignee: J. G. Systems, Inc.
    Inventor: John Grunwald
  • Patent number: 6953532
    Abstract: The invention provides a method of polishing a substrate comprising a lanthanide-containing metal oxide material. The method comprises the steps of (i) providing a polishing system comprising (a) an abrasive, a polishing pad, or a combination thereof, (b) an acid, and (c) a liquid carrier, (ii) providing a substrate comprising a metal oxide layer, wherein the metal oxide layer comprises at least one lanthanide series element, and (iii) abrading at least a portion of the metal oxide layer with the polishing system to polish the substrate. The lanthanide-containing metal oxide material can be a lanthanide oxide, a doped lanthanide oxide, a lanthanide-doped metal oxide, a lanthanide perovskite, or any other suitable lanthanide-containing mixed metal oxide material, in particular those used as solid electrode and solid electrolyte materials in gas sensor and fuel cell devices.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: October 11, 2005
    Assignee: Cabot Microelectronics Corporation
    Inventors: Jui-Kun Lee, Ronald E. Myers
  • Patent number: 6939204
    Abstract: The abrasive machine is capable of feeding a proper amount of slurry and preventing a work piece from sticking on an upper abrasive plate. The abrasive machine comprises: the upper abrasive plate abrading an upper face of the work piece and having a plurality of slurry holes for feeding the slurry to the work piece; a lower abrasive plate abrading a lower face of the work piece; a slurry feeding unit pressurizing and feeding the slurry; a plurality of slurry paths respectively connecting the slurry holes to the slurry feeding unit; a plurality of valve mechanisms respectively provided to the slurry paths so as to control flows of the slurry; and a control section for controlling the valve mechanisms.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: September 6, 2005
    Assignee: Fujikoshi Machinery Corp.
    Inventor: Norihiko Moriya
  • Patent number: 6936480
    Abstract: An improved CMP controller allows the calculation of the polish time required for removing a patterned layer stack to a desired final thickness, wherein the initial layer thickness of each layer contained in the layer stack is employed. Moreover, a topography factor characterizing the surface structure of the layer stack and a selectivity characterizing the ratio of removal rates between adjacent material layers are used. Furthermore, a state variable of the controller represented by the removal rate of one of the layers may periodically be updated on the basis of the previously calculated polish time and a measurement value of the finally obtained layer thickness. The improved controller is particularly advantageous in the CMP process for STI isolation structures, in which the final thickness of a CMP stop layer, having a significantly reduced removal rate compared to the overlying dielectric layer, has to be precisely controlled.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: August 30, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Dirk Wollstein, Stefan Lingel, Jan Räbiger
  • Patent number: 6935013
    Abstract: A lapping method utilizing textured and conditioned lapping plates most suitable for finishing magnetic heads resulting in improved surface quality, less sensitivity to electrical shorts due to smears, and reduced surface height difference between the head elements exposed at the slider air bearing surface. A rough lapping phase is followed by a polishing phase that maintains the same mechanical motion between the work piece and lapping plate but utilizes only the lapping plate without abrasives of any kind to polish the work piece surface, and to clean up any deep textured marks resulting from the diamond slurry phase. A conductive liquid is utilized to provide lubrication and to minimize static charge.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: August 30, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Yuri Markevitch, Mark C. McMaster, Yu-En Percy Chang
  • Patent number: 6936540
    Abstract: A post-CMP cleaning process includes brush cleaning a CMPed surface, followed by at least partially drying the CMPed surface, followed by spray cleaning the CMPed surface. A method of cleaning residue from registration alignment markings formed on a semiconductor substrate includes polishing a material within which the registration alignment markings are received with a polishing solution comprising a liquid and a solid, followed by brush cleaning a remaining outermost polished surface, followed by at least partially drying the polished surface, followed by spray cleaning the outermost polished surface. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: August 30, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Michael T. Andreas
  • Patent number: 6929755
    Abstract: The distribution and size distribution of polishing particles contained in a slurry to be supplied to a polishing unit are measured by a measuring machine. Polishing speed with respect to a wafer is controlled to be constant by controlling a physical quantity such as the rotation speed of a polishing surface plate, the rotation speed of a polishing head or the pressurizing force of the polishing head based on the measurement result.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: August 16, 2005
    Assignee: Renesas Technology Corp.
    Inventor: Kazuhiro Tanaka
  • Patent number: 6914001
    Abstract: A CMP oxide slurry includes an aqueous solution containing abrasive particles and two or more different passivation agents. Preferably, the aqueous solution is made up of deionized water, and the abrasive particles are a metal oxide selected from the group consisting of ceria, silica, alumina, titania, zirconia and germania. Also, a first passivation agent may be an anionic, cationic or nonionic surfactant, and a second passivation agent may be a phthalic acid and its salts. In one example, the first passivation agent is poly-vinyl sulfonic acid, and the second passivation agent is potassium hydrogen phthalate. The slurry exhibits a high oxide to silicon nitride removal selectivity.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: July 5, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-won Lee, Jae-dong Lee, Bo-un Yoon, Sang-rok Hah
  • Patent number: 6903021
    Abstract: The present invention provides a method of polishing a semiconductor device comprising, polishing the semiconductor device with a polishing pad, the polishing pad comprising, a polymeric matrix and a dissolvable substance. The dissolvable substance is located at a work surface of the polishing pad and in a subsurface proximate the work surface. The method further comprises dissolving the dissolvable substance at the work surface while polishing the semiconductor device and wearing away the polishing pad while polishing the semiconductor device such that the subsurface becomes a new work surface that polishes the semiconductor device.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: June 7, 2005
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Heinz F. Reinhardt, John V. H. Roberts, Harry George McClain, William D. Budinger, Elmer William Jensen
  • Patent number: 6884361
    Abstract: A method for making a substrate for a mirror used in photolithography is described. That method comprises forming a crystalline layer on a first layer, which has a low coefficient of thermal expansion. Part of the crystalline layer is then removed to form on the first layer a second layer that has a high quality surface finish.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: April 26, 2005
    Assignee: Intel Corporation
    Inventor: Michael Goldstein
  • Patent number: 6867138
    Abstract: The surface of a semiconductor device is polished by first supplying a polishing pad with a slurry that contains a solvent, abrasive grains, and an additive for making the viscosity of the slurry variable so that the top portion of the polishing pad is soaked with the slurry, then supplying the polishing pad with a viscosity modifier for increasing the viscosity of the slurry and hardening the top portion of the polishing pad soaked with the slurry, and finally polishing the surface of the semiconductor device with the slurry having its viscosity increased and the polishing pad having its top portion hardened.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: March 15, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoto Miyashita, Takeshi Nishioka
  • Patent number: 6864181
    Abstract: A planarized conductive material is formed over a substrate including narrow and wide features. The conductive material is formed through a succession of deposition processes. A first deposition process forms a first layer of the conductive material that fills the narrow features and at least partially fills the wide features. A second deposition process forms a second layer of the conductive material within cavities in the first layer. A flexible material can reduce a thickness of the first layer above the substrate while delivering a solution to the cavities to form the second layer therein. The flexible material can be a porous membrane attached to a pressurizable reservoir filled with the solution. The flexible material can also be a poromeric material wetted with the solution.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: March 8, 2005
    Assignee: Lam Research Corporation
    Inventors: Fred C. Redeker, John Boyd
  • Patent number: 6844205
    Abstract: A system detects the clearing of a dielectric at a plurality of contact sites by measuring the surface voltage of the dielectric and comparing the surface voltage to a reference voltage set to a value that relates to the cleared contact sites. Another system detects the clearing of a dielectric at a plurality of contact sites on a substrate by measuring the rate of change of a substrate current during an etch process and ending the etch process when the rate of change is approximately zero. Another system detects the clearing of a dielectric at a contact site by measuring a substrate current during an etch process and ends the etch process when the measured substrate current exceeds a predetermined value.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: January 18, 2005
    Assignee: Micron Technology, Inc.
    Inventor: James Malden Chapman
  • Patent number: 6841480
    Abstract: A polyelectrolyte dispensing polishing pad, a process for its production and a method of polishing, e.g., chemical mechanical polishing (CMP), a substrate such as a semiconductor wafer, are provided. The pad is usable for CMP planarization of an oxide or metal layer on the wafer. The pad has a polishing layer of erodible binder material containing uniformly distributed therein both abrasive particles and a water soluble ionizable electrolyte substance such as a polyelectrolyte, such that during polishing the binder material incrementally erodes and the abrasive particles and electrolyte substance incrementally release into direct contact with the substrate. The electrolyte substance inhibits CMP removal of silicon nitride, e.g., as a stop layer, under an upper oxide or metal layer, such that the upper layer is selectively polished and the CMP stops on the stop layer leaving the latter intact.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: January 11, 2005
    Assignee: Infineon Technologies AG
    Inventors: Alexander William Simpson, Ronald Joseph Schutz
  • Patent number: 6830500
    Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer includes use of a fixed-abrasive type polishing pad with a substantially abrasive-free slurry in which copper is removed at a rate that is substantially the same as or faster than a rate at which a material, such as tungsten, of the barrier layer is removed. The slurry is formulated so as to oxidize copper at substantially the same rate as or at a faster rate than a material of the barrier layer is oxidized. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry or the oxidation energy of the barrier layer material in the slurry may be greater than that of copper. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: December 14, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Dinesh Chopra, Nishant Sinha
  • Publication number: 20040238493
    Abstract: An invention is provided for a chemical mechanical planarization apparatus. The apparatus includes a cylindrical frame, a polishing membrane attached to an end of the cylindrical frame, and a pad support disposed within the cylindrical frame and below the polishing membrane that is capable of differentially flexing the polishing membrane. The pad support can be air bearing that provides air pressure to the polishing membrane to differentially flex the polishing membrane during a CMP process. In a further aspect, the pad support can be in contact with the polishing membrane, and include mechanical elements that are capable of differentially flexing the polishing membrane during a CMP process. In addition, the apparatus can include a conditioner element disposed above the polishing membrane, and a conditioner pad support disposed below the polishing membrane and the conditioner element, wherein the conditioner element is capable of eroding the polishing membrane.
    Type: Application
    Filed: June 30, 2004
    Publication date: December 2, 2004
    Applicant: Lam Research Corporation
    Inventors: Yehiel Gotkis, Aleksandar Owczarz, Rod Kistler
  • Publication number: 20040226917
    Abstract: A method for machining a ceramic substrate containing Al, including providing a slurry between a substrate and a machine tool, the slurry containing alumina abrasive and an additive including a phosphorus compound, and moving the substrate relative to the machine tool.
    Type: Application
    Filed: April 25, 2003
    Publication date: November 18, 2004
    Applicant: Saint-Gobain Ceramics & Plastics, Inc.
    Inventors: Ronald W. Laconto, Douglas E. Ward
  • Publication number: 20040226918
    Abstract: A slurry system for a chemical mechanical polishing (CMP) process and a method for using the same wherein the slurry system includes an aqueous dispersion comprising at least abrasive polymer containing particles in an alkaline solution having a pH of less than about 9.5; and wherein the method includes providing a semiconductor wafer process surface including a oxide containing material and metal filled semiconductor features; providing the system; and, polishing in a CMP process the semiconductor wafer process surface using the slurry system to remove at least a portion of the oxide containing material and the metal comprising the metal filled semiconductor features.
    Type: Application
    Filed: April 24, 2003
    Publication date: November 18, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shen-Nan Lee, Ying-Ho Chen, Syun-Ming Jang, Tzu-Jen Chou
  • Patent number: 6818031
    Abstract: A polishing composition comprising an abrasive, an oxidizing agent, a polishing accelerator, and water, wherein the polishing accelerator comprises an organic phosphonic acid; a method for manufacturing a substrate, comprising polishing a substrate to be polished with the above polishing composition; a method for polishing a substrate comprising polishing a substrate to be polished with the above polishing composition; a process for reducing fine scratches of a substrate, comprising polishing a substrate to be polished with the above polishing composition; and a process for accelerating polishing of a magnetic disk substrate, comprising applying the above polishing composition to a magnetic disk substrate to be polished. The polishing composition is highly suitable for polishing a magnetic disk substrate requiring high surface quality to be used in memory hard disk drives.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: November 16, 2004
    Assignee: Kao Corporation
    Inventor: Yoshiaki Oshima
  • Patent number: 6811583
    Abstract: A polishing composition for a substrate for a magnetic disk, which comprises: (a) a polishing accelerator composed of at least one compound selected from the group consisting of malic acid, glycolic acid, succinic acid, citric acid, maleic acid, itaconic acid, malonic acid, iminodiacetic acid, gluconic acid, lactic acid, mandelic acid, crotonic acid, nicotinic acid, aluminum nitrate, aluminum sulfate and iron(III) nitrate, (b) an edge sagging preventive agent composed of at least one compound selected from the group consisting of a polyvinylpyrrolidone, a polyoxyethylene sorbitan fatty acid ester and a polyoxyethylene sorbit fatty acid ester, (c) at least one abrasive selected from the group consisting of aluminum oxide, silicon dioxide, cerium oxide, zirconium oxide, titanium oxide and silicon carbide, and (d) water.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 2, 2004
    Assignee: Fujimi Incorporated
    Inventor: Tomoaki Ishibashi
  • Patent number: 6806193
    Abstract: A method for preconditioning a CMP polishing pad and retaining ring prior to semiconductor wafer polishing. In the method of the present invention, the retaining ring is lowered to contact the rotating polishing pad, and a cleaning chemistry of ammonium citrate is applied to the pad. In an alternative embodiment, the cleaning chemistry comprises an aqueous solution of ammonium citrate, and a surfactant and/or copper inhibitor. After a sustained preconditioning period in which the retaining ring and polishing pad are polished, the pad is rinsed, lowering particulate buildup on the pad between wafer polishing steps, and bringing defect levels into an equilibrium state prior to each wafer polishing step.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: October 19, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Vincent C. Korthuis, Mona Eissa, Yaojian Leng, Syed Hamid
  • Publication number: 20040200805
    Abstract: The present invention is directed to metal articles and methods of making the metal articles. The metal articles comprise a compression-formed particulate metal object, wherein a portion of the compression-formed particulate metal object has been selectively removed by an etching process from at least one surface of the object. The etching process is frequently performed using abrasive etching.
    Type: Application
    Filed: December 5, 2003
    Publication date: October 14, 2004
    Inventors: William Charles Ulland, Alexander Sergeievich Gybin, Jeremy W. Peterson, David K. Sarvela
  • Patent number: 6797190
    Abstract: A wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method using the same are provided. The present wafer carrier assembly comprises a first plate, a second plate and a flexible membrane. The first plate has a plurality of protrusions formed on a bottom surface thereof and the second plate has a plurality of apertures passing through. Each of the protrusions is matched with one of the apertures to enable the first plate and the second plate to detachably combine together. The flexible membrane is positioned under the second plate and contacts it. A surface of the flexible membrane opposite to the surface of the flexible membrane contacting the second plate provides a wafer-receiving surface.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: September 28, 2004
    Assignee: United Microelectronics Corp.
    Inventors: Chia-Lin Hsu, Art Yu, Shih-Hsun Hsu, Hsueh-Chung Chen
  • Publication number: 20040178178
    Abstract: Apparatus and process for continuous surface preparation of metal materials. The metal material is grit blasted with a mixture of fine particles of aluminum oxide in air and water. The metal material is rinsed with water to remove the grit. The metal material is subjected to a caustic solution of sodium hydroxide and then rinsed with water to remove the caustic solution of sodium hydroxide. A sol-gel coating is applied to the metal material and the water portion of the sol-gel coating is evaporated. A liquid adhesive coating is applied to the sol-gel coating on the metal material and the solvent portion of the adhesive coating is evaporated.
    Type: Application
    Filed: January 2, 2004
    Publication date: September 16, 2004
    Inventors: Kay Y. Blohowiak, Robert A. Anderson, Shane E. Arthur, William B. H. Grace, Darrin M. Hansen, Steven R. Jones, Matthew S. Tillman, Rick G. Wire
  • Publication number: 20040172886
    Abstract: A composition useful in planarizing metal or semi-conductor surfaces, especially copper surfaces, is disclosed. The composition disclosed comprises cupric salts as an oxidizing agent and also preferably comprises complexing agents such as ethylene diamine tetraocetic acid. The polishing rate can be varied by adjusting the pH and/or temperature of the composition.
    Type: Application
    Filed: April 29, 2003
    Publication date: September 9, 2004
    Inventor: John Grunwald
  • Patent number: 6776917
    Abstract: The method for controlling the depth of polishing during a CMP process involves the deposition of a polishing stop layer at an appropriate point in the device fabrication process. The stop layer is comprised of a substance that is substantially more resistant to polishing with a particular polishing slurry that is utilized in the CMP process than a polishable material layer. Preferred stop layer materials of the present invention are tantalum and diamond-like carbon (DLC), and the polishable layer may consist of alumina. In one embodiment of the present invention the stop layer is deposited directly onto the top surface of components to be protected during the CMP process. A polishable layer is thereafter deposited upon the stop layer, and the CMP polishing step removes the polishable material layer down to the portions of the stop layer that are deposited upon the top surfaces of the components. The stop layer is thereafter removed from the top surface of the components.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: August 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Hsiao, Son Van Nguyen, Thao Pham, Eugene Zhao
  • Patent number: RE39413
    Abstract: The present invention is a semiconductor wafer that enhances polish-stop endpointing in chemical-mechanical planarization processes. The semiconductor wafer has a substrate with a device feature formed on the substrate, a stratum of low friction material positioned over the substrate, and an upper layer deposited on the low friction material stratum. The low friction stratum has a polish-stop surface positioned at a level substantially proximate to a desired endpoint of the chemical-mechanical planarization process. The upper layer, which is made from either a conductive material or an insulative material, has a higher polishing rate than that of the low friction stratum. In operation, the low friction stratum resists chemical-mechanical planarization with either hard or soft polishing pads to stop the planarization process at the desired endpoint.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: November 28, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Guy F. Hudson, Renee Zahorik, Russell C. Zahorik