Adherent Solid Layer Or Coating (e.g., Pretinned) Patents (Class 228/254)
  • Publication number: 20030006269
    Abstract: Reaction-brazing of tungsten or molybdenum metal bodies to carbonaceous supports enables an x-ray generating anode to be joined to a preferred lightweight substrate. Complementary surfaces are provided on a dense refractory metal body and a graphite or a carbon-carbon composite support. A particulate braze mixture comprising Hf or Zr carbide, Mo or W boride, Hf or Zr powder and Mo or W powder is coated onto the support surface, and hafnium or zirconium foil may be introduced between the braze mixture and the refractory metal body complementary surface. Reaction-brazing is carried out at or near the eutectic point of the components, which may be influenced to some extent by the presence of carbon and boride. Heating to about 1865° C.
    Type: Application
    Filed: July 6, 2001
    Publication date: January 9, 2003
    Applicant: General Atomics
    Inventors: Mervyn H. Horner, Paul W. Trester, Peter G. Valentine
  • Patent number: 6503127
    Abstract: Apparatus and methods for substantial planarization of solder bumps. In one embodiment, an apparatus includes a planarization member engageable with at least some of the plurality of outer surfaces to apply a planarization action on one or more of the outer surfaces to substantially planarize the plurality of outer surfaces, and a securing element to securely position the bumped device during engagement with the planarization member. Through application of “additive” and/or “subtractive” processes, the solder balls are substantially planarized.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: January 7, 2003
    Assignee: Micron Technology, Inc.
    Inventor: David R. Hembree
  • Publication number: 20020190106
    Abstract: There is provided a method of hermetically sealing electronic parts, comprising the step of bonding a base having semiconductor devices mounted thereon and a cap together via a solder. The solder is composed, by weight, of 78% or more but less than 79.5% Au, and the balance Sn. It is particularly preferred that the bonding is performed with the use of a solder composition composed, by weight, of 78% or more but 79% or less Au, and the balance Sn as the solder and furthermore through plating the cap with gold.
    Type: Application
    Filed: June 13, 2002
    Publication date: December 19, 2002
    Inventors: Shozaburo Iwai, Masaru Kobayashi, Osamu Sawada
  • Publication number: 20020158112
    Abstract: Nonmetallic high-temperature material, such as graphite, CFC or SiC, or components produced from these materials, are joined using the two-stage process. First the structural components are canned and the canning foil is tightly pressed onto the surface contour of the structural components. Then the components are joined to a composite component by forming a material-to-material bond between the metal canning foils. This widens the hitherto highly restricted field of technical application for materials of this type.
    Type: Application
    Filed: April 30, 2002
    Publication date: October 31, 2002
    Inventor: Peter Rodhammer
  • Publication number: 20020139833
    Abstract: A folded fin heat sink assembly and a method of fabricating a folded fin heat sink assembly for use as a cooling solution in micro-electronics and/or telecommunication applications. The heat sink assembly is formed by placing a sheet or paste of Sn—Zn solder upon a copper base plate, placing one or more aluminum folded fin assemblies on the solder sheet or paste, heating the base plate, the folded fin assembly and the solder to a temperature exceeding the liquidus temperature of the solder and allowing the solder to flow, and cooling the solder to form a soldered joint between the base plate and the folded fin assembly.
    Type: Application
    Filed: February 14, 2002
    Publication date: October 3, 2002
    Inventors: Ross D. Armstrong, Alin Ila, Victor Kheil
  • Publication number: 20020117539
    Abstract: A solder consists essentially of 1.0% to 4.0% of Ag by mass, 0.2% to 1.3% of Cu by mass, 0.02% to 0.06% of Co by mass, and the remaining of Sn and inevitable impurities.
    Type: Application
    Filed: December 11, 2001
    Publication date: August 29, 2002
    Applicant: NEC CORPORATION
    Inventors: Toshihide Ito, Shiro Hara
  • Patent number: 6431432
    Abstract: A solder mask is placed on a substrate but this solder mask is used to control solder spread but merely helps to protect traces that are distant from the bond pads. The solder mask has an opening that is preferably greater than the area of a die to be attached; this opening exposes both the bond pads and at least portions of traces proximate to the bond pads. The portions of the traces that are proximate to the bond pads are oxidized, thereby preventing solder from flowing onto these portions of the traces during the solder reflow process.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: August 13, 2002
    Assignee: LSI Logic Corporation
    Inventors: John Pierre McCormick, Kishor V. Desai
  • Patent number: 6427901
    Abstract: A solder bonding system that includes a substrate having a recess and a conductive pad having a width. The conductive pad is disposed in the recess of the substrate. The solder bonding system also includes a solder pad contacting the conductive pad. The solder pad has a width greater than the width of the conductive pad. When the solder pad is heated, it forms a stable solder bond between the conductive pads.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: August 6, 2002
    Assignee: Lucent Technologies Inc.
    Inventor: Mindaugas F. Dautartas
  • Patent number: 6422923
    Abstract: Apparatus and methods for substantial planarization of solder bumps. In one embodiment, an apparatus includes a planarization member engageable with at least some of the plurality of outer surfaces to apply a planarization action on one or more of the outer surfaces to substantially planarize the plurality of outer surfaces, and a securing element to securely position the bumped device during engagement with the planarization member. Through application of “additive” and/or “subtractive” processes, the solder balls are substantially planarized.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: July 23, 2002
    Assignee: Micron Technology, Inc.
    Inventor: David R. Hembree
  • Publication number: 20020092896
    Abstract: A composite material is produced by a method where an adhesive composition which comprises a particulate material that reduces thermal stress and a brazing material containing a noble metal element as a base, wherein the adhesive composition can bond two or more kinds of different members to form a composite member with sufficient bond strength to avoid causing damages, such as cracks that occur on the side of the member that is weak against thermal stress, and also by a method to produce a composite member comprised of two or more kinds of different members, in which either the adhesive composition is used or the bonding portion of the different members is filled with the particulate material that reduces thermal stress, and then a molten brazing material is poured there into, and cooled to bond the members.
    Type: Application
    Filed: February 27, 2002
    Publication date: July 18, 2002
    Applicant: NGK Insulators, Ltd.
    Inventors: Takuma Makino, Masayuki Shinkai
  • Patent number: 6421423
    Abstract: A joining method designed to minimize the temperature needed to obtain a high strength braze joint between a molybdenum alloy substrate and a graphite disk used in a rotating anode X-ray tube target used for computed tomography applications. The method consists of two separate brazing operations. The first brazing operation joins a thin molybdenum sheet to the graphite disk using a pure metal braze to form a plated graphite subassembly. The second brazing operation joins the plated graphite subassembly to the molybdenum alloy substrate using a highly specialized braze alloy having a melt temperature below the recrystallization temperature of said molybdenum alloy substrate and a remelt temperature after brazing above the recrystallization temperature of said molybdenum alloy substrate.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: July 16, 2002
    Assignee: GE Mdical Systems Global Technology Company, LLC
    Inventor: John M. Warren
  • Publication number: 20020088845
    Abstract: The present invention relates to a method for producing a tin-silver alloy plating film having an excellent wettability and improved in solderability and said method comprises a step of heat treating the surface of the tin-silver alloy plating film preferably the heat treating temperature is 70-210° C.
    Type: Application
    Filed: November 8, 2001
    Publication date: July 11, 2002
    Inventors: Hisahiro Tanaka, Matsuo Masuda, Tsuyoshi Tokiwa
  • Publication number: 20020088842
    Abstract: A method of manufacturing heat-insulating structural and/or light elements composed of at least two wall elements of glass, a glass alloy or metal, wherein the wall elements are separated from each other by support elements and are provided on at least one of surfaces thereof facing each other with a layer reflecting heat radiation, and wherein the structural and/or light elements further are composed of a deformable sealing element for connecting the wall elements to obtain a hollow space between the wall elements which can be evacuated or supplied with gas.
    Type: Application
    Filed: January 9, 2002
    Publication date: July 11, 2002
    Inventors: Kurt Sager, Emil Bachli
  • Patent number: 6415974
    Abstract: A structure of solder bumps with improved coplanarility, comprising a substrate, a passivation layer, a plurality of Under Ball Metallurgy (UBM) layers and a plurality of solder bumps. The substrate has at least an active surface, and a plurality of bonding pads are provided thereon. The UBM layers with various areas are electrically connected to the bonding pads. Finally, the solder bumps are formed with uniform-height on the UBM layers. A method of forming solder bumps with improved coplanarity. A UBM structure with various sizes of openings is provided to control the volume of the solder, wherein the various sizes of openings are corresponding to the current distribution across the wafer. The purpose of the various openings is to control the volume of the solder in order to form uniform-heights of solder bumps, the coplanarity of the solder bumps can thus be improved.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: July 9, 2002
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventor: Jui-Meng Jao
  • Publication number: 20020084315
    Abstract: A mask (stencil) having cells (openings) is disposed on a surface of a heater stage, and is then then filled (printed) with solder paste. Then a substrate is assembled to the opposite side of the mask. Then the solder paste is reflowed. This may be done partially inverted. Then the mask is separated from the substrate, either before or after cooling. Solder balls are thus formed on the substrate, which may be a semiconductor wafer. A method for printing the mask with solder paste is described.
    Type: Application
    Filed: September 24, 2001
    Publication date: July 4, 2002
    Inventors: John MaCkay, Tom Molinaro
  • Publication number: 20020079355
    Abstract: The aim of the present invention is a process for manufacturing a plated product (1) comprising a support part in steel (2) and an anticorrosion metallic coating (3), characterized in that the anticorrosion coating (3) is fixed on the support part (2) by controlled-atmosphere brazing, in particular by vacuum brazing. The process according to the invention makes it possible to fix solidly an anticorrosion coating with a thickness smaller than 1 mm on a steel plate.
    Type: Application
    Filed: December 21, 2001
    Publication date: June 27, 2002
    Applicant: LE CARBONE LORRAINE
    Inventors: Ernest Totino, Christian Hug
  • Patent number: 6405920
    Abstract: There is disclosed herein a printed circuit board (PCB) having enhanced mounting pads useful for overprinting solder paste and for repair of the solder joints. The PCB comprises: a dielectric substrate 10 having at least one mounting pad 20 thereon, wherein each mounting pad is arranged in matched relation with a respective termination 32 of an electronic component 30. Each mounting pad 20 includes a main body portion 24 and one or more fingerlike extensions 26 extending outward from the main body portion and away from a projected footprint 34 of the electronic component.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: June 18, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Bjoern Erik Brunner, Vivek Amir Jairazbhoy, Richard Keith McMillan
  • Patent number: 6398103
    Abstract: A method for applying a wear coating on a surface of a substrate is described. A foil of the wear coating is first attached to the substrate surface, and then fused to the surface, e.g., by brazing. The wear coating may be formed from a carbide-type material. The substrate is very often a superalloy material, e.g., a component of a turbine engine. A method for repairing a worn or damaged wear coating applied over a substrate is also described, along with related articles of manufacture.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: June 4, 2002
    Assignee: General Electric Company
    Inventors: Wayne Charles Hasz, Anthony Mark Thompson, Marcus Preston Borom
  • Patent number: 6390356
    Abstract: A method of forming cylindrical bumps on a substrate for integrated circuits includes the steps of: forming copper circuits on a board of a substrate by means of electroplating; covering said board with a screening material; forming openings in said screening material to align with copper circuits on said board, filling pure copper or high melting point metal into said openings by electroplating to form cylindrical projections; forming a layer of solder alloy on an upper end of each of said cylindrical projections to be even with an upper surface of said screening material, and removing said screening material to leave the cylindrical bumps, whereby the engagement operation between the die and the substrate can be facilitated and the manufacture of the die can be easier.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: May 21, 2002
    Assignee: Orient Semiconductor Electronics Limited
    Inventors: Wen Lo Shieh, Fu Yu Huang, Yung-Cheng Chuang, Chia-Chieh Hu, Hui-Pin Chen, Ning Huang, Feng Chang Tu, Chung Ming Chang, Hua Wen Chiang, Hsuan Jui Chang
  • Patent number: 6390353
    Abstract: A method of making an integral plated and solder clad cover lid for electronic packages is disclosed. The cover lid is plated and or clad with a first corrosion resistant and solderable material and is clad with a solder material on one side. The cladded substrate is stamped and then plated with a second corrosion resistant and solderable material. The second material is subsequently sintered and preferentially diffused into the solder material resulting in a visual distinction between the solder side of the cover lid and the backing side.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: May 21, 2002
    Assignee: Williams Advanced Materials, Inc.
    Inventor: Heiner Lichtenberger
  • Patent number: 6389691
    Abstract: A method for forming routing conductors and solder bumps on a microelectronic substrate includes the steps of forming an under bump metallurgy layer on the substrate and forming a solder structure on the under bump metallurgy layer where the solder structure includes an elongate portion and an enlarged width portion. The portions of the under bump metallurgy layer not covered by the solder structure can be selectively removed using the solder structure as a mask. In addition, the solder is caused to flow from the elongate portion of the solder structure to the enlarged width solder portion thereby forming a raised solder bump. This step is preferably performed by heating the solder structure above its liquidus temperature allowing surface tension induced internal pressures to affect the flow. Various solder structures are also disclosed.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: May 21, 2002
    Assignee: Unitive International Limited
    Inventors: Glenn A. Rinne, Joseph Daniel Mis
  • Patent number: 6392202
    Abstract: An object of the present invention is to provide a bump-bonding heating apparatus, a bump bonding method and a bump forming apparatus which do not involve large-sized apparatus configuration and which are easy to handle, and a semiconductor wafer in which bumps are formed by using the bump bonding method. The bump-bonding heating apparatus has a wafer turning member, a turning unit and a wafer heating unit. The turning member is turned by the turning unit without turning the wafer heating unit, whereby a semiconductor wafer mounted on the turning member is turned. Like this, since the wafer heating unit is not turned, the apparatus configuration can be made compact. Since the turning member is turned directly by the turning unit, the turning angle of the semiconductor wafer can be implemented with higher precision as compared with the conventional gas floating type turning method.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: May 21, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Makoto Imanishi, Takaharu Mae, Nobuhisa Watanabe, Shinji Kanayama
  • Patent number: 6386436
    Abstract: The present invention is drawn to a method of making solder bump interconnections or BGAs ranging from chip-level connections to either single chip or multichip modules, flip-chip packages and printed circuit board connections. According to the method of the present invention, a die wafer or a substrate with a conductive contact location is positioned in close proximity and aligned with a mold wafer having a pocket corresponding to the contact location of the die wafer. A source of a molten solder is also provided which interconnects with the mold wafer. The molten solder from the source is introduced into the pocket of the mold wafer such that the molten solder wets the contact location aligned with the pocket. Before the molten solder inside the pocket is allowed to solidify, the die wafer and the mold wafer are separated from each other.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: May 14, 2002
    Assignee: Micron Technology, Inc.
    Inventor: David R. Hembree
  • Patent number: 6375064
    Abstract: A conductive paste is loaded in circular holes made in a reinforcing film of a carrier tape which includes a film substrate and the reinforcing film, followed by applying a heat treatment to the conductive paste to form projecting electrodes consisting of solder. Then, the reinforcing film is peeled off to permit the projecting electrode to project from the film substrate.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: April 23, 2002
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kenji Edasawa, Shiro Ozaki, Kazuhiro Sugiyama, Isao Kurashima
  • Publication number: 20020043551
    Abstract: A micro-optical component comprises an optical element for interacting with an optical beam and a mounting structure for attaching the optical element to an optical bench. This optical element is solid phase welded to the mounting structure. Solid phase welding has advantages in that it can be performed at lower temperatures than most soldering, even some eutectic soldering. Solid-phase welding, however, is much more robust during subsequent temperature cycling. This is especially important when the optical components undergo subsequent high temperature cycling.
    Type: Application
    Filed: June 20, 2001
    Publication date: April 18, 2002
    Applicant: AXSUN Technologies, Inc.
    Inventors: Robert L. Payer, Livia M. Racz
  • Patent number: 6355298
    Abstract: An apparatus and a method are disclosed for placing at least two elements on a surface. The apparatus comprises means for supplying a surface, means for transferring the two elements to the surface, means for adjusting the position of the surface in a first direction, and means for adjusting the position of the transferring means in a second direction and about a rotation axis parallel to a third direction, the first, second and third directions being mutually orthogonal. Recognizing means are provided on at least one of the transferring means for recognizing position alignment marks provided on the surface.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: March 12, 2002
    Assignee: ASM Assembly Automation Ltd.
    Inventors: Cheng Chi Wah, Alfred Yue Ka On, Wong Chiu Fai
  • Publication number: 20020017554
    Abstract: This invention provides an improved method of projection welding which enables the sound welding of high-carbon, and high-tension low-alloy steels.
    Type: Application
    Filed: May 31, 2001
    Publication date: February 14, 2002
    Inventors: Kaneyuki Imai, Ryuichi Kusanagi
  • Patent number: 6332569
    Abstract: A precise volume, precisely registerable carrier is provided for use with injection molding for producing integrated circuit bump contacts in the “flip chip” technology. A hemispherical cavity is produced by etching through and undercutting a registered opening into a transparent carrier. The hemispherical cavity has related specific volume and visible peripheral shape that permits simple optical quality control when the injection molding operation has filled the cavity and simple optical registration for fusing to the pads on the integrated circuit.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Peter Alfred Gruber, Egon Max Kummer, Stephen Roux, Carlos Juan Sambucetti, James Louis Speidell
  • Patent number: 6329608
    Abstract: A flip-ship structure having a semiconductor substrate including an electronic device formed thereon, a contact pad on said semiconductor substrate electrically connected to said electronic device, a passivation layer on said semiconductor substrate and on said contact pad wherein said passivation layer defines a contact hole therein exposing a portion of said contact pad, an under-bump metallurgy structure on said passivation layer electrically contacting said portion of said contact pad that is exposed; and a solder structure on said under-bump metallurgy structure opposite said semiconductor substrate, said solder structure including an elongate portion on said elongate portion of said metallurgy structure opposite said contact pad and an enlarged width portion on said enlarged width portion of said metallurgy structure opposite said passivation layer.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: December 11, 2001
    Assignee: Unitive International Limited
    Inventors: Glenn A. Rinne, Joseph Daniel Mis
  • Patent number: 6328199
    Abstract: Method for connecting a first object to a second object along a common contact surface, wherein the first object comprises at the location of the contact surface a portion for a connecting means to be applied, which portion is accessible along an edge zone of or via at least one opening in the second object, by means of thermal spraying of particles of a material suitable as connecting means onto the first object along the edge zone of respectively via the at least one opening in the second object in a quantity such that in solidified state the deposited material particles form a connection between the first and the second object, in addition to a convector element manufactured according to this method.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: December 11, 2001
    Assignee: Stichting Energieonderzoek Centrum Nederland
    Inventor: Meindert Willem Brieko
  • Patent number: 6318624
    Abstract: A solder balltape comprised of an elongated tail with a ball of solder formed at one end. A plurality of the balltape structures are positioned on a carrier strip of solder. The balltape is positioned in contact with a transducer pad on a magnetic read/write slider and an electrical lead pad. A pulse of focused laser radiation is directed at the ball part of the balltape and a right angle fillet joint is formed. A subsequent laser pulse or a sharpened blade is used to remove the tail from the newly formed fillet joint.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: November 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Surya Pattanaik, Timothy C. Reiley, Randall G. Simmons
  • Patent number: 6315189
    Abstract: A method and apparatus for uniformly solder plating leads on semiconductor packages wherein the leads are rotated during the solder plating process and the solder on the leads in planarized and solder between and bridging the leads is removed by the application of a hot gas to the device having the leads. The hot gas is preferably N2 which is inert to the process flow at the point in the process when it is utilized.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: November 13, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Charles E. Williams
  • Patent number: 6302317
    Abstract: Wafers are previously positioned so that the wafer orientation flat is oriented in a particular direction. A transporting means then moves and places the previously positioned wafer on a bonding stage where bumps are formed on the wafer by means of a bonding head. The transporting means has a sensor for detecting the position of the orientation flat of a wafer on the bonding stage from a position above the bonding stage, thereby avoiding the adverse effects of heat from the bonding stage during orientation flat detection.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: October 16, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Makoto Imanishi, Takaharu Mae, Shinji Kanayama, Nobuhisa Watanabe
  • Patent number: 6302316
    Abstract: A ball arrangement method and arrangement apparatus for simultaneously mounting balls on a mounting object by the steps of holding the balls by suction on ball suction holes in a ball arrangement device having the ball suction holes arranged, transcribing flux or a solder paste onto the balls held by suction, and transferring the balls onto the mounting object. In the method and apparatus, a flux supplying unit composed of a head plate 5 at an end thereof is provided, flux supplying nozzles 7 are arranged over the head plate 5 at positions corresponding to the ball suction holes 6 in the ball arrangement device 1.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: October 16, 2001
    Assignee: Nippon Micrometal Co., Ltd.
    Inventors: Nobuaki Hayashi, Junichi Ujita
  • Patent number: 6302318
    Abstract: A method for applying a wear coating on a surface of a substrate is described. A foil of the wear coating is first attached to the substrate surface, and then fused to the surface, e.g., by brazing. The wear coating may be formed from a carbide-type material. The substrate is very often a superalloy material, e.g., a component of a turbine engine. A method for repairing a worn or damaged wear coating applied over a substrate is also described, along with related articles of manufacture.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: October 16, 2001
    Assignee: General Electric Company
    Inventors: Wayne Charles Hasz, Anthony Mark Thompson, Marcus Preston Borom
  • Patent number: 6295730
    Abstract: Metal traces and solder bump pads are formed on a semiconductor substrate by way of a semiconductor template that has been micro-machined to receive solder paste material. The solder paste material is then formed into precisely-controlled ball shapes and metal trace geometries. First, a semiconductor substrate is covered with a mask material for protecting selected surfaces of the substrate that are not to be etched. Next, a mask is applied in order to etch the substrate surface below. Solder ball sites and metal trace channels are formed at this time. A solder non-wettable material is applied to the exposed surfaces of the solder ball sites and the metal trace channels. A solder paste can then be applied uniformly across the surface of the substrate, thus filling in any sites and channels, or both, that are used to form the balls in metal traces desired.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: October 2, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: 6296174
    Abstract: A method for assembling electronic devices including a plurality of soldering pads for soldering contacts of electronic devices, and at least an insulated zone neighboring at least one of the soldering pads, from which soldering paste is extendible to at least a portion of the insulated zone while applying soldering paste. The method includes the steps of applying soldering paste onto at least a portion of the soldering pads allowing the soldering paste to extend outwardly from at least one soldering pad to locations not in contact with other soldering pads or traces, or to at least a portion of an insulated zone neighboring the soldering pad; and soldering contacts of electronic devices to the circuit board having the portion of soldering pads including the at least one soldering pad.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: October 2, 2001
    Assignee: Sony Video Taiwan Co. Ltd.,
    Inventor: Chia-Tsuan Chiang
  • Patent number: 6293456
    Abstract: A mask (110; see also 160, 210, 260, 310, 408, 500, 702, 802, 904) having a plurality of openings (cells) is disposed on, or nearly on, the surface of a substrate (102), the openings (112) of the mask being aligned over a corresponding plurality of pads (104) on the substrate. The openings in the mask are filled with solder material (114). A pressure plate (120) is disposed over the mask to capture the solder material in the cells. Heat is directed at the mask (through the pressure plate) to reflow the solder. This is done in an inverted or partially inverted orientation. The stackup (assembly) of substrate/mask/pressure plate may be un-inverted prior to cooling. Mask configurations, methods of mounting the masks, and solder material compositions are described. The methods are robust, and are well suited to fine pitch as well as coarse pitch ball bumping of substrates.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: September 25, 2001
    Assignee: Spheretek, LLC
    Inventors: John MacKay, Tom Molinaro
  • Patent number: 6293457
    Abstract: Form a solder connector on a semiconductor device starting with a first step of forming at least one dielectric layer over a doped semiconductor substrate. Then form a hole through the dielectric layer down to the semiconductor substrate. Form a metal conductor in the hole. Form intermediate layers over the metal conductor and the dielectric layer. Then form a tapered opening down to the surface of the metal conductor. Form BLM layers including a titanium-tungsten (TiW) layer over the metal conductor and the dielectric layer with the remainder of the BLM layers being formed over the TiW layer. Form a mask over the top surface of the BLM layers with a patterning through hole located above the metal conductor exposing a portion of the surface of the BLM layers. Plate a C4 solder bump on the BLM layers in the patterning hole. Remove the mask. Wet etch away the BLM layers aside from the solder bump leaving a residual TiW layer over the dielectric layer.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: September 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Kamalesh K. Srivastava, Jonathan H. Griffith, Mary C. Cullinan-Scholl, William H. Brearley, Peter C. Wade
  • Patent number: 6276593
    Abstract: A printed wiring board assembly is formed by mounting an insert having a pocket containing one or more standoffs in the cavity of a pallet. The pallet and the insert are both coupled to the bottom of a printed wiring board. A device having tinned leads and a tinned casing is positioned in the pocket of the insert above the standoffs. A solder preform is positioned in the pocket of insert, beneath the casing of the device. The assembly is placed in a soldering oven and heated to a at least a reflow temperature of the solder preform, whereby the device casing is joined to the insert and the device leads are coupled to solder pads on the printed wiring board.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: August 21, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventors: Iris A. Artaki, Nagesh Ramamoorthy Basavanhally, Scott Allen Bergman, George Michael Wenger, Walter J. Picot, Marsha M. Regn, Girard Sidone
  • Patent number: 6276599
    Abstract: A method of forming solder bumps on pads formed on a surface of a base material includes the steps of supplying solder to a template having a number of through holes formed to correspond to the pads of the base material respectively so that the through holes are filled with the solder, the template having an upper side and an underside, scraping the sides of the template with doctors to remove an excessive amount of solder, and opposing the template to the base material so that the pads are aligned with the through holes respectively, covering the side of the template opposite to the base material with a pressure housing and increasing pressure in an interior of the pressure housing so that a difference in pressure between an exterior and the interior of the pressure housing extrudes the molten solder from the template to the pad side of the base material.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: August 21, 2001
    Assignee: Noda Screen Co., Ltd.
    Inventor: Hirotaka Ogawa
  • Patent number: 6276589
    Abstract: An apparatus for depositing a selected pattern of solder onto a substrate comprising a substrate support, a solder ejector, and an orifice defining structure. The substrate support has structure for bearing a substrate on which one or more electronic components are to be mounted. The solder ejector has a housing that defines a cavity for containing molten solder. The orifice defining structure includes a flat disk having an orifice defined therethrough for producing a stream of molten solder and a disk support structure that supports the disk around the orifice and is replaceably coupled to the cavity-defining structure. Also disclosed is an apparatus that deposits a selected pattern of solder onto a substrate and includes a substrate support, a solder ejector that directs solder droplets to desired positions on the support, and an ejector aligner that adjusts the orientation of the solder ejector in two angular dimensions to enable adjustment of the trajectory of the stream of molten solder droplets.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: August 21, 2001
    Assignee: Speedline Technologies, Inc.
    Inventors: Hal G. Watts, Jr., Melissa E. Orme-Marmarelis, Eric Phillip Muntz, Gerald C. Pham-Van-Diep, Robert F. Smith, Jr., Robert J. Balog, Gary T. Freeman
  • Patent number: 6276596
    Abstract: A method for joining a multiplicity of multi-alloy solder columns to an electronic substrate and the structure formed by such method are disclosed. In the method, a mold plate equipped with a multiplicity of cavities is first filled by an injection molded solder technique with a high temperature solder forming a multiplicity of solder columns. The mold plate is then sandwiched between an extraction plate and a transfer plate by utilizing a multiplicity of displacement means equipped in the extraction plate to displace the multiplicity of solder columns from the mold plate into a multiplicity of apertures equipped in the transfer plate. The multiplicity of cavities in the transfer plate each has a straight opening and a flared opening. The flared opening is then filled with a low temperature solder paste to encapsulate one end of the high temperature solder column.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: August 21, 2001
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Gruber, Lannie R. Bolde, Guy P. Brouillette, James H. Covell, David Danovitch, Chon C. Lei
  • Patent number: 6273328
    Abstract: A bump forming apparatus comprises a container for retaining therein a solder melt, a solder forming member having a side wall portion and a ceiling portion which form, above a substrate's flat surface, a chamber for receiving therein the solder melt. The solder forming member also includes a height regulator portion provided on an exterior of the side wall portion and having a flat surface for restricting the height of the solder melt during formation. Heating means for heating the solder melt may also be provided. A hole in the solder forming portion allows solder melt to flow from the container to the chamber. Pressurizing means for pressurizing the solder melt in the container to thus expedite passage of solder melt into the chamber of the forming member may be used. Depressurization means for reducing the inside pressure of the container to cause the unused metal to return from the chamber into the container may also be used.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: Yohji Maeda, Yutaka Tsukada
  • Patent number: 6273326
    Abstract: In a method for manufacturing a metallic or ceramic body constructed in layers from a real body elements, the a real body elements are cut out of a body material connected to a support material. Subsequently, the a real body elements are sequentially connected to a respective last applied layer of a real body elements of the body to be manufactured by a physical or chemical connecting process. After connection with the last applied layer, the support material is removed from the a real body elements.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: August 14, 2001
    Inventor: Daniel Graf
  • Patent number: 6270002
    Abstract: The present invention relates to a method and an apparatus for arranging fine balls serving as a ball bump particularly on electrodes on a semiconductor chip, electrodes on a semiconductor-mounting substrate, or electrodes on a semiconductor device. It is made possible to remove small-diameter balls by, firstly, using a pre-arrangement plate for arranging the balls and using two diameters for the ball trap holes of the pre-arrangement plate. Secondly, occurrence of a ball suction abnormality and the time required for sucking the balls is reduced by using the pre-arrangement plate and a ball feeder. Thirdly, a ball suction abnormality to the ball arrangement device is determined by detecting the air flow velocity in an evacuation route of the ball arrangement device.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: August 7, 2001
    Assignee: Nippon Micrometal Co., Ltd.
    Inventors: Nobuaki Hayashi, Kouhei Katoh
  • Publication number: 20010010323
    Abstract: A solder bonding system that includes a substrate having a recess and a conductive pad having a width. The conductive pad is disposed in the recess of the substrate. The solder bonding system also includes a solder pad contacting the conductive pad. The solder pad has a width greater than the width of the conductive pad. When the solder pad is heated, it forms a stable solder bond between the conductive pads.
    Type: Application
    Filed: January 31, 2001
    Publication date: August 2, 2001
    Inventor: Mindaugas F. Dautartas
  • Publication number: 20010008160
    Abstract: Forming solder bumps each having a constant height by surely supplying onto each of electrode pads a solder ball corresponding to a predetermined volume while omitting Au plating performed on the electrode pads onto which the solder bumps are to be formed. For achieving the forming of the solder bumps, the adhesive film is formed instead of the Au plating, the adhesive film being used as an oxidation-preventing film and as film for temporarily fixing each of the solder balls, the solder balls being supplied by stencil mask or the vacuum adsorbing mask.
    Type: Application
    Filed: January 12, 2001
    Publication date: July 19, 2001
    Inventors: Takamichi Suzuki, Yoshihide Yamaguchi, Noriyuki Oroku, Kosuke Inoue
  • Patent number: 6241536
    Abstract: An electrical connector illustrated as a plug and receptacle is disclosed. In one embodiment, the connector includes a base member having a plurality of bores. A first plurality of contact elements is positioned in certain of the bores. The tail portion of each contact element extends a distance beyond the base member. A second plurality of contact elements is positioned in others of the bores. Insertion of the tail portion of the second plurality of contact elements into a circuit board is sufficient to hold the tail portions of the first plurality of contact elements against the circuit board. It is preferred for the tail portions of the second plurality of contacts to be capable of axial movement when a compression force is applied. In another embodiment, the connector includes a frame and a layer of contact elements, wherein each of the contact elements includes a forward end and a tail portion. The ends of the tail portions are positioned proximate the bottom surface of the frame.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: June 5, 2001
    Assignee: Berg Technology, Inc.
    Inventor: Joseph B. Shuey
  • Publication number: 20010001889
    Abstract: An alignment weight is provided. The alignment weight includes a body of material having first and second opposing surfaces. A number of depressions are formed in the first surface. The depressions receive pins of a floating pin field when placed on a floating pin field during connection of the floating pin field to a printed circuit board.
    Type: Application
    Filed: January 4, 2001
    Publication date: May 31, 2001
    Applicant: Intel Corporation.
    Inventors: Cheryl M. Waldron-Floyde, Brad C. Irwin