Adherent Solid Layer Or Coating (e.g., Pretinned) Patents (Class 228/254)
  • Patent number: 5346118
    Abstract: Described are a process for soldering at least one component having solder bumps to a substrate and a process for forming solder bumps on metal pads of an element, such as an IC package or substrate or both. The bumps are formed by stencil printing solder paste deposits on the metal pads, heating the solder paste deposits to reflow temperature of the solder in the solder paste deposits, and allowing the molten solder in each deposit to coalesce and during subsequent cooling solidify forming the bumps on the metal pads.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: September 13, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Yinon Degani, Thomas D. Dudderar, William L. Woods, Jr.
  • Patent number: 5341979
    Abstract: A method and means of bonding a semiconductor die (10) to a support substrate (35) using a thermosonic bonding apparatus (50). The semiconductor die (10) has bonding pads (14, 15, 17) on a first major surface (12), and the support substrate (35) has contact pads (46, 47, 44) on a principal surface (43). Hourglass shaped gold bumps (30) are formed on bonding pads (14, 15, 17). A second major surface (13) of semiconductor die (10) is secured to a thermosonic tool/end-effector (52), and the support substrate (35) is secured to a substrate chuck (48). The hourglass shaped gold bumps (30) are mated with the contact pads ( 46, 47, 44 ) on the support substrate (35). A bond is thermosonically formed between the gold bumps (30) and the contact pads (46, 47, 44).
    Type: Grant
    Filed: September 3, 1993
    Date of Patent: August 30, 1994
    Assignee: Motorola, Inc.
    Inventor: Debabrata Gupta
  • Patent number: 5340015
    Abstract: A method of applying brazing filler metal to a surface to form a brazed joint by plasma spraying the brazing filler metal on the portions of the surface to be joined.
    Type: Grant
    Filed: March 22, 1993
    Date of Patent: August 23, 1994
    Assignee: Westinghouse Electric Corp.
    Inventors: Govind L. Hira, Richard L. Hall, Gary I. Segal
  • Patent number: 5330088
    Abstract: A layer selected from a group comprising: molybdenum, tantalum, tungsten, osmium, rhenium, ruthenium and an alloy of two or more thereof on the under surface of an electrical contact acts as a barrier to copper diffusion from the braze material into the contact structure. A thin nickel layer on the barrier facilitates the brazing of the barrier coated contact surface to the copper electrodes.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: July 19, 1994
    Assignee: Eaton Corporation
    Inventors: Graham A. Whitlow, Carl B. Freidhoff, Philip E. Carpentier, Paul O. Wayland
  • Patent number: 5322205
    Abstract: A joining method of an aluminum member to a dissimilar metal member excluding copper by brazing or soldering through the use of a brazing filler metal or a solder for aluminum member; in which a plating composed of a metal voluntarily selected from copper, aluminum, zinc, lead, silicon, cadmium, tin and an alloy having major component of two or more kinds of them, is previously applied on a surface of joined portion of the dissimilar metal member, the plated joined portion of the dissimilar metal member is dipped in a molten brazing filler metal or a molten solder and ultrasonic vibration is given to the joined portion to stick the brazing filler metal or the solder to the joined portion, and a brazing or a soldering is carried out thereafter.
    Type: Grant
    Filed: April 23, 1993
    Date of Patent: June 21, 1994
    Assignee: Nippon Aluminum Co., Ltd.
    Inventors: Shuichiro Kato, Masao Kinoshita, Hiroshi Ikami
  • Patent number: 5307983
    Abstract: The present invention is embodied in a technique for precise and accurate height control in fabricating solder bumps or joints formed from a solder bump or bumps. A solder bump is formed by reflow of a conical solder body having base diameter D, height H and cone angle .theta., and has truncated sphere shape, with height h and truncation diameter d. We have found that D, H, and d can be selected such that .differential.h/.differential.H is small (typically .ltoreq.0.5), indicative of relative insensitivity of the bump height to variation in the height of the conical solder body. The inventive process is also applicable to a component (e.g., a laser) solder-bonded to a substrate, and can provide previously unattainable control of the spacing between component and substrate.
    Type: Grant
    Filed: April 27, 1993
    Date of Patent: May 3, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Thomas D. Dudderar, Chee C. Wong
  • Patent number: 5301862
    Abstract: A solder coating apparatus for coating lead sections of a lead frame, including a liquid solder bath and a coating block having a first slit-like passage therethrough for permitting a lead frame to pass through the block and a second passage of enlarged cross section communicating with and extending along the first passage for permitting the lead frame package to pass through the block. A pair of liquid solder supply slits are formed in the block and communicates with the first passage along the length thereof and on opposite sides of the second passage. A pump at least partially immersed in the liquid solder bath provides for positive supply of liquid solder to and through the slits into the first passage to coat the lead sections. A conduit connects between the delivery side of the pump and the liquid solder supply slits.
    Type: Grant
    Filed: October 5, 1992
    Date of Patent: April 12, 1994
    Assignee: Fuji Seiki Machine Works, Ltd.
    Inventors: Chiaki Shigematsu, Naokatsu Kojima
  • Patent number: 5297720
    Abstract: A method of assembling a mechanical part on a support includes making a projecting thickening situated substantially over a connection face of an anchor block of the part; depositing a layer of one of the components of a eutectic on at least one fixing zone of the support; using a tool for holding the thickening to move the part so that its connection face co-operates with the fixing zone of the support; raising the temperature of the eutectic point of the eutectic; exerting localized force on the thickening; and simultaneously subjecting the part or the support to mechanical stresses. The invention is particularly applicable to assembling a capacitive sensor. The invention is also directed to a mechanical part for carrying out the assembly method, as well as a tool for grasping the mechanical part.
    Type: Grant
    Filed: August 17, 1992
    Date of Patent: March 29, 1994
    Assignees: Societe Anonyme: Vectavib, Societe d'Applications Generales d'Electricite et de Mecanique SAGEM
    Inventor: Alfred Permuy
  • Patent number: 5297718
    Abstract: The improvement in the soldering method of soldering a workpiece comprising the steps of forming a solder melting pot by engaging plural trowel members, supplying a solder tip having a constant volume to the solder melting pot, melting the solder tip and holding the molten solder temporarily in the solder melting pot and then separating the plural trowel members to allow the molten solder to drop onto the workpiece. The improvement comprises detecting complete melting of the solder tip by sensing the change in intensity of the light reflected by the surface of the molten solder, and heating the molten solder for an additional time period after the completion of melting of the solder tip. A soldering apparatus for use to realize the aforementioned method is also provided.
    Type: Grant
    Filed: June 8, 1993
    Date of Patent: March 29, 1994
    Inventor: Eishu Nagata
  • Patent number: 5294039
    Abstract: A curved lead provides a mechanical and electrical connection between a board contact on a circuit board and a chip contact associated with a circuit chip. The chip can be mounted to the circuit board, to a chip carrier or to a multiple-chip module. The curved lead is substantially entirely plated with solder and is formed of a single piece of conductive material. The curved lead has a first surf ace for connection to the chip contact and a second surface, generally parallel to the first surface, for connection to the board contact. The first and second surfaces are connected by at least one curved portion and are arranged to mount the circuit chip to the circuit board with the solder in a compliant, generally parallel arrangement substantially free of stress.
    Type: Grant
    Filed: May 14, 1993
    Date of Patent: March 15, 1994
    Assignee: Ceridian Corporation
    Inventors: Deepak K. Pai, Terrance A. Krinke
  • Patent number: 5289631
    Abstract: An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips.
    Type: Grant
    Filed: March 4, 1992
    Date of Patent: March 1, 1994
    Assignee: MCNC
    Inventors: Nicholas G. Koopman, Glenn A. Rinne, Iwona Turlik, Edward K. Yung
  • Patent number: 5284796
    Abstract: A process for a flip chip connection of a semiconductor chip includes the steps of forming a plurality of stud bumps on the semiconductor chip, on which a plurality of solder bumps are formed, in the vicinity of the outer periphery thereof and on the outside of the solder bumps, providing a cut groove between a plurality of the solder bumps and the stud bumps, mating the solder bumps on the semiconductor chip and the corresponding solder bumps on the circuit board and heating for subsequent integration of the mating solder bumps, and breaking way the outer peripheral portion of the semiconductor chip along the cutting groove after a flip chip connection in order to remove the stud bumps.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: February 8, 1994
    Assignee: Fujitsu Limited
    Inventors: Teru Nakanishi, Kazuaki Karasawa, Masayuki Ochiai, Kaoru Hashimoto
  • Patent number: 5284287
    Abstract: Conductive balls (44), preferably solder balls, are attached to pads (32) on a substrate (30) using a vacuum pick-up tool (34). The pick-up tool lowers the conductive balls into a bath of flux (48) without allowing the balls to touch the bottom of a recess (47) in a flux plate (46), thereby reducing the likelihood of dislodging the solder balls from the pick-up tool. The pick-up tool withdraws the balls from the flux, and aligns the balls with the respective pads on the substrate. Once positioned, the balls are released from the pick-up tool. A reflow operation metallurgically bonds the balls to the pads.
    Type: Grant
    Filed: August 31, 1992
    Date of Patent: February 8, 1994
    Assignee: Motorola, Inc.
    Inventors: Howard P. Wilson, Fonzell D. J. Martin
  • Patent number: 5275970
    Abstract: Disclosed is a method of forming bonding metal bumps on electrodes of a submount for use with an optical device array. Small bonding metal pieces are arranged on a transfer piece resting substrate so as to be aligned with the electrodes of the submount. Next, the bonding metal pieces thus arranged are transferred onto respective electrodes of the submount. In one embodiment, bonding metal pieces are preferably formed by punching a ribbon-shaped bonding metal and respectively fixed by a force of the punching operation directly onto the electrodes of the submount.
    Type: Grant
    Filed: October 17, 1991
    Date of Patent: January 4, 1994
    Assignee: NEC Corporation
    Inventors: Masataka Itoh, Hiroshi Honmou
  • Patent number: 5271548
    Abstract: A method for applying solder to and mounting components on printed circuit boards, includes applying a solder paste to electrically conductive regions of a printed circuit board to form solder deposits, and subsequently melting the solder deposits into solder applications joined to the conductive regions. The components are joined to the printed circuit board with an adhesive applied to the printed circuit board between the electrically conductive regions, while assigning each of the electrically conductive regions to a respective one of the components. A flux is applied and a soldering process is performed.
    Type: Grant
    Filed: August 14, 1992
    Date of Patent: December 21, 1993
    Assignee: Siemens Aktiengesellschaft
    Inventor: Werner Maiwald
  • Patent number: 5269453
    Abstract: An integrated circuit component is attached to a printed circuit board by solder bump interconnections that are formed between metal bumps on the component and a metal-plated terminal on the board. The metal plate overlies both a bond pad and an adjacent runner of each terminal and is formed of a first metal, which is preferably a tin-base alloy. The metal bumps on the component are formed of a second metal, which is preferably an indium-base alloy. The component and board are assembled and heated to a temperature less than the melting temperatures of the first and second metals. At the interface between the bumps and the plate, the first and second metals cooperate to form a liquid phase which, upon cooling and solidifying, completes the interconnection.
    Type: Grant
    Filed: October 8, 1992
    Date of Patent: December 14, 1993
    Assignee: Motorola, Inc.
    Inventors: Cynthia M. Melton, Kenneth Cholewczynski, Kevin D. Moore, Carl Raleigh
  • Patent number: 5255840
    Abstract: An essentially fluxless soldering process enables a solder coating to be applied to a surface under controlled pressure conditions enabling the volume and shape of the solder to be desirably controlled. Coatings produced by essentially fluxless processes enable joining processes to be carried out in an essentially fluxless manner with highly desirable processing flexibility.
    Type: Grant
    Filed: May 5, 1992
    Date of Patent: October 26, 1993
    Assignee: Praxair Technology, Inc.
    Inventor: Mark S. Nowotarski
  • Patent number: 5249732
    Abstract: In a method of bonding a pad on a semiconductor chip to a corresponding pad on a carrier, a wire ball is attached to the pad on the chip by bonding one end of a low melting temperature aluminum alloy bond wire to the chip pad. The wire is then broken off at the bond. A bead is formed on the chip pad by heating the ball to a temperature slightly above the melting point of the bond wire material for a predetermined period of time. The melted bead is then placed into contact with a corresponding pad on the carrier.
    Type: Grant
    Filed: February 9, 1993
    Date of Patent: October 5, 1993
    Assignee: National Semiconductor Corp.
    Inventor: Michael E. Thomas
  • Patent number: 5248080
    Abstract: An article for joining in end-to-end relationship two or more tubular articles such as pipe sections, and particularly pipe sections coated on their inner and outer surfaces with an electroless metal such as nickel and adapted for passing corrosive liquids and solids includes a ring-shaped member having a meltable coating, on its surfaces intended to engage the ends of the tubular articles and the inner surface of the tubular articles at their junction, and having a flange on its outer circumference that is of a shape and size adapted to engage and seat upon the inner surfaces of the tubular articles to be joined in end-to-end relationship. Welding material is placed in a chamfered region formed at the outer edge of two tubular articles at their ends, joining the two tubular articles in end-to-end relationship with the ring-shaped member between them, and melting the coating into the junction between those ends, and into the interface between the flange surface and the inner surfaces of the tubular articles.
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: September 28, 1993
    Assignee: Stapleton Technologies, Inc.
    Inventor: Philip D. Stapleton
  • Patent number: 5242099
    Abstract: In a manufacturing method for a semiconductor device, first, a diffused layer of a soldering material is provided previously either on the reverse surface of a die or on the obverse surface of a die pad. Then, a diffusing layer is formed on either surface of the diffused layer. The diffusing layer between the die and the die pad is brought into contact with the die and die pad, and then these components are heated. The die is thereby and fully bonded to the die pad, even when the diffusing layer, which is an initial bonding layer, is made thinner. Because the time for the diffusing layer to diffuse can be shortened, the time for installing the die can also be shortened.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: September 7, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Naoto Ueda
  • Patent number: 5238176
    Abstract: A bump having a shape adapted to bonding of a flip chip method and an enough volume is efficiently accurately formed at low costs. By applying a pressure into a chamber, a fused solder 8 in the chamber 1 is extruded from a micro opening 3 and adhered onto a pad 12. After that, by eliminating the pressure, the fused solder is separated by the surface tension of the fused solder itself and is allowed to remain as a solder bump onto the pad.
    Type: Grant
    Filed: February 24, 1992
    Date of Patent: August 24, 1993
    Assignee: International Business Machines Corporation
    Inventor: Hideo Nishimura
  • Patent number: 5222652
    Abstract: A seamless double-walled tube having high corrosion resistance and relative flexibility prepared by a process for brazing non-ferritic steel surfaces such as nickel chromium or stainless steel to which a suitable brazing alloy such as copper has been mechanically attache which includes the steps of instantaneously elevating the surface of the stainless steel to a brazing temperature while maintaining the material in a humidified gaseous atmosphere consisting essentially of a non-reactive carrier gas and a reactive gas present in sufficient concentrations to achieve fluxing; maintaining the surface temperature of the steel for an interval sufficient to permit fusion between the selected metal and the non-ferritic steel surface; after metal fusion has been achieved, allowing the resulting fused metal material to cool to a first lowered temperature in a controlled non-oxidative atmosphere at a rate which retards the formation of fine-grained steel crystals in the metal; and after reaching a metallurgical transfo
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: June 29, 1993
    Assignee: ITT Corporation
    Inventors: Glen A. Gibbs, Arnold T. Johnson
  • Patent number: 5222650
    Abstract: A horizontal solder leveller for applying solder to a board comprises: means 15.sub.u,15.sub.1, 16.sub.u ; 16.sub.1 ; 17.sub.u,17.sub.1 including a solder bath 1 for applying molten solder 2 to a board. means 47 for levelling solder applied to the board, including nozzles for directing solder-levelling air jets at the board, and means 19.sub.u,19.sub.1,48 for creating a dispersion of oil in an air stream from the levelling means, the oil dispersion means being provided between the solder applying means and the levelling means.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: June 29, 1993
    Inventor: Peter P. A. Lymn
  • Patent number: 5217922
    Abstract: A method of manufacturing a semiconductor device wherein the back surface of a semiconductor chip is adhered closely to a substrate or a seal member through a soldering material or the like, and a metallized layer is formed on the back surface of the chip for attaining good adhesion. The metallized layer according to the present invention is a layer formed by laminating a metal silicide, a barrier metal and an oxidation preventing metal successively on the back of the chip. The layer of the metal silicide can be formed in a known heat treatment process, for example, simultaneously with the formation of bump electrodes, on a main surface of the semiconductor chip by the heat used at the time of forming such bump electrodes, or simultaneously with the mounting of the semiconductor chip by the heat used at the time of the chip mounting.
    Type: Grant
    Filed: December 19, 1991
    Date of Patent: June 8, 1993
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Hiroshi Akasaki, Kanji Otsuka, Tetsuya Hayashida
  • Patent number: 5206186
    Abstract: Annealed copper foil (12) is coated with chromium film (16), followed by coating with an appropriate thickness of gold film (14) and is thermocompression bonded to an aluminum metallized substrate (18) on a silicon chip (30) to provide solderable, high current contacts to the chip. The foil is formed into appropriate electrical network-contact patterns (40) and is bonded to the silicon chip only where aluminum metallization exists on the chip. Leaf (wing) portions (46) of the foil extend beyond the boundaries of the silicon chip for subsequent retroflexing over the foil to provide electrical contact at predesignated locations (49). External contacts to the foil are made by penetrating through a ceramic lid positioned directly above the foil area. Thus, direct thermocompression bonding of a principally copper foil to aluminum semiconductor pads can replace current gold detent/bump connections by securing a copper conductor to a silicon chip through an intermetallic AuAl.sub.2 link and an aluminum stratum.
    Type: Grant
    Filed: September 25, 1992
    Date of Patent: April 27, 1993
    Assignee: General Electric Company
    Inventors: Constantine A. Neugebauer, Homer H. Glascock, II, Kyung W. Paik, James G. McMullen
  • Patent number: 5197655
    Abstract: Methods and apparatus are provided for applying solder in precise amounts to fine pitch leads such as those suitable for direct chip attachment (DCA) or flip-chip applications by using a heated platen to apply pressure to solder overlaying a plurality of lands on circuitized substrate. In one embodiment paste solder screened through a mask having apertures each corresponding to a plurality of land locations. In another embodiment, a web of solder foil is accurately positioned over a plurality of fine pitch lands. In each embodiment, a heated platen includes at least one active element corresponding in size and shape to the area having a plurality of fine pitch lands. A third embodiment includes individual platens for lands to which solder is to be applied.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: March 30, 1993
    Assignee: International Business Machines Corporation
    Inventors: Arthur L. Leerssen, Everitt W. Mace, Issa S. Mahmoud, Charles T. Randolph, John Reece, Gaston G. Settle, Phong T. Truong, Srini V. Vasan
  • Patent number: 5193738
    Abstract: Metallic surfaces are soldered together without using flux or solvents. The metallic surfaces are maintained in an atmosphere of inert gas and cleaned with a laser. An ejection device deposits drops of liquid solder on a predetermined one of the metallic surfaces and the metallic surfaces are moved relative to each other so that the solidified solder contacts the other metallic surface. The metallic surfaces and the solidified solder are then heated until the solidified solder reflows and joins the metallic surfaces.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: March 16, 1993
    Assignee: MicroFab Technologies, Inc.
    Inventor: Donald J. Hayes
  • Patent number: 5188982
    Abstract: An Au/si die attach method for attaching a die to a package including preheating the package, melting an Au/Si preform in the package cavity, scratching the die onto the package cavity to form a die attach bond, and gradually cooling an Au/Si die bond by reducing heat supplied to the package, so as to cool the package through a monotonically decreasing sequence of temperatures, wherein the package is maintained for a predetermined period of time at each temperature in the sequence.A heating block with segments supplies a decreasing amount of heat to the packages to let the die attached bond gradually cool. The packages are kept on top of the segments of the heating block for a predetermined period of time and each segment is heated to a specific temperature. The gradual cooling of the die attach bond decreases the thermal resistance and prevents the creation of voids in the die attach bond.
    Type: Grant
    Filed: December 20, 1991
    Date of Patent: February 23, 1993
    Assignee: VLSI Technology, Inc.
    Inventor: Chin-Ching Huang
  • Patent number: 5186383
    Abstract: A method for attaching an integrated circuit component to a printed circuit board by a plurality of solder bump interconnections utilizes a printed circuit board comprising a solder-plated circuit trace. The trace includes terminals, each including a terminal pad and a runner section. A solder plate formed of a first solder alloy is applied to the terminal to extend continuously between the pad and the runner section. Solder bumps are affixed to the component and are formed of second compositionally distinct solder alloy having a melting temperature greater than the first alloy. The component and board are then assembled so that the bumps rest against the solder-plated terminal pads, and heated to a temperature effective to melt the solder plate but not the bump alloy. Upon cooling to resolidify the solder, the solder plate is fused to the bumps to form the interconnections.
    Type: Grant
    Filed: October 2, 1991
    Date of Patent: February 16, 1993
    Assignee: Motorola, Inc.
    Inventors: Cynthia Melton, Carl Raleigh, Kenneth Cholewczynski, Kevin Moore
  • Patent number: 5172852
    Abstract: An electronic component (14) is soldered to a circuit carrying substrate (11) by a method that allows the component to remain in better contact with the flat solder pads of the substrate. The circuit carrying substrate (11) has a plurality of solder pads (12) disposed thereon, each pad consisting of a terminal portion (16), a solder reservoir portion (18), and a bridging portion (17). The terminal portion is connected to the reservoir portion by the bridging portion. The bridging portion is typically a necked down portion of the pad. The electronic component (14) has a plurality of solderable terminals (15) corresponding to the terminal portions (16) of the solder pads (12). Each of the solder pad reservoir portions are coated with a reservoir of solder (23). The amount of solder coated onto the reservoir portion is sufficient to provide a fillet between the component (14) and the solder pad terminal portion (16) during a subsequent heating step.
    Type: Grant
    Filed: May 1, 1992
    Date of Patent: December 22, 1992
    Assignee: Motorola, Inc.
    Inventors: Lonnie L. Bernardoni, Kenneth R. Thompson, Anthony B. Suppelsa
  • Patent number: 5172853
    Abstract: A method for applying solder to printed wiring boards includes producing a printed wiring board with electrically conductive regions. Soldering paste is applied as a solder deposit on the electrically conductive regions. The solder deposits are melted to form hump-shaped solid solder applications joined to the printed wiring board. The hump-shaped solder applications are levelled out by areally applying pressure to the solder applications in the direction of the printed wiring board. A printed wiring board to which solder has been applied includes a wiring board surface having regions to be equipped with components according to an SMD process. Solder applications are disposed on the regions in the form of a solid solder layer. The solid solder layer has a pressed or rolled surface extended substantially parallel to the wiring board surface.
    Type: Grant
    Filed: December 2, 1991
    Date of Patent: December 22, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventor: Werner Maiwald
  • Patent number: 5167361
    Abstract: A method of forming flat solder bumps (16 and 18) on contact areas (12 and 14) of a first side and second side of a printed circuit board (12, 14 and 10) comprises the steps of applying solder paste in a predetermined pattern and a predetermined thickness on the contact areas of the first side and the second side of the printed circuit board forming joint areas. Next, the solder paste is reflowed. Then, the solder joints on the first side are flattened (17). Before surface mounted components (20 and 26) are mounted on the printed circuit board, tack media (32) is dispensed onto the joint areas. Subsequently, the printed circuit boards is reflowed. Now the second side of the printed circuit board is flattened (19). As with the first side, tack media (34) is dispensed on the solder joints on the second side before surface mounted components (40 and 46) are mounted on the second side. Finally, the printed circuit board is reflowed again.
    Type: Grant
    Filed: May 16, 1991
    Date of Patent: December 1, 1992
    Assignee: Motorola, Inc.
    Inventors: Henry F. Liebman, Anthony B. Suppelsa, Francisco de Costa Alves
  • Patent number: 5161729
    Abstract: Disclosed is a composition and method for providing conductive electronic component high strength bonding. The composition comprises an effective amount of material which is less than 3% by weight of tin and greater than 97% by weight of lead. The method invention comprises providing a leadframe comprising at lest one of power, ground, and signal conductive elements; and preforming solder material onto one of the conductive elements, the solder bonding material having an effective amount of material which is less than 3% by weight of tin and greater than 97% by weight of lead.
    Type: Grant
    Filed: July 11, 1991
    Date of Patent: November 10, 1992
    Assignee: Honeywell Inc.
    Inventors: Thomas J. Dunaway, Richard K. Spielberger, Lori A. Dicks, Jerald M. Loy
  • Patent number: 5162257
    Abstract: The base of solder bumps is preserved by converting the under-bump metallurgy between the solder bump and contact pad into an intermetallic of the solder and the solderable component of the under-bump metallurgy prior to etching the under-bump metallurgy. The intermetallic is resistant to etchants which are used to etch the under-bump metallurgy between the contact pads. Accordingly, minimal undercutting of the solder bumps is produced, and the base size is preserved. The solder may be plated on the under-bump metallurgy over the contact pad through a patterned solder dam layer having a solder accumulation region thereon. The solder dam is preferably a thin film layer which may be accurately aligned to the underlying contact pad to confine the wetting of the molten solder during reflow. Misalignment between the solder bump and contact pad is thereby reduced. The solder bumps so formed include an intermetallic layer which extends beyond the bump to form a lip around the base of the bump.
    Type: Grant
    Filed: September 13, 1991
    Date of Patent: November 10, 1992
    Assignee: MCNC
    Inventor: Edward K. Yung
  • Patent number: 5156322
    Abstract: A solder coating is applied to a metallized ceramic part in that at least two layers, in each case composed of nickel, copper, silver, zinc or tin, are applied chemically or galvanically. Under the soldering conditions molten solder metal forms on these layers. Useful layers for hard solders are those which are in each case composed of Ni, Cu or Ag. For example, a layer of nickel, copper or silver, with a layer thickness of at least 0.5 .mu.m, can be first applied to the metallized ceramic part, followed by at least one further layer of nickel, copper or silver with a layer thickness of 10-105 .mu.m, until a total layer thickness of 15-300 .mu.m is obtained.
    Type: Grant
    Filed: June 11, 1991
    Date of Patent: October 20, 1992
    Assignee: Hoechst CeramTec Aktiengesellschaft
    Inventors: Tha Do-Thoi, Klaus Popp
  • Patent number: 5154341
    Abstract: An improved electrical component package comprises a component attached to a substrate by a plurality of multisolder interconnections. Each interconnection comprises a preformed spacer bump composed of a first solder alloy, preferably a lead-base tin alloy containing greater than 90 weight percent lead. The spacer bump is bonded to a metallic electrical contact of the component and rests against a corresponding metallic electrical contact of the substrate, but is not directly metallurgically bonded thereto. Each interconnection further comprises a sheath portion formed of a second compositionally distinct solder alloy having a liquidus temperature less than the first alloy solidus temperature. A preferred second solder is a tin-lead alloy comprising between about 30 and 50 weight percent lead and the balance tin or indium.
    Type: Grant
    Filed: December 6, 1990
    Date of Patent: October 13, 1992
    Assignee: Motorola Inc.
    Inventors: Cynthia M. Melton, Carl J. Raleigh, Steven Scheifers
  • Patent number: 5147084
    Abstract: Disclosed is a connector structure on a substrate which includes at least one first solder portion on the surface of the substrate; at least one second solder portion connected to each of the at least one first solder portions; and an epoxy layer disposed about the at least one first and second solder portions in such a manner as to cover the first solder portion and contact, but not cover, the second solder portion. Also disclosed is a connector structure on a substrate which includes at least one first solder portion on the surface of said substrate; at least one second solder ball portion connected to the at least one first solder portions; wherein the melting point of the second solder ball portion is relatively higher than that of the first solder portion. Finally, disclosed is a method of testing the solderability of the above structures.
    Type: Grant
    Filed: August 9, 1991
    Date of Patent: September 15, 1992
    Assignee: International Business Machines Corporation
    Inventors: John R. Behun, Anson J. Call, Francis F. Cappo, Marie S. Cole, Karl G. Hoebener, Bruno T. Klingel, John C. Milliken
  • Patent number: 5137205
    Abstract: A wiring circuit substrate comprises first circuit element means one one side of the substrate connected to electrode lines of X-Y matrix electrodes, respectively, and second circuit element means in the symmetrical position of the first circuit element means on the other side of the substrate connected to the electrode lines of the X-Y matrix electrodes, respectively, wherein each of leads of the first and the second circuit element means is connected to the output and input lines of the X-Y matrix electrodes via through holes, respectively.The first circuit element comprises integrated transisitors for driving the X-Y matrix electrodes. The second circuit element comprises integrated diodes for protecting an overcurrent in the X-Y matrix electrodes.
    Type: Grant
    Filed: February 20, 1991
    Date of Patent: August 11, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akio Inohara, Yuji Ohno, Kiyoshi Sawae, Yoshiharu Kanatani, Hisashi Uede, Takeo Fujimoto
  • Patent number: 5130164
    Abstract: An arrangement for solder-coating respective end portions of elongated components in a molten solder bath includes a fixture to be loaded with the components. This fixture includes at least one supporting wall that is capable of maintaining the fixture afloat in a predetermined position on an upper surface of the molten solder bath even when the fixture is fully loaded. The supporting wall has at least one opening through which one of the end portions of a respective component passes into the molten solder bath to a depth necessary for the molten solder to coat the respective end portion to the desired extent when the fixture floats in its predetermined position on the molten solder bath.
    Type: Grant
    Filed: June 27, 1990
    Date of Patent: July 14, 1992
    Assignee: United Technologies Corporation
    Inventors: Steven Hutchison, Leonard Bruno
  • Patent number: 5119240
    Abstract: An assembly of parts forming an angle between facing surfaces of the parts and a process for producing an assembly is described. The parts (2, 4) are provided with contact elements or pads (6, 8, 10, 12) for connection to one another by means of a relatively low melting point metallic soldering material. The surface of each of the pads is wettable by the low melting point metallic material in the molten state, while areas surrounding the pads are not wettable. The contact pads of one of the parts are covered with flat coils or wafers (10, 12) of the low melting point metallic material. The wafers have the same thickness, but different volumes. The contact pads of the other part are placed on the corresponding wafers. The wafers' thickness, volumes, and spacing are chosen so that when the wafers are heated to the molten state and form truncated spherical drops due to surface tension, the parts form between them a predetermined angle. The invention has particular application to the manufacture of mirrors.
    Type: Grant
    Filed: August 8, 1990
    Date of Patent: June 2, 1992
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Francois Marion, Michel Ravetto, Jean-Luc Tissot
  • Patent number: 5108027
    Abstract: A flip-chip solder bonding arrangement including a semiconductor substrate having thereon layers of metallization which have a tendency to interact with a solder material, forming on said layers of metallization a barrier metallization layer which is not reactive with said solder material, forming solder pads on the barrier layer and thereafter forming solder bonds with such solder pads employing said solder material.
    Type: Grant
    Filed: April 12, 1991
    Date of Patent: April 28, 1992
    Assignee: GEC-Marconi Limited
    Inventors: David J. Warner, Kim L. Pickering, David J. Pedder
  • Patent number: 5102031
    Abstract: Braze filler alloy is specifically applied and metallurgically bonded to a desired region of a nickel based superalloy workpiece using an electrospark deposition technique. The braze filler alloy is deposited onto, and concurrently metallurgically alloyed into, the desired region of the base metal by transfer of the material from the electrode using a short duration electrical impulse. The time and energy involved are small enough that total heat input to the base metal is minimal so that distortion and metallurgical structure changes of the base metal are negligible.
    Type: Grant
    Filed: March 11, 1991
    Date of Patent: April 7, 1992
    Assignee: General Motors Corporation
    Inventors: Peter W. Heitman, Stephen N. Hammond, Lawrence E. Brown, Elizabeth J. Holmes
  • Patent number: 5090613
    Abstract: This invention relates to an improved method of manufacturing an anode assembly of a magnetron used in a microwave oven to generate an electromagnetic wave for cooking foodstuffs therein. The method comprises coating of entire surfaces of vanes with a brazing material to join an anode cylinder, upper and lower strip rings and an antenna lead contacting the vanes by the coated brazing material on the vanes, whereby enhanced efficiency of a production process, mass production and reduction in costs may be achieved.
    Type: Grant
    Filed: May 21, 1991
    Date of Patent: February 25, 1992
    Assignee: Gold Star Co., Ltd.
    Inventor: Sang Sung Lee
  • Patent number: 5088397
    Abstract: A cast-formed bi-metallic worm assembly of a mechanical screw press for expressing liquids from fibrous materials and a method of manufacture therefor. The worm assembly is rotatably driven by the press drive shaft and includes an outer flight body having an integral outwardly extending helical flight formed of a relatively brittle, wear-resistant homogeneous cast material and an inner hub tightly fitted and substantially fully mated within, and coextensive with, the outer flight body. The inner hub, cast formed of a more ductile, tougher homogeneous material, includes a hollow cylindrical interior surface structured for slidable engagement around and in driving connection with the drive shaft. The inner hub and outer flight body are securely engaged one to another by a very thin layer of bonded brazing compound over substantially the entire mating surface therebetween. The method of manufacturing helps insure very close mating surface contact to enhance the strength of brazing.
    Type: Grant
    Filed: January 11, 1991
    Date of Patent: February 18, 1992
    Assignee: The Dupps Co.
    Inventors: Peter W. Mansfield, Frank N. Dupps
  • Patent number: 5050790
    Abstract: A metal-made carrier body is fabricated for an exhaust gas cleaning catalyst. At least one sheet-like metal band and at least one corrugated metal band, each of said bands being made of a thin metal sheet, are superposed one over the other so as to establish contacts therebetween, thereby forming a multi-layered composite body defining a number of network-patterned gas flow passages along the central axis thereof. The composite body is dipped in an electroless plating bath capable of forming a brazing coating layer on the composite body so as to form a brazing coating layer at least in the vicinity of each contact except for the contact itself. The composite body is then subjected to a heat treatment so as to braze the contacts between the sheet-like metal band and corrugated metal band. Before dipping the composite body in the plating bath, it may optionally be enclosed in a cylindrical metal casing. The composite body and cylindrical metal casing are also brazed together at their mutual contacts.
    Type: Grant
    Filed: March 19, 1990
    Date of Patent: September 24, 1991
    Assignee: Usui Kokusai Sangyo Kabushiki Kaisha
    Inventors: Kazunori Takikawa, Yuzo Hitachi
  • Patent number: 5048747
    Abstract: Disclosed is an apparatus, method, and resulting product involving soldering of components, such as the soldering of flexible circuits to printed circuit boards. Holes are provided in the areas of one component which are to be soldered to pads on the other component. Precise amounts of solder are provided to each pad, preferably by means of a shuttle element which carries solder paste in cavities corresponding to the pads and which deposits the solder on the pads when the solder is melted. The holes in the component are aligned with the pads, and the solder is reflowed so that a visible solder fillet is formed above the holes to permit inspection of the solder joint.
    Type: Grant
    Filed: July 31, 1990
    Date of Patent: September 17, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: William A. Clark, Michael A. Oien, Walter Pelosi
  • Patent number: 5036584
    Abstract: A method of forming an enclosure for an electric circuit and the enclosure wherein there is provided a boat of material having a bottom and side wall, placing a material having a substantially higher thermal conductivity and a lower melting point than that of the boat in the boat bottom, heating the material to a temperature above the melting point thereof and below the melting point of the boat to cause the material to flow along the bottom to form a layer of the material thereon and join the layer to the bottom and side wall and removing a sufficient amount of the bottom of said boat to expose the layer. In accordance with a second embodiment, a depression is formed in the bottom, and when the material flows along the bottom, it fills the depression and become joined to the bottom. Plural such depressions can be provided. The exterior portion of the bottom is removed to expose the material if the depressions do not extend completely through the bottom.
    Type: Grant
    Filed: June 13, 1989
    Date of Patent: August 6, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Robert E. Beauregard, Joseph M. Gondusky, Henry F. Breit
  • Patent number: 5033666
    Abstract: A process for brazing a metallized component to a metallized ceramic-based substrate comprising the steps of:(a) applying a second conductor composition over the metallizations on the substrate such that the metallizations are covered by said second conductor composition which consists essentially of a metal powder and an organic medium;(b) drying said second conductor composition;(c) firing said second conductor composition at a temperature sufficient to sinter the metal powder of the second conductor composition and drive off said organic medium thereby forming a second metallization layer;(d) forming an assembly by positioning at least one metallized component on said second metallization layer and a brazing composition at the component-second metallization layer interface; and(e) heating said assembly at a temperature sufficient for said brazing composition to form a joint between said component and said second metallization layer.
    Type: Grant
    Filed: April 12, 1990
    Date of Patent: July 23, 1991
    Assignee: E. I. Du Pont de Nemours and Company
    Inventors: Roupen L. Keusseyan, William J. Nebe, James J. Osborne
  • Patent number: 5024372
    Abstract: A method of forming solder bumps includes the steps of applying a thick layer of solder resist to a substrate. The resist is selectively removed to provide wells at solder pads on the substrate. The solder paste is applied to the substrate in the wells. The solder paste is reflowed to form solder bumps on the pads. A socket for a solder bumped member is obtained by first providing a substrate having metalized pads corresponding to the solder bumps of the member. A thick layer of photo definable solder resist is applied to the substrate. The resist is selectively removed to provide wells at the metalized pads of the substrate. Solder paste is then deposited in the wells. The solder bumped member can then be positioned so that the solder bumps are located in the wells. The solder paste is reflowed to bond to the solder bumps and the metalized pads. The solder paste can be selected to have a lower melting temperature than the solder bumps.
    Type: Grant
    Filed: May 9, 1990
    Date of Patent: June 18, 1991
    Assignee: Motorola, Inc.
    Inventors: Leonard F. Altman, Jill L. Flaugher, Anthony B. Suppelsa, William B. Mullen, III
  • Patent number: 5022580
    Abstract: A flip-chip solder bonding structure having first and second components. Each component is made from a substrate haivng on one surface an array of solderable pads. Selected pads have solder bumps deposited thereon with each surface having a plurality of alignment marks formed thereon whereby when the components are positioned face to face, the arrays register with one another to enable a solder bond to be formed. The respective pluralities of alignment marks may be inspected to assess their relative positions in order to determine the accuracy of the solder bond. The solderable pads and the alignment marks on each surface are formed during the same processing stage as metallized regions. The solder bumps are applied to the metallized regions forming the alignment marks.
    Type: Grant
    Filed: November 30, 1989
    Date of Patent: June 11, 1991
    Assignee: Plessey Overseas Limited
    Inventor: David J. Pedder