Low Workfunction Layer For Electron Emission (e.g., Photocathode Electron Emissive Layer) Patents (Class 257/10)
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Patent number: 6495843Abstract: A method for promoting the passage of elementary particles at or through a potential barrier comprising providing a potential barrier having a geometrical shape for causing de Broglie interference between said elementary particles is disclosed. In another embodiment, the invention provides an elementary particle-emitting surface having a series of indents. The depth of the indents is chosen so that the probability wave of the elementary particle reflected from the bottom of the indent interferes destructively with the probability wave of the elementary particle reflected from the surface. This results in the increase of tunneling through the potential barrier. When the elementary particle is an electron, then electrons tunnel through the potential barrier, thereby leading to a reduction in the effective work function of the surface.Type: GrantFiled: August 31, 1998Date of Patent: December 17, 2002Assignee: Borealis Technical LimitedInventor: Avto Tavkelidze
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Patent number: 6492657Abstract: An electron flux amplifier is provided wherein a microchannel plate (MCP) is monolithically formed with, or bonded to, a semiconductor amplifier. In a preferred embodiment, microchannels are formed to extend into a semiconductor substrate to a predetermined depth from the surface, and a collection diode is formed in the substrate beneath the channels. The collection diode may comprise a single planar diode, or a plurality of electrically isolated diodes to provide for imaging of the electron flux. The electron flux amplifier may be used as a detector in a photomultiplier tube (PMT) having a photoelectronically responsive input surface and one or more accelerating electrodes for directing a photoelectron flux toward the electron flux amplifier.Type: GrantFiled: January 27, 2000Date of Patent: December 10, 2002Assignee: Burle Technologies, Inc.Inventors: Erich Burlefinger, Charles M. Tomasetti
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Publication number: 20020175323Abstract: Gated field emission devices and systems and methods for their fabrication are described. A method includes growing a substantially vertically aligned carbon nanostructure, the substantially vertically aligned carbon nanostructure coupled to a substrate; covering at least a portion of the substantially vertically aligned carbon nanostructure with a dielectric; forming a gate, the gate coupled to the dielectric; and releasing the substantially vertically aligned carbon nanostructure by forming an aperture in the gate and removing a portion of the dielectric.Type: ApplicationFiled: May 24, 2002Publication date: November 28, 2002Inventors: Michael A. Guillom, Michael L. Simpson, Vladimir I. Merkulov, Anatoli V. Melechko, Douglas H. Lowndes
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Publication number: 20020171075Abstract: A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes the steps of storing first operation condition information in a first register, storing second operation condition information in a second register, changing the first operation condition information, and when the first operation condition information is changed, changing the second operation condition information to changed first operation condition information in accordance with change information for changing the first operation condition information.Type: ApplicationFiled: February 22, 2002Publication date: November 21, 2002Applicant: FUJITSU LIMITEDInventor: Teruaki Maeda
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Publication number: 20020167001Abstract: An emitter has an electron supply layer and a tunneling layer formed on the electron supply layer. Optionally, an insulator layer is formed on the electron supply layer and has openings defined within in which the tunneling layer is formed. A cathode layer is formed on the tunneling layer to provide a surface for energy emissions of electrons and/or photons. Preferably, the emitter is subjected to an annealing process thereby increasing the supply of electrons tunneled from the electron supply layer to the cathode layer.Type: ApplicationFiled: April 30, 2001Publication date: November 14, 2002Inventors: Zhizhang Chen, Michael J. Regan, Brian E. Bolf, Thomas Novet, Paul J. Benning, Mark Alan Johnstone, Sriram Ramamoorthi
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Patent number: 6476408Abstract: A field-emission device includes at least one plane cathode made of conductive material with a low electron affinity located on a face of a substrate carrying a layer of a dielectric material, which layer has at least one cavity in which the cathode is located. A gate made of conductive material is located on the dielectric layer and has an aperture centered with respect to the cavity. The conductive material with a low electron affinity is a material deposited in amorphous form. Such a device may find particular application to electron guns or display devices.Type: GrantFiled: March 2, 2000Date of Patent: November 5, 2002Assignee: Thomson-CSFInventors: Pierre Legagneux, Didier Pribat
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Patent number: 6469313Abstract: A semiconductor optical device and a method for fabricating the same. The semiconductor optical device comprises a substrate, a semiconductor electrode layer of a first conductive type formed on the substrate and having a groove formed to a desired depth therein, a semiconductor layer of the first conductive type formed from side walls of the groove up to a part of the semiconductor electrode layer of the first conductive type on the periphery of the groove, a cladding layer of the first conductive type, an active layer of the first conductive type, a cladding layer of a second condcutive type and a semiconductor electrode layer of the second conductive type sequentially formed on the semiconductor layer of the first conductive type, and electrodes of the first and second conductive types formed respectively on the semiconductor electrode layers of the first and second conductive types.Type: GrantFiled: December 27, 2001Date of Patent: October 22, 2002Assignee: LG Electronics Inc.Inventors: Wook Kim, Tae Kyung Yoo
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Publication number: 20020139968Abstract: A semiconductor light emitting element, includes: a substrate; a first conductive semiconductor layer formed on the substrate; a strained emission layer formed on the first conductive semiconductor layer; and a second conductive semiconductor layer formed on the strained emission layer, wherein the strained emission layer includes: an element other than a constituent element of the substrate; and a rare earth element.Type: ApplicationFiled: March 29, 2002Publication date: October 3, 2002Inventors: Masafumi Kondo, Mototaka Taneya
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Publication number: 20020134978Abstract: A pixel structure and an edge-emitter field-emission display device having a first substrate or backplate including a cathode disposed thereon and a second substrate or faceplate including an anode disposed thereon, wherein the anode on the second substrate or faceplate has a light emitting film. The cathode may define a first bus of an X-Y bus array and the anode may define a second bus of the X-Y bus array. Alternatively, the first substrate may further include a control gate disposed thereon, wherein the cathode defines a first bus of an X-Y bus array and the control gate defines a second bus of the X-Y bus array.Type: ApplicationFiled: March 20, 2002Publication date: September 26, 2002Inventors: Alexander Kastalsky, Sergey Shokhor, Frank J. DiSanto, Denis A. Krusos, Boris Gorfinkel, Nikolai Abanshin
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Publication number: 20020130314Abstract: A non-volatile memory device having a MONOS (Metal-oxide-nitride-oxide-semiconductor) gate structure and a fabrication method thereof are provided. This device includes a selection transistor and a cell transistor including a cell gate insulation layer formed in a cell array area and a low-voltage MOS transistor having a low-voltage gate insulation layer and a high-voltage MOS transistor having a high-voltage gate insulation layer formed in a peripheral circuit area. The low-voltage gate insulation layer is thinner than the high-voltage gate insulation layer. The low-voltage gate insulation layer can be also thinner than the equivalent thickness of the cell gate insulation layer.Type: ApplicationFiled: March 15, 2002Publication date: September 19, 2002Applicant: Samsung Electronics Co., Ltd.Inventors: Yong-Sik Yim, Jung-Dal Choi, Hong-Suk Kwack, You-Cheol Shin
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Publication number: 20020125490Abstract: A display device includes a backside and a front-side substrates facing each other with a vacuum space therebetween; and a plurality of electron emission sites provided on the backside substrate. Each electron emission sites includes a bottom electrode formed on a surface of the backside substrate proximate to the vacuum space, an insulator layer formed over the bottom electrode, and a top electrode formed on the insulator layer and arranged individually apart from each other and facing the vacuum space. The display device also includes a plurality of bus electrodes for electrically connecting the neighboring top electrodes; and insulating protective films each provided between the bus electrode and the insulator layer and between the bus electrode and the backside substrate.Type: ApplicationFiled: December 28, 2001Publication date: September 12, 2002Applicant: PIONEER CORPORATIONInventors: Takashi Chuman, Takamasa Yoshikawa, Takuya Hata, Kazuto Sakemura, Takashi Yamada, Nobuyasu Negishi, Shingo Iwasaki, Hideo Satoh, Atsushi Yoshizawa, Kiyohide Ogasawara
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Patent number: 6441542Abstract: In one aspect, a cathode emitter device comprises an infrared receptor having an n-type doped semiconductive region overlying a p-type doped semiconductive region. The n-type and p-type doped regions of the receptor join at a junction diode. The cathode emitter device further comprises an array of cathode emitter tips in electrical connection with the n-type region of the infrared receptor. In other aspects, the invention encompasses field emission display devices, such as, for example, devices comprising the above-described cathode emitter device. In yet other aspects, the invention encompasses methods of utilizing cathode emitter devices, such as, for example, methods of utilizing the above-described cathode emitter device.Type: GrantFiled: July 21, 1999Date of Patent: August 27, 2002Assignee: Micron Technology, Inc.Inventors: Glen Hush, Dean Wilkinson, Zhong-Yi Xia
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Patent number: 6441390Abstract: Disclosed is an electron discharging apparatus capable of fully accelerating electrons emitted from an electron discharging portion consisting of a pn-junction by effect of securing a greater exposure area of an accelerating electrode against said electron discharging portion. The inventive electron discharging apparatus comprises; a pn-junction formed on a surface side of a semiconductor substrate; an insulating film formed on the semiconductor substrate; a first aperture portion formed through a first insulating film formed on the pn-junction; and an accelerating electrode which is formed on the first insulating film by way of surrounding periphery of the first aperture portion. The accelerating electrode is formed so that inner edge portion of the accelerating electrode is projected into the first aperture portion area.Type: GrantFiled: January 4, 2001Date of Patent: August 27, 2002Assignee: Sony CorporationInventors: Junichi Sato, Nobuyuki Saotome
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Patent number: 6437360Abstract: Disclosed are flat/vertical type vacuum field transistor (VFT) structures, which adopt a MOSFET-like flat or vertical structure so as to increase the degree of integration and can be operated at low operation voltages at high speeds. The flat type comprises a source and a drain, made of conductors, which stand at a predetermined distance apart on a thin channel insulator with a vacuum channel therebetween; a gate, made of a conductor, which is formed with a width below the source and the drain, the channel insulator functioning to insulate the gate from the source and the drain; and an insulating body, which serves as a base for propping up the channel insulator and the gate.Type: GrantFiled: November 9, 2000Date of Patent: August 20, 2002Assignee: Korea Advanced Institute of Science and TechnologyInventors: Gyu Hyeong Cho, Ji Yeoul Ryoo, Myeoung Wun Hwang, Min Hyung Cho, Young Jin Woo, Young Ki Kim
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Publication number: 20020109133Abstract: A semiconductor chip in which a through hole penetrating through its surface and reverse surface is formed in a scribe line region in the vicinity of an active region where a functional device is formed, and a conductive member is arranged in the through portion. The through portion may be a groove opening sideward on a sidewall surface of the semiconductor chip. The through portion may be a through hole blocked from a side part of the semiconductor chip. The semiconductor chip may further include wiring for electrically connecting an internal circuit formed in the active region and the conductive member to each other.Type: ApplicationFiled: April 11, 2002Publication date: August 15, 2002Inventors: Junichi Hikita, Kazutaka Shibata, Shigeyuki Ueda
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Patent number: 6429451Abstract: An organic light-emitting device capable of reducing ambient-light reflection from a cathode includes a light-transmissive substrate, a light-transmissive anode, an organic hole-transporting layer, and an organic electron transporting layer. A reflection-reducing structure disposed between the electron-transporting layer and a light-reflective cathode is capable of providing electron injection into the electron-transporting layer and of substantially reducing reflection of ambient-light entering the device.Type: GrantFiled: May 24, 2000Date of Patent: August 6, 2002Assignee: Eastman Kodak CompanyInventors: Liang-Sun Hung, Joseph K. Madathil
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Publication number: 20020100904Abstract: A dual work function semiconductor structure with borderless contact and method of fabricating the same are presented. The structure may include a field effect transistor (FET) having a substantially cap-free gate and a conductive contact to a diffusion adjacent to the cap-free gate, wherein the conductive contact is borderless to the gate. Because the structure is a dual work function structure, the conductive contact is allowed to extend over the cap-free gate without being electrically connected thereto.Type: ApplicationFiled: January 30, 2001Publication date: August 1, 2002Applicant: International Business Machines CorporationInventors: Qiuyi Ye, William R. Tonti, Yujun Li
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Publication number: 20020093012Abstract: (a) At first a semiconductor substrate (11) having a lacunose layer (12) disposed at a equal depth (h) from the surface of a semiconductor layer (1) is formed; (b) then electric components (2), for example, transistors, or lines (3) for an electric circuit are formed on the semiconductor layer (1) at the surface side with respect to the lacunose layer (12); (c) then the semiconductor substrate is separated at the lacunose layer; (d) and an insulating layer (5) is formed on the surface exposed by the separation. The ultrathin semiconductor device has a thickness lower than 20 micro meters. As a result, a thin semiconductor device, having an SOI structure, for example can be fabricated, without the electric components and the insulating layer being influenced by charging up, which may appear during the manufacturing process. And it is also possible to realize a three dimensional semiconductor device.Type: ApplicationFiled: March 18, 2002Publication date: July 18, 2002Applicant: Rohm Co., Ltd.Inventor: Noriyuki Shimoji
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Patent number: 6420197Abstract: A semiconductor device comprises a substrate having a first thermal expansion coefficient T1, a strain reducing layer formed on the substrate and having a second thermal expansion coefficient T2, and a semiconductor layer formed on the strain reducing layer, having a third thermal expansion coefficient T3, and made of a nitride compound represented by AlyGa1−y−zInzN (0≦y≦1, 0≦z ≦1). The second thermal expansion coefficient T2 is lower than the first thermal expansion coefficient T1. The third thermal expansion coefficient T3 is lower than the first thermal expansion coefficient T1 and higher than the second thermal expansion coefficient T2.Type: GrantFiled: February 23, 2000Date of Patent: July 16, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiro Ishida, Masaaki Yuri, Osamu Imafuji, Shinji Nakamura, Kenji Orita
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Patent number: 6420726Abstract: A triode field emission device using a field emission material and a driving method thereof are provided. In this device, gate electrodes serving to take electrons out of a field emission material on cathodes are installed on a substrate below the cathodes, so that the manufacture of the device is easy. Also, electrons emitted from the field emission material are controlled by controlling gate voltage.Type: GrantFiled: December 28, 2000Date of Patent: July 16, 2002Assignee: Samsung SDI Co., Ltd.Inventors: Yong-soo Choi, Jun-hee Choi, Nae-sung Lee, Jong-min Kim
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Semiconductor display device correcting system and correcting method of semiconductor display device
Publication number: 20020079484Abstract: A semiconductor display device correcting system includes a control circuit for carrying out gamma correction of a picture signal supplied from the outside and a nonvolatile memory for storing data for gamma correction. The data for gamma correction is prepared for each semiconductor display device, so that excellent gradation display can be made.Type: ApplicationFiled: December 28, 2001Publication date: June 27, 2002Inventors: Shunpei Yamazaki, Jun Koyama -
Patent number: 6400070Abstract: An electron emission device exhibits a high electron emission efficiency. The device includes an electron-supply layer of metal or semiconductor, an insulator layer formed on the electron-supply layer, and a thin-film metal electrode formed on the insulator layer. The insulator layer has a film thickness of 50 nm or greater. The electron-supply layer is made of a silicon wafer. When an electric field is applied between the electron-supply layer and the thin-film metal electrode, the electron emission device emits electrons.Type: GrantFiled: August 7, 1998Date of Patent: June 4, 2002Assignee: Pioneer Electronic CorporationInventors: Takashi Yamada, Kiyohide Ogasawara, Takamasa Yoshikawa, Takashi Chuman, Nobuyasu Negishi, Shingo Iwasaki, Hiroshi Ito, Atsushi Yoshizawa, Shuuichi Yanagisawa, Kazuto Sakemura
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Patent number: 6365949Abstract: Substrate (7; 7′; 10) and devices including such a substrate, the substrate having a first surface and a second surface extending substantially in parallel to the first surface, the substrate being of a material of a first conductivity and provided with a plurality of electrically conducting channels (21) which are extending exclusively in a direction perpendicular to the first and second surfaces, said channels having a second conductivity substantially larger than the first conductivity, the substrate being provided with at least one electrode (42) on either one of the first and second surfaces, contacting at least one of said channels, the at least one electrode (42) having a predetermined minimum dimension (D) in a contact area (A) with the substrate, and mutual distances between adjacent ones of the plurality of channels (21) being smaller than said minimum dimension of said at least one electrode (42).Type: GrantFiled: September 23, 1998Date of Patent: April 2, 2002Assignee: Zetfolie B.V.Inventors: Jacobus Christiaan Gerardus Maria Ruiter, Erik Maarten Terlouw, Georges Hadziioannou, Hendrik-Jan Brouwer
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Patent number: 6365427Abstract: The present invention relates to a semiconductor laser device and a method for fabrication thereof, wherein the semiconductor laser device exhibits an improved mode selectivity.Type: GrantFiled: February 9, 2000Date of Patent: April 2, 2002Assignee: Avalon Photonics Ltd.Inventors: Hans Peter Gauggel, Karl Heinz Gulden
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Patent number: 6344670Abstract: The solid-state image sensor comprises a semiconductor substrate, a plurality of photoelectric conversion sections formed within respective isolated active regions on the semiconductor substrate, an image area wherein unit cells comprising the plurality of photoelectric conversion sections and a signal scanning circuit are arranged in a two-dimensional array form, and signal lines for reading signals from the respective unit cells within the image pick-up area, wherein the respective photoelectric conversion sections being formed by at least two ion implantations.Type: GrantFiled: January 8, 2001Date of Patent: February 5, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuya Yamaguchi, Hisanori Ihara, Hirofumi Yamashita, Hidetoshi Nozaki, Ikuko Inoue
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Cold cathode electron emission device for activating electron emission using external electric field
Patent number: 6340859Abstract: A cold cathode electron emission device activating electron emission applying an external electric field is provided, in which an inversion layer inverting the type of a semiconductor layer by an external electric field is generated to form a shallow channel, and an electron beam due to a number of electrons is emitted by an avalanche breakdown in the shallow channel. A single or plurality of active regions are formed in the upper portion of the semiconductor substrate in fabrication and then an inversion layer is formed by the external electric field. The cold cathode electron emission device is driven according to the principle that a number of electrons are emitted by the avalanche breakdown in the inversion layer. Thus, since the high-density electrons are instantaneously emitted at the inversion layer by the external electric field, a preheating is not required.Type: GrantFiled: February 11, 1999Date of Patent: January 22, 2002Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Yong Lee, Byoung Lyong Choi -
Publication number: 20020006678Abstract: A built-in electrode type susceptor having excellent corrosion resistance and plasma resistance is obtained.Type: ApplicationFiled: April 3, 2001Publication date: January 17, 2002Inventors: Hiroshi Inazumachi, Takeshi Ootsuka, Takeshi Kawase
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Patent number: 6339030Abstract: A method for forming a periodic dielectric structure exhibiting photonic band gap effects includes forming a slurry of a nano-crystalline ceramic dielectric or semiconductor material and monodisperse polymer microspheres, depositing a film of the slurry on a substrate, drying the film, and calcining the film to remove the polymer microspheres therefrom. The film may be cold-pressed after drying and prior to calcining. The ceramic dielectric or semiconductor material may be titania, and the polymer microspheres may be polystyrene microspheres.Type: GrantFiled: January 5, 2000Date of Patent: January 15, 2002Assignee: The United States of America as represented by the United States Department of EnergyInventors: Kristen Constant, Ganapathi S. Subramania, Rana Biswas, Kai-Ming Ho
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Patent number: 6333598Abstract: A field emitter cell includes a thin-film-edge emitter normal to the gate layer. The field emitter cell may include a conductive substrate layer, an insulator layer having a perforation, a gate layer having a perforation, an emitter layer, and other optional layers. The perforation in the gate layer is larger and concentrically offset with respect to the perforation in the insulating layer and may be of a tapered construction. Alternatively, the perforation in the gate layer may be coincident with, or larger or smaller than, the perforation in the insulating layer, provided that the gate layer is shielded from the emitter from a direct line-of-sight by a nonconducting standoff layer. Optionally, the thin-film-edge emitter may include incorporated nanofilaments. The field emitter cell has low gate current, making it useful for various applications such as field emitter displays, high voltage power switching, microwave, RF amplification and other applications that require high emission currents.Type: GrantFiled: January 7, 2000Date of Patent: December 25, 2001Assignee: The United States of America as represented by the Secretary of the NavyInventors: David S. Y. Hsu, Henry F. Gray
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Patent number: 6329214Abstract: A method of manufacturing a field emission device. The method having the steps of preparing a field emitter array having a plurality of electron emitting elements made of conductive material capable of emitting electrons upon application of an electric field, and impinging particle beams upon the plurality of electron emitting elements at the same time to mill a tip of each electron emitting element and form a sharp tip.Type: GrantFiled: September 3, 1998Date of Patent: December 11, 2001Assignee: Yamaha CorporationInventors: Atsuo Hattori, Kenichi Miyazawa
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Patent number: 6329658Abstract: A system for processing signals from a radiation detector with semiconductors. A plurality of elementary detectors are placed side-by-side along a detection surface or a detection volume in which radiation referred to as incident radiation is capable of giving up its energy in at least one interaction. The device includes the supplying in response to each incident ray, an amount of energy corresponding to the sum of the energies given up during each interaction induced by the incident radiation. This device may be used in medical imaging.Type: GrantFiled: September 23, 1999Date of Patent: December 11, 2001Assignee: Commissariat A l'Energie AtomiqueInventors: Corinne Mestais, Alain Chapuis, Olivier Monnet, François Lebrun
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Patent number: 6326221Abstract: The present invention provides methods for manufacturing field emitter arrays on a silicon-on-insulator (SOI) wafer, one of which comprising steps of forming a doped silicon layer by doping a dopant on a single crystalline silicon layer of an SOI wafer; making a buffer oxide layer on the doped silicon layer; making a stripe pattern of silicon nitride on the buffer oxide layer; etching the buffer oxide layer using the stripe pattern as a mask; etching the doped silicon layer anisotropically using the stripe pattern as a mask; making a minute mask pattern of silicon nitride on the buffer oxide layer by patterning the stripe pattern of silicon nitride; selectively oxidizing the upper part of the doped silicon layer to form an oxide layer except on the portions under the mask pattern; etching away the mask pattern of silicon nitride and the buffer oxide layer deposited under the mask pattern; etching away the exposed doped silicon layer for making gate holes of undercut shape; forming metal layers on the SOI wafeType: GrantFiled: September 3, 1998Date of Patent: December 4, 2001Assignees: Korean Information & Communication Co., Ltd.Inventors: Jong Duk Lee, Cheon Kyu Lee, Hyung Soo Uh
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Patent number: 6291833Abstract: A method and apparatus for detecting scratches on a wafer surface. The method comprises the use of a monitor wafer which has a substrate, a first layer deposited on the substrate, and a second layer deposited on the first layer. The first and second layers have contrasting work functions such that when short wavelength light is directed on the monitor wafer, scratches through the second layer can be detected.Type: GrantFiled: December 15, 1999Date of Patent: September 18, 2001Assignee: International Business Machines CorporationInventors: William Francis Landers, Jyothi Singh
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Publication number: 20010017369Abstract: An electron-emitting device includes an electron source layer made of a metal, a metal alloy or a semiconductor, an insulating layer formed on the electron source layer and a metal thin film electrode formed on the insulating layer. Electrons are emitted upon application of an electric field between the electron source layer and the metal thin film electrode. The insulating layer has at least one island region which constitutes an electron-emitting section in which the film thickness of the insulating layer is gradually reduced. The electron-emitting device further includes a carbon region made of carbon or a carbon compound on at least one of a top, bottom and inside of the island region.Type: ApplicationFiled: January 4, 2001Publication date: August 30, 2001Inventors: Shingo Iwasaki, Takashi Yamada, Takuya Hata, Takashi Chuman, Nobuyasu Negishi, Kazuto Sakemura, Atsushi Yoshizawa, Hideo Satoh, Takamasa Yoshikawa, Kiyohide Ogasawara
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Patent number: 6281514Abstract: A method for promoting the passage of elementary particles at or through a potential barrier comprising providing a potential barrier having a geometrical shape for causing de Broglie interference between said elementary particles is disclosed. In another embodiment, the invention provides an elementary particle-emitting surface having a series of indents. The depth of the indents is chosen so that the probability wave of the elementary particle reflected from the bottom of the indent interferes destructively with the probability wave of the elementary particle reflected from the surface. This results in the increase of tunneling through the potential barrier. When the elementary particle is an electron, then electrons tunnel through the potential barrier, thereby leading to a reduction in the effective work function of the surface.Type: GrantFiled: February 9, 1998Date of Patent: August 28, 2001Assignee: Borealis Technical LimitedInventor: Avto Tavkhelidze
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Publication number: 20010013603Abstract: The image forming apparatus comprises an electron source having a substrate on which a plurality of electron emitting devices are arranged, a face plate provided with striped fluorescent substances for emitting light of different colors and serving to form a color image upon irradiation of electrons by the electron source. Rectangular spacers are arrange between the substrate and the face plate and are fixed to the substrate and contacted to the face plate, and further a longitudinal direction of the spacers crosses a longitudinal direction of the striped fluorescent substances at a substantially right angle.Type: ApplicationFiled: March 26, 1998Publication date: August 16, 2001Inventors: HIDEAKI MITSUTAKE, MASAHIRO FUSHIMI
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Patent number: 6274881Abstract: In an electron emission element having an emitter section for emitting electrons, the emitter section includes, on a first conductive electrode, a structure in which at least a first semiconductor layer, a second semiconductor layer, an insulating layer and a second conductive electrode are deposited sequentially; and the first and second semiconductor layers include at least one of carbon, silicon and germanium as a main component, and the first semiconductor layer includes at least one type of atoms among carbon atom, oxygen atoms and nitrogen atoms which is different from the main component.Type: GrantFiled: June 17, 1999Date of Patent: August 14, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koji Akiyama, Hideo Kurokawa
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Patent number: 6265823Abstract: The light emitter is fabricated from a silicon substrate (2) that has a layer of porous silicon (3) on its upper surface. A hole transporter (4) is applied to the upper surface of the porous silicon (2) and penetrates the channels (3′) formed within the porous silicon. An upper semitransparent p-type material such as NiO is used as the upper contact (5) to the hole transporter and a further contact is formed on the base of the silicon wafer (2). The penetration of the hole transporter into the interstices between the silicon particles significantly improves the efficiency of the light emitter by up to two orders of magnitude. The light emitter is particularly suited to use in VLSI and display applications.Type: GrantFiled: July 14, 1998Date of Patent: July 24, 2001Assignee: Isis Innovation LimitedInventors: Peter James Dobson, Gareth Wakefield
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Publication number: 20010006232Abstract: A triode field emission device using a field emission material and a driving method thereof are provided. In this device, gate electrodes serving to take electrons out of a field emission material on cathodes are installed on a substrate below the cathodes, so that the manufacture of the device is easy. Also, electrons emitted from the field emission material are controlled by controlling gate voltage.Type: ApplicationFiled: December 28, 2000Publication date: July 5, 2001Inventors: Yong-soo Choi, Jun-hee Choi, Nae-sung Lee, Jong-min Kim
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Publication number: 20010006321Abstract: A field emission device (FED) and a method for fabricating the FED are provided. The FED includes micro-tips with nano-sized surface features. Due to the micro-tips as a collection of a large number of nano-tips, the FED is operable at low gate turn-on voltages with high emission current densities, thereby lowering power consumption.Type: ApplicationFiled: January 5, 2001Publication date: July 5, 2001Inventors: Jun-hee Choi, Seung-nam Cha, Hang-woo Lee
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Patent number: 6255774Abstract: An organic light-emitting device wherein the cathode (4, 5) comprises a first layer (5) of a conducting material and a second layer (4) of a conductive material having a work function of at most 3.7 eV and wherein the second layer is substantially thinner than the first layer, having a thickness of at most 5 nm.Type: GrantFiled: June 18, 1999Date of Patent: July 3, 2001Assignee: Cambridge Display Technology, Ltd.Inventor: Karl Pichler
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Patent number: 6246069Abstract: A thin-film edge field emitter device includes a substrate having a first portion and having a protuberance extending from the first portion, the protuberance defining at least one side-wall, the side-wall constituting a second portion. An emitter layer is disposed on the substrate including the second portion, the emitter layer being selected from the group consisting of semiconductors and conductors and is a thin-film including a portion extending beyond the second portion and defining an exposed emitter edge. A pair of supportive layers is disposed on opposite sides of the emitter layer, the pair of supportive layers each being selected from the group consisting of semiconductors and conductors and each having a higher work function than the emitter layer.Type: GrantFiled: April 20, 1998Date of Patent: June 12, 2001Assignee: The United States of America as represented by the Secretary of the NavyInventors: David S. Hsu, Henry F. Gray
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Patent number: 6208074Abstract: An electroluminescent device including a layer of electroluminescent organic semiconductor material between a first transparent electrode of an n-type semiconductor material selected from nitrides and inorganic oxides, and a second electrode.Type: GrantFiled: October 6, 1998Date of Patent: March 27, 2001Assignee: DPR-EcublensInventors: Marc Ilegems, Michel Schär, Libero Zuppiroli
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Patent number: 6201257Abstract: An energy dispersive x-ray and gamma-ray photon counter is described. The counter uses a photon sensor which incorporates a unique photocathode called Advanced Semiconductor Emitter Technology for X-rays (ASET-X) as its critical element for converting the detected photons to electrons which are emitted into a vacuum. The electrons are multiplied by accelerations and collisions creating a signal larger than the sensor noise and thus allowing the photon to be energy resolved very accurately, to within ionization statistics. Because the signal is already above the sensor noise it does not have to be noise filtered therefore allowing high-speed counting. The photon sensor can also be used as a device to visualize and image gamma-ray and x-ray sources.Type: GrantFiled: July 22, 1998Date of Patent: March 13, 2001Assignee: Advanced Scientific Concepts, Inc.Inventors: Roger Stettner, Howard W. Bailey
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Patent number: 6198210Abstract: A semiconductor cathode (11) in a semiconductor structure, in which the sturdiness of the cathode is increased by covering the emitting surface (4) with a layer of a semiconductor material (7) having a larger bandgap than the semiconductor material of the semiconductor cathode. Various measures for increasing the electron-mission efficiency are indicated.Type: GrantFiled: November 24, 1998Date of Patent: March 6, 2001Assignee: U.S. Philips CorporationInventors: Ron Kroon, Tom Van Zutphen, Erwin A. Hijzen
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Patent number: 6194244Abstract: The solid-state image sensor comprises a semiconductor substrate, a plurality of photoelectric conversion sections formed within respective isolated active regions on the semiconductor substrate, an image area wherein unit cells comprising the plurality of photoelectric conversion sections and a signal scanning circuit are arranged in a two-dimensional array form, and signal lines for reading signals from the respective unit cells within the image pick-up area, wherein the respective photoelectric conversion sections being formed by at least twice ion implantation.Type: GrantFiled: July 2, 1998Date of Patent: February 27, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuya Yamaguchi, Hisanori Ihara, Hirofumi Yamashita, Hidetoshi Nozaki, Ikuko Inoue
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Patent number: 6139759Abstract: A micromechanical sensor probe for a scanned-probe tool comprising a silicon probe and a coating of a refractory metal silicide formed at least on the tip of the probe. Titanium silicide is preferred. A method for manufacturing such a probe includes the steps of, first, providing a silicon cantilever and tip combination and, second, forming a refractory metal silicide on at least the tip of the cantilever and tip combination. This second step of the method includes removing any remnant oxide from the tip, stabilizing the cantilever and tip combination on a carrier, depositing a refractory metal on the silicon tip, heating the cantilever and tip combination in an ambient free of oxygen to react chemically the refractory metal on and the silicon of the tip, selectively etching any unreacted refractory metal from the tip, and annealing the cantilever and tip combination in an ambient free of oxygen. The method may also include, as a final step, removing any unreacted refractory metal from the tip.Type: GrantFiled: February 23, 1999Date of Patent: October 31, 2000Assignee: International Business Machines CorporationInventors: Lambert A. Doezema, Philip V. Kaszuba, Leon Moszkowicz, James M. Never, James A. Slinkman
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Patent number: 6140664Abstract: To prevent breakdown of an insulating layer located underneath a gate electrode, the gate electrode is connected to an external terminal via a high-ohmic resistor. The high-ohmic resistor may form part of a resistive network for biasing voltages for a plurality of gate electrodes. The resistive network may be realised partly on the insulating layer.Type: GrantFiled: March 21, 1995Date of Patent: October 31, 2000Assignee: U.S. Philips CorporationInventors: Evert Seevinck, Tjerk G. Spanjer
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Patent number: 6096570Abstract: A method of manufacturing a field emission element includes the steps of: forming a surface insulating layer including a conductive gate film on a substrate; forming a hole in the surface insulating layer by partially removing the surface insulating layer; forming a side spacer on an inner wall of the hole and forming a gate hole in the conductive gate film, the side spacer serving as a first sacrificial film; forming a second sacrificial film on surfaces of the surface insulating layer and the side space and on a bottom surface of the gate hole, to a thickness so as to form a flat upper surface area of the second sacrificial film above the gate hole; forming a conductive first emitter film on a whole surface of the second sacrificial film; forming a conductive second emitter film by disposing a conductive ultra-fine particle group on the first emitter film and baking the ultra-fine particle group; and exposing a tip portion of the second emitter film on a side of the flat upper surface area of the first emitType: GrantFiled: June 18, 1999Date of Patent: August 1, 2000Assignee: Yamaha CorporationInventor: Atsuo Hattori
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Patent number: 6084245Abstract: A field emitter cell includes a thin film edge emitter normal to a gate layer. The field emitter is a multilayer structure including a low work function material sandwiched between two protective layers. The field emitter may be fabricated from a composite starting structure including a conductive substrate layer, an insulation layer, a standoff layer and a gate layer, with a perforation extending from the gate layer into the substrate layer. The emitter material is conformally deposited by chemical beam deposition along the sidewalls of the perforation. Alternatively, the starting material may be a conductive substrate having a protrusion thereon. The emitter layer, standoff layer, insulation layer, and gate layer are sequentially deposited, and the unwanted portions of each are preferentially removed to provide the desired structure.Type: GrantFiled: March 23, 1998Date of Patent: July 4, 2000Assignee: The United States of America as represented by the Secretary of the NavyInventors: David S. Y. Hsu, Henry F. Gray