Low Workfunction Layer For Electron Emission (e.g., Photocathode Electron Emissive Layer) Patents (Class 257/10)
  • Patent number: 7521854
    Abstract: Light-emitting devices, and related components, systems and methods are disclosed. A light-emitting device can include a multi-layer stack of materials including a light-generating region and a first layer supported by the light-generating region. During use of the light-emitting device, light generated by the light-generating region can emerge from the light-emitting device via a surface of the first layer. The light-emitting device can have an edge which is at least about one millimeter long and can be designed so that an extraction efficiency of the light-emitting device is substantially independent of the length of the edge. The surface of the first layer may have a dielectric function that varies spatially according to a pattern. The pattern may be nonperiodic.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: April 21, 2009
    Assignee: Luminus Devices, Inc.
    Inventor: Alexei A. Erchak
  • Patent number: 7517710
    Abstract: A method of manufacturing a field emission device (FED), which reduces the number of photomask patterning processes and improves the manufacturing yield of the FED, is provided.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: April 14, 2009
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Jun-Hee Choi, Ho-Suk Kang, Chan-Wook Baik, Ha-Jong Kim
  • Patent number: 7507987
    Abstract: A method for making packets of nanostructures is presented. The method includes etching trenches in a silicon substrate. Nanostructures are grown in the trenches. The trenches are then filled with a filler material. Any filler and/or nanostructures material extending beyond the trench is removed. The silicon substrate is etched away, resulting in a nanopellet surrounding the nanostructures and wherein each nanostructures has a generally uniform length and direction. Nanostructures can comprise nanotubes, nanowires and nanofibers. The method eases the manipulation of nanostructures while providing geometrical uniformity.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: March 24, 2009
    Assignee: Massachusetts Institute of Technology
    Inventors: Sang-Gook Kim, Tarek A. El Aguizy, Jeung-hyun Jeong, Yongbae Jeon
  • Patent number: 7492988
    Abstract: Planar AWG circuits and systems are disclosed that use air trench bends to increase planar circuit compactness.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: February 17, 2009
    Inventors: Gregory P. Nordin, Yongbin Lin, Seunghyun Kim
  • Publication number: 20090032797
    Abstract: When to-be-detected light is made incident from a support substrate 2 side of a photocathode E1, a light absorbing layer 3 absorbs this to-be-detected light and produces photoelectrons. However, depending on the thickness and the like of the light absorbing layer 3, the to-be-detected light can be transmitted through the light absorbing layer 3 without being sufficiently absorbed by the light absorbing layer 3. The to-be-detected light transmitted through the light absorbing layer 3 reaches an electron emitting layer 4. A part of the to-be-detected light that has reached the electron emitting layer 4 proceeds toward a through-hole 5a of a contact layer 5. Since the length d1 of a diagonal line of the through-hole 5a is shorter than the wavelength of the to-be-detected light, the to-be-detected light can be suppressed from passing through the through-hole 5a and being emitted to the exterior.
    Type: Application
    Filed: July 23, 2008
    Publication date: February 5, 2009
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Toru Hirohata, Minoru Niigaki
  • Patent number: 7470926
    Abstract: A solid-state optical device having: a solid-state element; a power supplying/retrieving portion that supplies or retrieves electric power to/from the solid-state element; and a glass sealing material that seals the solid-state element. The glass sealing material is made of a P2O5—ZnO-based low-melting glass that has 45 to 50 wt % of P2O5 and 15 to 35 wt % of ZnO.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: December 30, 2008
    Assignees: Toyoda Gosei Co., Ltd, Sumita Optical Glass, Inc.
    Inventors: Yoshinobu Suehiro, Seiji Yamaguchi, Naruhito Sawanobori, Masaaki Ohtsuka, Hiroki Watanabe, Kazuya Aida
  • Publication number: 20080315775
    Abstract: An electron emission device having a high electron emitting rate and a display including the device are prodivided. The electron emission device using abrupt metal-insulator transition, the device including: a board; a metal-insulator transition (MIT) material layer disposed on the board and divided by a predetermined gap with portions of the divided MIT material layer facing one another; and electrodes connected to each of the portions of the divided metal-insulator transition material layer for emitting electrons to the gap between the portions of the divided metal-insulator transition material layer.
    Type: Application
    Filed: August 25, 2006
    Publication date: December 25, 2008
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun Tak Kim, Byung Gyu Chae, Kwang Yong Kang, Yoon Ho Song
  • Patent number: 7459845
    Abstract: Light-emitting devices, and related components, systems and methods are disclosed. A light-emitting device can include a multi-layer stack of materials including a light-generating region and a first layer supported by the light-generating region. During use of the light-emitting device, light generated by the light-generating region can emerge from the light-emitting device via a surface of the first layer. The light-emitting device can have an edge which is at least about one millimeter long and can be designed so that a wall plug efficiency of the light-emitting device is substantially independent of the length of the edge.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: December 2, 2008
    Assignee: Luminus Devices, Inc.
    Inventor: Alexei A. Erchak
  • Patent number: 7446842
    Abstract: A liquid crystal display (LCD) panel including a liquid crystal panel, a first driving circuit, connected to the liquid crystal panel by a plurality of data lines, a second driving circuit, connected to the liquid crystal panel by a plurality of gate lines, an electrode pad unit applying a signal voltage aligning the liquid crystal filled in the liquid crystal panel, a first switching circuit, performing a switching operation to apply a part of the liquid crystal alignment signal voltage applied via the electrode pad unit to the liquid crystal panel via the data lines, a second switching circuit, performing a switching operation to apply a remaining part of the liquid crystal alignment signal voltage to the liquid crystal panel via the gate lines, and first and second buffer circuits, which prevent the liquid crystal alignment signal voltage from being applied backward to the first and second driving circuits.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: November 4, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ju-hyun Lee
  • Patent number: 7442961
    Abstract: The present invention provides an image display device, by which it is possible to prevent dielectric breakdown between a bottom electrode and a top electrode (top electrode bus line), which make up thin-film type electron sources, and which is free of display defect and has longer service life. On a cathode substrate 10, a bottom electrode 11, a tunneling insulator 12, and a top electrode 13 are prepared. On a lower layer of the top electrode 13, a top electrode bus line 16 is formed, and the top electrode 13 is reliably connected to the top electrode bus line 16 via a contact electrode 15. A field insulator 12A, a lower layer 14a of the interlayer insulator deposited by sputtering and an upper layer 14b of the interlayer insulator are laminated between the top electrode 13 and the contact electrode and the bottom electrode 11, and the bottom electrode 11 is insulated from the top electrode 13 (top electrode bus line 16).
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: October 28, 2008
    Assignee: Hitachi Displays, Ltd.
    Inventors: Masakazu Sagawa, Toshiaki Kusunoki, Kazutaka Tsuji, Mutsumi Suzuki
  • Patent number: 7432521
    Abstract: A logical operation element and logical operation circuit are provided that are capable of high speed and a high degree of integration. A logical operation circuit has a construction wherein, in a logical operation element, the anodes of first and second field emission type microfabricated electron emitters are put at the same potential and two or more signal voltages are input to gate electrodes corresponding to these emitters. A NOR element so arranged that when a high potential input signal is input to either of the two lines, electron emission occurs from the emitters and the potential of said anodes is lowered, and a NAND element wherein the cathodes of the first and second field emission type microfabricated electron emitters are connected in series, two signal voltages are applied to the gate electrodes corresponding to the first and second emitter and the anode potential of the second emitter is lowered when the two input signals are high potential are employed.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: October 7, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Natsuo Tatsumi, Yoshiki Nishibayashi, Takahiro Imai, Tsuneo Nakahara
  • Patent number: 7432533
    Abstract: An encapsulation for a device is disclosed. Spacer particles are randomly located in the device region to prevent a cap mounted on the substrate from contacting the active components, thereby protecting them from damage. The spacer particles comprise a base and an upper portion, the base being at least equal to or wider than the upper portion, for preventing the generation of dark spots around the spacer particles.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: October 7, 2008
    Assignees: Osram GmbH, Agency for Science, Technology and Research
    Inventors: Mark Auch, Ewald Guenther, Soo Jin Chua
  • Patent number: 7420261
    Abstract: The invention relates to a substrate for epitaxy, especially for preparation of nitride semiconductor layers. Invention covers a bulk nitride mono-crystal characterized in that it is a mono-crystal of gallium nitride and its cross-section in a plane perpendicular to c-axis of hexagonal lattice of gallium nitride has a surface area greater than 100 mm2, it is more than 1,0 ?m thick and its C-plane surface dislocation density is less than 106/cm2, while its volume is sufficient to produce at least one further-processable non-polar A-plane or M-plane plate having a surface area at least 100 mm2. More generally, the present invention covers a bulk nitride mono-crystal which is characterized in that it is a mono-crystal of gallium-containing nitride and its cross-section in a plane perpendicular to c-axis of hexagonal lattice of gallium-containing nitride has a surface area greater than 100 mm2, it is more 1,0-?m thick and its surface dislocation density is less than 106/cm2.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: September 2, 2008
    Assignees: AMMONO Sp. z o.o., Nichia Corporation
    Inventors: Robert Dwiliński, Roman Doradziński, Jerzy Garczynski, Leszek P. Sierzputowski, Yasuo Kanbara
  • Patent number: 7417367
    Abstract: Light-emitting devices, and related components, systems and methods are disclosed. A light-emitting device can include a multi-layer stack of materials that includes a light-generating region and a first layer supported by the light-generating region. During use of the light-emitting device, light generated by the light-generating region can emerge from the light-emitting device via a surface of the first layer. The surface of the first layer can have a dielectric function that varies spatially as a pattern and at least about 45% of a total amount of light generated by the light-generating region can emerge from the light-emitting device emerges via the surface of the light-emitting device.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: August 26, 2008
    Assignee: Luminus Devices, Inc.
    Inventor: Alexei A. Erchak
  • Patent number: 7417227
    Abstract: The conventional detection technique has the following problems in detecting interference fringes: (1) Setting and adjustment are complex and difficult to conduct; (2) A phase image and an amplitude image cannot be displayed simultaneously; and (3) Detection efficiency of electron beams is low. The invention provides a scanning interference electron microscope which is improved in detection efficiency of electron beam interference fringes, and enables the user to observe electric and magnetic information easily in a micro domain of a specimen as a scan image of a high S/N ratio under optimum conditions.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: August 26, 2008
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Takao Matsumoto, Masanari Koguchi
  • Publication number: 20080191189
    Abstract: The Nanotube Array Ballistic Transistors are disclosed, wherein the ballistic (without collisions) electron propagation along the nanotubes, grown normally to the substrate plane on the common metal electrode, is used for a new class of hybrid (solid state/vacuum) electronic devices. In the disclosed transistors, the array of nanotubes emits electrons into vacuum when electrons gain sufficient energy inside the nanotubes due to ballistic electron movement under the voltage applied to the nanotube ends. In the disclosed devices, planar layer deposition technology is used to form multilayer structures and attach two electrodes to the nanotubes ends. The ballistic transistor can also be used for making a new type of electron-emission display when a phosphor layer is deposited on the anode electrode.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 14, 2008
    Inventor: Alexander Kastalsky
  • Patent number: 7399987
    Abstract: A planar electron emitter, based on the existence of quasi-ballistic transport of electrons is disclosed.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: July 15, 2008
    Inventors: Petr Viscor, Niels Ole Nielsen, Armin Delong, Vladimir Kolarik
  • Patent number: 7394091
    Abstract: There is provided composite nano-particles comprising nano-crystal particles dispersed stably and individually in suspension in high concentration without mutual aggregation of the nano-particles. A determined amount of pure water or deionized water is poured into a reactor, into which is introduced nitrogen gas at rate of 300 cm3/min for a given time while agitating with a stirrer to remove dissolved oxygen in the pure water, allowing to stand in an atmosphere of nitrogen. Next, the inside of the reactor is maintained in an atmosphere of nitrogen and sodium citrate as a dispersion-stabilizing agent, an aqueous solution of MPS as a surface-modifying agent, an anion aqueous solution for co-precipitation as a nano-crystal and a cation aqueous solution are added, in that order. Then, an aqueous solution of sodium silicate is added to the reactor, which is then allowed to stand in the dark place in an atmosphere of nitrogen after agitation.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: July 1, 2008
    Assignee: Keio University Faculty of Science and Technology
    Inventors: Tetsuhiko Isobe, Yasushi Hattori, Shigeo Itoh, Hisamitsu Takahashi
  • Publication number: 20080116446
    Abstract: An electron emitting device 2 comprises an electron emitting portion 6 made of diamond. At an electron emission current value of 10 ?A or more, a deviation of the electron emission current value over one hour is within ±20% in the electron emitting device 2. The number of occurrence of step-like noise changing the electron emission current value stepwise is once or less per 10 minutes.
    Type: Application
    Filed: September 21, 2006
    Publication date: May 22, 2008
    Inventors: Yoshiyuki Yamamoto, Natsuo Tatsumi, Yoshiki Nishibayashi, Takahiro Imai
  • Patent number: 7375366
    Abstract: A carbon nanotube has a carbon network film of polycrystalline structure divided into crystal regions along the axis of the tube, and the length along the tube axis of each crystal region preferably ranges from 3 to 6 nm. An electron source includes a carbon nanotube having a cylindrical shape and the end of which on the substrate side is closed and disposed in a fine hole. The end on the substrate side of the tube is firmly adhered to the substrate. The carbon nanotube is produced by a method in which carbon is deposited under the condition that no metal catalyst is present in the fine hole and produced by a method in which after the carbon deposition the end of the carbon deposition film is modified by etching the carbon deposition film using a plasma.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: May 20, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Ohki, Tsunaki Tsunesada, Masao Urayama, Takashi Kyotani, Keitarou Matsui, Akira Tomita
  • Patent number: 7375400
    Abstract: An image display device is provided in which the overall brightness of an image can be varied without adversely affecting hue and contrast. The image display device includes emitters 16 connected to a cathode electrode 15, a gate electrode 13, an anode electrode 3, transistors Tr1 and Tr2, and a capacitor 12. A voltage applied to the capacitor 12 is varied to display an image. A constant voltage is applied to the gate electrode 13 to change a time ratio Du. Thus, the overall brightness of an image can be adjusted.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: May 20, 2008
    Assignees: Futaba Corporation, National Institute of Advanced Industrial Science and Technology
    Inventors: Shigeo Itoh, Masateru Taniguchi, Masayoshi Nagao
  • Patent number: 7365356
    Abstract: The invention relates to a photocathode having a structure that permits a decrease in the radiant sensitivity at low temperatures is suppressed so that the S/N ratio is improved. In the photocathode, a light absorbing layer is formed on the upper layer of a substrate. An electron emitting layer is formed on the upper layer of the light absorbing layer. A contact layer having a striped-shape is formed on the upper layer of the electron emitting layer. A surface electrode composed of metal is formed on the surface of the contact layer. The interval between bars in the contact layer is adjusted so as to become 0.2 ?m or more but 2 ?m or less.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: April 29, 2008
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Toru Hirohata, Minoru Niigaki, Tomoko Mochizuki, Masami Yamada
  • Patent number: 7362048
    Abstract: A light emitting device containing a semiconductor light emitting component and a phosphor, the phosphor is capable of absorbing a part of light emitted by the light emitting component and emitting light of a wavelength different from that of the absorbed light, is provided. A straight line connecting a point of chromaticity corresponding to a spectrum generated by the light emitting component and a point chromaticity corresponding to a spectrum generated by the phosphor is substantially along a black body radiation locus in a chromaticity diagram.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: April 22, 2008
    Assignee: Nichia Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yoshinori Shimizu, Kensho Sakano, Yasunobu Noguchi, Toshio Moriguchi
  • Patent number: 7354781
    Abstract: A method of manufacturing a field emission device (FED) using a photoresist for performing multi-patterning processes, whereby different structures can be multi-patterned using a single photoresist mask. The photoresist has a solubility to a solvent by post-exposure heat-treatment, and a complicated structure can be formed using the photoresist.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: April 8, 2008
    Assignees: Samsung SDI Co., Ltd., E.I. Du Pont De Nemours and Company
    Inventors: Shang-Hyeun Park, Young-Hwan Kim
  • Patent number: 7355268
    Abstract: An optical device having a high reflector tunable stress coating includes a micro-electromechanical system (MEMS) platform, a mirror disposed on the MEMS platform, and a multiple layer coating disposed on the mirror. The multiple layer coating includes a layer of silver (Ag), a layer of silicon dioxide (SiO2) deposited on the layer of Ag, a layer of intrinsic silicon (Si) deposited on the layer of SiO2, and a layer of silicon oxynitride (SiOxNy) deposited on the layer of Si. The concentration of nitrogen is increased and/or decreased to tune the stress (e.g., tensile, none, compressive).
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: April 8, 2008
    Assignee: Intel Corporation
    Inventor: Michael Goldstein
  • Patent number: 7348531
    Abstract: Disclosed is an image pickup device capable of greatly reducing delay in drive signals supplied to field emission devices, and cross-talk and the like that originate in these drive signals. The image pickup device comprises a photoelectric conversion film for receiving incident light on one side thereof; a field emission layer having an electron emitting surface apart from and facing the other side of the photoelectric conversion film, and including a plurality of electron emission devices; and a drive layer formed on a back side of the field emission layer and including a plurality of device drive circuits for supplying drive signals to each of back electrodes of the plurality of electron emission devices.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: March 25, 2008
    Assignee: Pioneer Corporation
    Inventors: Yoshiyuki Okuda, Saburo Aso, Katsumi Yoshizawa, Takamasa Yoshikawa, Hideo Satoh, Nobuyasu Negishi, Kazuto Sakemura
  • Patent number: 7339201
    Abstract: A light emitting diode includes a casing having a concave surface, a reflecting surface formed by depositing a metallic layer on a concave surface thereof, and a lead having a light emitting element fitted thereto so as to confront the reflecting surface. A cationic polymerization type transparent epoxy resin is filled within a cavity of the casing having the concave surface, and the resin is hardened while the resin, the reflecting surface and the casing form a sandwich structure. With this construction, the light emitting diode is provided, in which neither wrinkling nor cracking occur in the reflecting surface. In addition, there is no possibility of the reflecting surface being flawed during the handling and transportation. Also, even in a reflow furnace operation in which a soldering is carried out, thermal deformation including formation of wrinkling and cracking in the reflecting surface can be completely avoided.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: March 4, 2008
    Assignees: Pearl Lamp Works, Ltd., Opto-Device Co., Ltd.
    Inventor: Shigeru Yamazaki
  • Patent number: 7332736
    Abstract: This invention provides novel methods of fabricating novel gated field emission structures that include aligned nanowire electron emitters (individually or in small groups) localized in central regions within gate apertures. It also provides novel devices using nanoscale emitters for microwave amplifiers, electron-beam lithography, field emission displays and x-ray sources. The new emission structures are particularly useful in the new devices.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronic Co., Ltd
    Inventor: Sungho Jin
  • Patent number: 7329552
    Abstract: The present invention includes field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors. According to one embodiment, a field effect transistor includes a semiconductive layer configured to form a channel region; a pair of spaced conductively doped semiconductive regions in electrical connection with the channel region of the semiconductive layer; a gate intermediate the semiconductive regions; and a gate dielectric layer intermediate the semiconductive layer and the gate, the gate dielectric layer being configured to align the gate with the channel region of the semiconductive layer. In one aspect, chemical-mechanical polishing self-aligns the gate with the channel region. According to another aspect, a field emission device includes a transistor configured to control the emission of electrons from an emitter.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: February 12, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Ji Ung Lee, John Lee, Benham Moradi
  • Patent number: 7301271
    Abstract: Light-emitting devices, and related components, systems and methods are disclosed. In some embodiments, the devices (e.g., light-emitting diodes) comprise a multi-layer stack of materials including a light generating region and a first layer supported by the light generating region. The surface of the first layer may have a dielectric function that varies spatially according to a pattern. The pattern may be configured so that light that emerges from the device via the surface of the first layer is more collimated than a Lambertian distribution of light.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: November 27, 2007
    Assignee: Luminus Devices, Inc.
    Inventors: Alexei A. Erchak, Elefterios Lidorikis, Chiyan Luo
  • Publication number: 20070254401
    Abstract: There is provided a method of processing a surface of a group III nitride crystal, that includes the steps of: polishing a surface of a group III nitride crystal with a polishing slurry containing abrasive grains; and thereafter polishing the surface of the group III nitride crystal with a polishing liquid at least once, and each step of polishing with the polishing liquid employs a basic polishing liquid or an acidic polishing liquid as the polishing liquid. The step of polishing with the basic or acidic polishing liquid allows removal of impurity such as abrasive grains remaining on the surface of the group III nitride crystal after it is polished with the slurry containing the abrasive grains.
    Type: Application
    Filed: May 1, 2007
    Publication date: November 1, 2007
    Inventors: Takayuki Nishiura, Keiji Ishibashi
  • Publication number: 20070241320
    Abstract: A thin film electron source comprising a substrate, a lower electrode formed on one main face of said substrate, an insulation layer formed in contact with said lower electrode and an upper electrode formed in contact with said insulation layer. The upper electrode comprises a first under-layer, a second under-layer, an intermediate layer and a surface layer laminated from the insulation layer side. A main material of the first under-layer is IrO2 or RuO2; a main material of the second under-layer is Ir or Ru, and a main material of the surface layer is a member selected from the group consisting of Au and Ag.
    Type: Application
    Filed: April 3, 2007
    Publication date: October 18, 2007
    Inventor: Tomio Iwasaki
  • Publication number: 20070210299
    Abstract: A single-photon generating device is configured to have a solid substrate including abase portion, and a pillar portion which is formed on the surface side of the base portion with a localized level existent in the vicinity of the tip of the base portion. The above pillar portion is formed to have a larger cross section on the base portion side than the cross section on the tip side, so that the light generated from the localized level is reflected on the surface, propagated inside the pillar portion, and output from the back face side of the base portion.
    Type: Application
    Filed: September 18, 2006
    Publication date: September 13, 2007
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Shinichi Hirose, Motomu Takatsu, Tatsuya Usuki, Yasuhiko Arakawa
  • Patent number: 7268361
    Abstract: The invention provides an electron beam device 1 comprising at least one field emission cathode 3 and at least one extracting electrode 5, whereby the field emission cathode 5 comprises a p-type semiconductor region 7 connected to an emitter tip 9 made of a semiconductor material, an n-type semiconductor region 11 forming a pn-diode junction 13 with the p-type semiconductor region 7 a first electric contact 15 on the p-type semiconductor region 7 and a second electric contact 17 on the n-type semiconductor region 11. The p-type semiconductor region 7 prevents the flux of free electrons to the emitter unless electrons are injected into the p-type semiconductor region 7 by the pn-diode junction 13. This way, the field emission cathode 3 can generate an electron beam where the electron beam current is controlled by the forward biasing second voltage V2 across the pn-diode junction. Such electron beam current has an improved current value stability.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: September 11, 2007
    Assignee: ICT, Integrated Circuit Testing Gesellschaft fur Halbleiterpruftechnik mbH
    Inventors: Pavel Adamec, Dieter Winkler
  • Patent number: 7259444
    Abstract: In one embodiment, an optoelectronic device is provided having a pin photo diode including a semi-insulating substrate or layer, with a patterned implant region of a first dopant type. The pin photo diode includes an upper layer having semiconductor material with a second dopant type. An intermediate layer is provided having a substantially intrinsic semiconductor material. An upper layer contact is provided having a portion with a generally circular interior facing edge. The implant region has a first portion having an outer periphery substantially nonoverlapping with the interior facing edge of the upper layer contact. The implant region includes a contact portion located beyond the upper layer contact. A connecting portion couples the first portion and the contact portion of the implant region. In one embodiment, the device includes a heterojunction bipolar transistor coupled to the pin photo diode.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: August 21, 2007
    Assignee: HRL Laboratories, LLC
    Inventors: Mary Y. Chen, Donald A. Hitko
  • Patent number: 7227172
    Abstract: In a Group-III-element nitride semiconductor device including a Group-III-element nitride crystal layer stacked on a Group-III-element nitride crystal substrate, the substrate is produced by allowing nitrogen of nitrogen-containing gas and a Group III element to react with each other to crystallize in a melt (a flux) containing at least one of alkali metal and alkaline-earth metal, and a thin film layer is formed on the substrate and the thin film has a lower diffusion coefficient than that of the substrate with respect to impurities contained in the substrate. The present invention provides a semiconductor device in which alkali metal is prevented from diffusing.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: June 5, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuo Kitaoka, Hisashi Minemoto, Isao Kidoguchi, Kazuyoshi Tsukamoto
  • Patent number: 7220984
    Abstract: The influence of surface geometry on metal properties is studied within the limit of the quantum theory of free electrons. It is shown that a metal surface can be modified with patterned indents to increase the Fermi energy level inside the metal, leading to decrease in electron work function. This effect would exist in any quantum system comprising fermions inside a potential energy box. Also disclosed is a method for making nanostructured surfaces having perpendicular features with sharp edges.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: May 22, 2007
    Assignee: Borealis Technical Limited
    Inventors: Avto Tavkhelidze, Stuart Harbron
  • Patent number: 7214971
    Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: May 8, 2007
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Minoru Niigaki, Kazutoshi Nakajima
  • Patent number: 7202511
    Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: April 10, 2007
    Assignee: DRS Sensors & Targeting Systems, Inc.
    Inventors: Maryn G. Stapelbroek, Henry H. Hogue, Arvind I. D'Souza
  • Patent number: 7195723
    Abstract: A colloidal solution and/or nanocomposite having enhanced energy transfer between thermal, electron, phonons, and photons energy states. The composition comprises a synergistic blend of electrides and alkalides within a medium that effectively alters the mean free path. The composition is optionally further enhanced through externally generated fields and made into energy conversion devices.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: March 27, 2007
    Inventor: Michael H. Gurin
  • Patent number: 7170771
    Abstract: Alloy memory structures and methods are disclosed wherein a layer or volume of alloy material changes conductivity subsequent to introduction of a electron beam current-induced change in phase of the alloy, the conductivity change being detected using current detection means such as photon-emitting P-N junctions, and being associated with a change in data bit memory state.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: January 30, 2007
    Assignee: Intel Corporation
    Inventors: Eric C. Hannah, Michael A. Brown
  • Patent number: 7166830
    Abstract: A substrate 18, a cathode 20 and an anode 22 are stored in a space demarcated by a casing 10, and the space is evacuated. The cathode 20 and the anode 22 are provided on the same surface of a substrate 18 having electric insulation, and have a comb-tooth shape so as to be mutually engaged. Therefore, the area of the part in which the cathode 20 and the anode 22 approach each other becomes larger, and thereby photoelectrons discharged from the cathode 20 through the incidence of ultraviolet rays are transmitted in the vacuum, and are favorably collected in the anode 22.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: January 23, 2007
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Tadashi Kitahara, Yoshiro Nomoto, Norio Ichikawa
  • Patent number: 7141807
    Abstract: A capillary for a mass spectrometry system is described. The capillary comprises a channel and a tip, and at least one of the channel and the tip comprises a nanowire material.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: November 28, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Timothy H. Joyce, Jennifer Qing Lu
  • Patent number: 7132730
    Abstract: The invention relates to a substrate for epitaxy, especially for preparation of nitride semiconductor layers. Invention covers a bulk nitride mono-crystal characterized in that it is a mono-crystal of gallium nitride and its cross-section in a plane perpendicular to c-axis of hexagonal lattice of gallium nitride has a surface area greater than 100 mm2, it is more than 1.0 ?m thick and its C-plane surface dislocation density is less than 106/cm2, while its volume is sufficient to produce at least one further-processable non-polar A-plane or M-plane plate having a surface area at least 100 mm2. More generally, the present invention covers a bulk nitride mono-crystal which is characterized in that it is a mono-crystal of gallium-containing nitride and its cross-section in a plane perpendicular to c-axis of hexagonal lattice of gallium-containing nitride has a surface area greater than 100 mm2, it is more 1.0 ?m thick and its surface dislocation density is less than 106/cm2.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: November 7, 2006
    Assignees: Ammono Sp. z.o.o., Nichia Corporation
    Inventors: Robert Dwiliński, Roman Doradziński, Jerzy Garczyński, Leszek P. Sierzputowski, Yasuo Kanbara
  • Patent number: 7129513
    Abstract: A field emission ion source has nanostructure materials on at least an emitting edge of the anode electrode. Metal is transferred from a metal reservoir to the emitting edge of the anode, where the metal is transferred to an emitting end of the nanostructure materials and is ionized under an applied electric field. Plural ion sources can be combined to form a field emission ion source device. The numbers of emitting sources are selectable through electric or mechanical switches and different ion extraction potentials can be applied. Various nanostructure materials include: single wall carbon nanotubes and bundles, few-walled carbon nanotubes and bundles, multi-walled carbon nanotubes and bundles, and carbon fiber. Nanostructure-containing material is integrated into the anode by electrophoresis, dielectrophoresis, CVD, screen printing, and mechanical methods.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: October 31, 2006
    Assignee: Xintek, Inc.
    Inventors: Otto Z. Zhou, Jianping Lu, Changkun Dong, Bo Gao
  • Patent number: 7129626
    Abstract: A pixel structure and an edge-emitter field-emission display device having a first substrate or backplate including a cathode disposed thereon and a second substrate or faceplate including an anode disposed thereon, wherein the anode on the second substrate or faceplate has a light emitting film. The cathode may define a first bus of an X-Y bus array and the anode may define a second bus of the X-Y bus array. Alternatively, the first substrate may further include a control gate disposed thereon, wherein the cathode defines a first bus of an X-Y bus array and the control gate defines a second bus of the X-Y bus array.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: October 31, 2006
    Assignee: Copytele, Inc.
    Inventors: Alexander Kastalsky, Sergey Shokhor, Frank J. DiSanto, Denis A. Krusos, Boris Gorfinkel, Nikolai Abanshin
  • Patent number: 7119487
    Abstract: A light emitting device which can be easily manufactured and can control the positions of light emission precisely, and an optical device. A first and second light emitting elements are formed on one face of a supporting base. The first light emitting element has an active layer made of GaInN mixed crystal on a GaN-made first substrate on the side thereof on which the supporting base is disposed. The second light emitting element has lasing portions on a GaAs-made second substrate on the side thereof on which the supporting base is disposed. Since the first and second light emitting elements are not grown on the same substrate, a multiple-wavelength laser having the output wavelength of around 400 nm can be easily obtained. Since the first substrate is transparent in the visible region, the positions of light emitting regions in the first and second light emitting elements can be precisely controlled by lithography.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: October 10, 2006
    Assignee: Sony Corporation
    Inventor: Masao Ikeda
  • Patent number: 7109515
    Abstract: Systems and methods are described for carbon containing tips with cylindrically symmetrical carbon containing expanded bases. A method includes producing an expanded based carbon containing tip including: fabricating a carbon containing expanded base on a substrate; and then fabricating a carbon containing fiber on the expanded base. An apparatus includes a carbon containing expanded base coupled to a substrate; and a carbon containing extension coupled to said carbon containing expanded base. The carbon containing expanded base is substantially cylindrically symmetrical and said carbon containing extension is substantially cylindrically symmetrical.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: September 19, 2006
    Assignee: UT-Battelle LLC
    Inventors: Vladimir I. Merkulov, Douglas H. Lowndes, Michael A. Guillorn, Michael L. Simpson
  • Patent number: 7102145
    Abstract: A method for enhancing spatial resolution of a transmission electron microscopy TEM) system configured for electron holography. In an exemplary embodiment, the method includes configuring a first lens to form an initial virtual source with respect to an incident parallel beam, the initial virtual source positioned at a back focal plane of said first lens. A second lens is configured to form an intermediate virtual source with respect to the incident parallel beam, the position of said intermediate virtual source being dependent upon a focal length of the first lens and a focal length of the second lens. A third lens is configured to form a final virtual source with respect to the incident parallel beam, wherein the third lens has a focal length such that a front focal plane of the third lens lies beyond the position of the intermediate virtual source, with respect to a biprism location.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: September 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Anthony G. Domenicucci, Yun-Yu Wang
  • Patent number: 7095040
    Abstract: An electron-emitting device includes an electron source layer made of a metal, a metal alloy or a semiconductor, an insulating layer formed on the electron source layer and a metal thin film electrode formed on the insulating layer. Electrons are emitted upon application of an electric field between the electron source layer and the metal thin film electrode. The insulating layer has at least one island region which constitutes an electron-emitting section in which the film thickness of the insulating layer is gradually reduced. The electron-emitting device further includes a carbon region made of carbon or a carbon compound on at least one of a top, bottom and inside of the island region.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: August 22, 2006
    Assignee: Pioneer Corporation
    Inventors: Shingo Iwasaki, Takashi Yamada, Takuya Hata, Takashi Chuman, Nobuyasu Negishi, Kazuto Sakemura, Atsushi Yoshizawa, Hideo Satoh, Takamasa Yoshikawa, Kiyohide Ogasawara