Abstract: A semiconductor integrated circuit device according to the present invention includes a diode in a second island region. The anode region of the diode and the dividing region in a first island region having a horizontal PNP transistor are electrically connected to each other; the cathode region of the diode and the collector region of a power NPN transistor are electrically connected to each other. Accordingly, the dividing region in the first island region having a horizontal PNP transistor becomes lower in potential than the dividing regions in the other island regions, so that the inflow of free carriers (electrons) to the horizontal PNP transistor can be prevented.

Abstract: An electrostatic discharge protection device, including a silicon-control-rectifier, in complementary metal-oxide semiconductor (CMOS) process is disclosed. in one embodiment of the present invention, the protection device includes a semiconductor substrate having a first conductivity type. A well region formed with a second conductivity type in the semiconductor substrate. A first region formed in the well region. A second region formed having a portion in the weil region and another portion outside the well region, but still within the semiconductor substrate. Moreover, a third region formed within the well region and in between the first; region and the second region. A fourth region formed within the semiconductor substrate and outside the well region. A fifth region formed within the semiconductor substrate and in between the second region and the fourth region.

Abstract: The invention concerns a voltage-controlled triac-type component, formed in a N-type substrate (1) comprising first and second vertical thyristors (Th1, Th2), a first electrode (A2) of the first thyristor, on the front side of the component, corresponding to a first N-type region (6) formed in a first P-type box (5), the first box corresponding to a first electrode (A2) of the second thyristor, the first box containing a second N-type region (8); and a pilot structure comprising, above an extension of a second electrode region (4) of the second thyristor, a second P-type box (11) containing third and fourth N-type regions, the third region (12) and a portion of the second box (11) being connected to a gate terminal (G), the fourth region (13) being connected to the second region (8).

Abstract: The invention relates to a semiconductor circuit (20) having an electrically programmable switching element (10), an “antifuse”, which includes a substrate electrode (2), produced in a substrate (1) which can be electrically biased with a substrate potential (Vo), and an opposing electrode (5) which is isolated from the substrate electrode (2) by an insulating layer (8), where the substrate electrode (2) includes at least one highly doped substrate region (3), and where the opposing electrode (5) can be connected to an external first electrical potential (V+) which can be provided outside of the semiconductor circuit (20). In line with the invention, the substrate electrode (2) can be connected to a second electrical potential (V?), which is provided inside the circuit and which, together with the external first potential (V+), produces a higher programming voltage (V) than the external first potential (V?) together with the substrate potential (Vo).

Abstract: A semiconductor component in which the active junctions extend along at least one cylinder perpendicular to the main surfaces of a semiconductor chip substantially across the entire thickness thereof, said cylinder(s) having a cross-section with an undulated closed curve shape.

Abstract: The invention concerns a pulsed bistable bidirectional electronic switch comprising a monolithic semiconductor circuit formed from a substrate (1) whereof the rear surface (A2) is coated with a metallization connected to earth. Said circuit comprises a vertical bidirectional switch (T1, T2) provided with a first gate terminal (M3), whereof the main electrode (A1) on the side of the front surface is connected to a load and an alternating current supply; a horizontal thyristor (T3) comprising an upper layer (4) of the vertical bidirectional switch, a first P-type region (11), and a second N-type region (12) formed in the first region; a second gate terminal (G1) connected to one of the first and second regions, the other being connected to earth. A capacitor (C) is connected to the first gate terminal (G3) and to the alternating current supply (VAC).

Abstract: A T-RAM array having a plurality of T-RAM cells is presented where each T-RAM cell has dual devices. Each T-RAM cell is planar and has a buried vertical thyristor and a horizontally stacked pseudo-TFT transfer gate. The buried vertical thyristor is located beneath the horizontally stacked pseudo-TFT transfer gate. A method is also presented for fabricating the T-RAM array having the buried vertical thyristors, the horizontally stacked pseudo-TFT transfer gates and the planar cell structure.

Abstract: In order to eliminate the difference in ESD resistance caused by polarities of excessive voltages applied to an external terminal and enhance ESD resistance of a semiconductor integrated circuit device to both the positive and negative overvoltages, a protection element having a thyristor structure, for protecting an internal circuit from the positive overvoltage and a protection element made up of a diode D1 for protecting the internal circuit from the negative overvoltage are provided between the external terminal and a ground potential.

Abstract: A novel architecture of high-power four-quadrant hybrid power modules based on high-current trench gate IGBTs and arrays of low-current wide-bandgap diodes is conceived. The distributed physical layout of high power density wide-bandgap devices improves the cooling inside a fully-sealed module case, thus avoiding excessive internal heat flux build up and high PN junction temperature, and benefiting the converter's reliability and efficiency. The design of multiple-in-one hybrid integrated AC-switch module at high power ratings is enabled by using hybrid AC switch cells and aluminum nitride substrate structure.

Abstract: A variety of leadless packaging arrangements and methods of packaging integrated circuits in leadless packages are disclosed. The described lead frames are generally arranged such that each device area has a plurality of contacts but no die attach pad. With this arrangement, the back surface of the die is exposed and coplanar with the exposed bottom surface of the contacts. A casing material (typically plastic) holds the contacts and die in place. In one aspect of the invention, the back surface of the die is metallized. The metallization forms a good attachment surface for the package and serves as a good thermal path to transfer heat away from the die. In another aspect, at least some of the contacts have a top surface, a shelf, and a bottom surface. The die is wire bonded (or otherwise electrically connected) to the shelf portions of the contacts. The described package is quite versatile.

Abstract: A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without requiring heavy metal doping.

Abstract: A monolithic bidirectional switch formed in a semiconductor substrate of type N, including a first main vertical thyristor, the rear surface layer of which is of type P, a second main vertical thyristor, the rear surface layer of which is of type N, an auxiliary vertical thyristor, the rear surface layer of which is of type P and is common with that of the first main thyristor, a peripheral region of type P especially connecting the rear surface layer of the auxiliary thyristor to the layer of this thyristor located on the other side of the substrate, a first metallization on the rear surface side, a second metallization on the front surface side connecting the front surface layers of the first and second thyristors. An additional region has a function of isolating the rear surface of the auxiliary thyristor and the first metallization.

Abstract: A bidirectional switch, including a first bidirectional switch between two power terminals of the switch, a low-voltage storage element between a first power terminal and a control terminal of the switch, and a control stage adapted to cause, upon each halfwave beginning of an A.C. supply voltage applied between the power terminals and when the switch is on, the charge of the storage element with a biasing depending on the sign of the halfwave.

Abstract: A monolithic component including two thyristors of a composite bridge connected to an A.C. voltage terminal by a common terminal corresponding to a common rear surface metallization forming an electrode of opposite biasing of each thyristor. An isolating wall separates a substrate in two portions, a first portion includes on its lower surface side an anode region and on its upper surface side a cathode region, the second portion includes on its lower surface side a cathode region and on its upper surface side an anode region. The isolating wall surrounding each of the components extending towards the main electrode on the side which carries no common metallization and including in this extended region an N-type area, the two areas being connected together to a common control terminal.

Abstract: A semiconductor device such as an IGBT, for realizing measurement precision for forward voltage effect characteristics using a relatively small current. It includes a second conductivity type of first anode region formed to partially constitute the upper surface of a first conductivity type of semiconductor substrate and having an anode electrode formed on its upper surface, a second anode region formed within said first anode region, and an anode electrode formed on said second anode region. The second anode region is electrically isolated from the first anode region, and the anode electrode formed on the upper surface of the second anode region is independent of the anode electrode formed on the upper surface of the first anode region. In such semiconductor device having said second anode region, even though a small force current, measurement can be performed at a current density which is equal to or close to a rated current.

Abstract: The invention relates to a thermoelectric element comprising at least one n-type layer (1) and at least one p-type layer (2) of one or more doped semiconductors, whereby the n-type layer(s) (2) are arranged to form at least one pn-type junction (3). At least one n-type layer (1) and at least one p-type (2) are contacted in an electrically selective manner, and a temperature gradient (T1, T2) is applied or tapped parallel (x-direction) to the boundary layer (3) between at least one n-type layer (1) and p-type layer (2). At least one pn-type junction is formed essentially along the entire, preferably longest, extension of the n-type layer(s) (1) and of the p-type layer(s) (2) and thus essentially along the entire boundary layer (3) thereof.

Abstract: A bi-directional transient voltage suppression device is provided. The device comprises: (a) a lower semiconductor layer of p-type conductivity; (b) an upper semiconductor layer of p-type conductivity; (c) a middle semiconductor layer of n-type conductivity adjacent to and disposed between the lower and upper layers such that lower and upper p-n junctions are formed; (d) a mesa trench extending through the upper layer, through the middle layer and through at least a portion of the lower layer, such that the mesa trench defines an active area for the device; and (e) an oxide layer covering at least portions of the walls of the mesa trench that correspond to the upper and lower junctions, such that the distance between the upper and lower junctions is increased at the walls. The integral of the net middle layer doping concentration of this device, when taken over the distance between the junctions, is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown.

Abstract: A fast recovery diode has a single large area P/N junction surrounded by a termination region. The anode contact in contact with the central active area extends over the inner periphery of an oxide termination ring and an EQR metal ring extends over the outer periphery of the oxide termination ring. Platinum atoms are diffused into the back surface of the device. A three mask process is described. An amorphous silicon layer is added in a four mask process, and a plurality of spaced guard rings are added in a five mask process.

Abstract: The invention relates to a phase-change memory device. The device includes a double-trench isolation structure around the diode stack that communicates to the lower electrode. The present invention also relates to a method of making a phase-change memory device. The method includes forming two orthogonal and intersecting isolation trenches around a memory cell structure diode stack.

Abstract: A semiconductor rectifier includes a substrate of a first conductivity type; a current path layer of the first conductivity type formed near the surface of the substrate; a current block layer of a second conductivity type laterally enclosing the current path layer and extending to a depth deeper than the current path layer; and first and second metal layers formed respectively contacting upper and lower surfaces of the substrate. The current path layer has an impurity concentration higher than that of the substrate, and the current block layer has an impurity concentration higher than that of the current path layer. The current path layer is small enough for the portion below the current path layer to be completely blocked by the depletion region formed around the current block layer when a reverse bias or no is applied to the rectifier.

Abstract: Providing a reverse conducting thyristor, wherein a diode and a GTO thyristor are reverse parallel-connected, with which it is possible to reduce a surface area size of a separation portion and avoid variations in insulation characteristics. A separation portion between a diode and a GTO thyristor includes a semiconductor substrate of a first conductivity type, a thin film region of a second conductivity type formed in a major surface of the semiconductor substrate, and a guard ring region of the second conductivity type.

Abstract: An insulator film provided on a region for arranging a Zener diode has a plurality of groove portions successively arranged in a direction D1 of extension of each semiconductor region forming the diode. Each groove potion extends in a width direction D2 of each semiconductor region, and has a depth T3. Each semiconductor region is arranged on the upper surface of the insulator film. Therefore, it follows that each semiconductor region has a plurality of irregular shapes arranged in the direction D1 of extension and the Zener diode has a peripheral length not only in the transverse direction D1 but also in a vertical direction D3, so that a p-n junction area in the Zener diode is increased. Thus, parasitic resistance of an input protection Zener diode is reduced for improving a gate insulator film protective function of the diode.

Abstract: A semiconductor chip package comprising a chip with a lid having venting holes hermetically sealed with screws and a manufacturing method thereof are provided. The semiconductor chip package of the present invention comprises a chip such as a central processing unit (CPU) chip generating a large amount of heat; a substrate having upper and lower surfaces, the chip attached to the upper surface of the substrate; external connection terminals extending from the lower surface of the substrate and electrically connected to the chip; a lid attached to the upper surface of the substrate. The lid has a cavity for receiving the chip on a lower surface and venting holes penetrating the lid. The package includes sealing screws for hermetically sealing the venting holes. With the present invention, the venting holes formed through the lid are hermetically sealed without creating any voids or cracks in the sealant as in the prior art.

Abstract: Providing a reverse conducting thyristor, wherein a diode and a GTO thyristor are reverse parallel-connected, with which it is possible to reduce a surface area size of a separation portion and avoid variations in insulation characteristics.

Abstract: The present invention relates to a semiconducting structure constituting a protected rectifying bridge implemented in an N-type semiconductor substrate divided into first, second, and third wells by vertical P-type isolating walls, in which the rear surface of the substrate is coated with a first metallization and in which each of the first and second wells includes a vertical diode and a vertical Shockley diode. The third well includes a P-type isolating layer on its rear surface side in contact with the first metallization and, on its front surface side, two lateral diodes, each of which is formed between a P-type region and the substrate.

Abstract: An improved bond pad structure for semiconductor devices provides improved electrical isolation between adjacent bond pads by incorporating a pair of pn junctions between the pad and substrate. The pn junctions are defined by a first well of either P of N type material, formed within a substrate, and a second well or region of a P or N type material formed wholly within the first well. A bond wire is secured to an upper surface of the second region such that the wire, first and second regions and substrate are connected in electrical series relationship and provide an equivalent circuit of two series connected diodes reversed in polarity so as to block both negative and positive components of an applied voltage, thus providing electrical isolation for the bond pad structure.

Abstract: A method of forming a power integrated circuit device (100) including a semiconductor layer of first conductivity type. The semiconductor layer includes a front-side surface (103), a backside surface (116), and a scribe region (117). The semiconductor layer further including a plurality of active cells on the front-side surface (103). The present method includes forming a backside layer (116) of second conductivity type overlying the backside surface, and forming a continuous diffusion region (117) of the second conductivity type through the semiconductor layer to connect the scribe region to the backside layer (116).

Abstract: In a composite controlled semiconductor device having an insulated gate and a power conversion device using the same, a p type semiconductor region forming no channel is provided in the composite device structure between a plurality of p type semiconductor regions forming a channel and the potential of the p type semiconductor region in an ON state takes a value high enough to inject holes into an n type semiconductor region adjacent to the p type semiconductor region.

Abstract: A monolithic semiconductor component has a first thyristor having a gate, an anode and a cathode. The gate is connected to the cathode through a first resistor and to the anode through the series connection of a zener diode and a second thyristor. The thyristors are of the vertical type and the zener diode is of the lateral type. The cathode of the zener diode is connected to the cathode of the second thyristor through a metallization forming an output terminal.

Abstract: In a diode, the backward length L of an anode electrode in a region, where a semiconductor layer of a p.sup.+ conductivity type and an anode electrode do not contact each other, is made longer than the diffusion length of holes in a semiconductor layer of an n.sup.- conductivity type for obtaining a large critical di/dt.

Abstract: A starter unit for a fluorescent tube includes in parallel across two terminals, first and second main thyristors head-to-tail connected and a zener protection diode. The gate of the first thyristor is connected to one of the terminals through a resistor and to the other terminal through the series connection of an auxiliary thyristor with a zener diode (Z). The gate of the auxiliary thyristor is connected to a control terminal of the integrated circuit. The cathode of the auxiliary thyristor is connected with a supply terminal of the integrated circuit and to a storing capacitor. The gate of the second thyristor is connected to a control terminal of the integrated circuit.

Abstract: A reverse conducting gate-turnoff thyristor includes a switching device section, a diode section, and an isolating section located between the switching device section and the diode section. The isolating section includes an impurity layer formed by controlling impurity diffusion and having an impurity concentration lower than those of the switching device section and the diode section.

Abstract: In a composite controlled semiconductor device having an insulated gate, a p type semiconductor region forming no channel is provided between a plurality of p type semiconductor regions forming a channel and the potential of the p type semiconductor region in an ON state takes a value high enough to inject holes into an n type semiconductor region adjacent to the p type semiconductor region.

Abstract: A bidirectional thyristor structure with a single MOS gate controlled turn off capability. In a vertical conduction embodiment, the device has a six layer structure including a backside diffusion. One vertical conduction structure includes a single body region at the first surface of the device for conduction in both the forward and reverse directions. Another vertical conduction structure includes a two body regions at the first surface, one for controlling forward conduction and the other for controlling reverse conduction. The vertical conduction embodiments are preferably implemented in a cellular geometry, with a large number of symmetrical cells connected in parallel. The bidirectional thyristor of the present invention can also be provided in a lateral conduction structure for power IC applications.

Abstract: A dV/dt clamp circuit is connected to a base of a phototransistor for triggering a control electrode of a thyristor, thereby making an attempt to prevent an operation error. A control electrode voltage of the thyristor is applied to the gate of the MOSFET via a high breakdown voltage capacitor. The gate electrode voltage of the MOSFET can be continuously held at a threshold value or more by adjusting a zener voltage of a zener diode and a resistance value of a resistor. Since with a high dV/dt the MOSFET can be operated at a high speed to allow conduction between the drain and source of the MOSFET, the phototransistor does not trigger the thyristor, thereby preventing an operation error.

Abstract: A protection device against overloads that may occur on an interface between a telephone exchange and line switches connected to a subscriber's line, comprises a single protection circuit on the subscriber side of the line switches with respect to the interface. The overvoltage protection circuit ensures an overvoltage protection when the line switches are off, and an overcurrent protection when the switches are on. A controlled switch, disposed between each conductor and ground, is switched on in response to the detection of an overvoltage or overcurrent.

Abstract: A bidirectional thyristor structure with a single MOS gate controlled turn-on and turn-off capability. In a vertical conduction embodiment, the device has a six layer structure including a backside diffusion. One vertical conduction structure includes a single body region at the first surface of the device for conduction in both the forward and reverse directions. Another vertical conduction structure includes a two body regions at the first surface, one for controlling forward conduction and the other for controlling reverse conduction. The vertical conduction embodiments are preferably implemented in a cellular geometry, with a large number of symmetrical cells connected in parallel.

Abstract: This thyristor comprises a main current-carrying portion in the form of a semiconductor body having four layers, with contiguous layers being of different P and N conductivity types and with three back-to-back PN junctions between contiguous layers. One end layer constitutes an anode layer, an opposite end layer constitutes a cathode layer, and an intermediate layer contiguous with the cathode layer constitutes a gate layer. The cathode layer is divided into many elongated fingers, thereby dividing the PN junction between the cathode layer and the gate layer into many discrete PN subjunctions between the fingers and the gate layer. These subjunctions are effectively in parallel with each other so as to share the main current through the thyristor when the thyristor is "on". The gate layer has predetermined surface regions adjacent the cathode layer that are uncovered by the cathode-layer fingers and that respectively surround the PN subjunctions between the fingers and the gate layer.

Abstract: A bidirectional semiconductor switch employs two insulated gate semiconductor devices such as insulated gate bipolar transistors (IGBTs) that are connected oppositely in parallel, with the collector of one of the IGBTs being connected to the emitter of the other. The gates of the IGBTs are biased by gate controllers that are potentially independent of each other. The semiconductor switch is capable of controlling a direct current as well as an alternating current at a low ON-state voltage, reducing a conduction loss, and improving efficiency.

Abstract: Silicon controlled rectifier (SCR) structures are provided that are triggered by lightly doped diffusion (LDD) junction breakdown voltages of approximately 4-10 V. The SCR structures eliminate the need for the field plate diode and resistor secondary protection elements found in conventional SCR-based ESD protection circuits, thus minimizing RC delay on the signal line and reducing circuit size. The SCR structures are compatible with existing CMOS processes and are scalable to submicron technology.

Abstract: An a.c. switch includes across first and second main terminals a first thyristor disposed in parallel with, but in an opposite direction of, a first diode and in series with a second thyristor disposed in parallel with but in an opposite direction of, a second diode. The first thyristor has a gate terminal connected to its gate area. The second thyristor and second diode are vertically realized in the same substrate, their conduction areas being closely interlaced, whereby a polarity inversion following a conduction period of the second diode causes the second thyristor to become conductive.

Abstract: An a.c. switch includes across first and second main terminals a first thyristor disposed in parallel with, but in an opposite direction of, a first diode and in series with a second thyristor disposed in parallel with but in an opposite direction of, a second diode. The first thyristor has a gate terminal connected to its gate area. The second thyristor and second diode are vertically realized in the same substrate, their conduction areas being closely interlaced, whereby a polarity inversion following a conduction period of the second diode causes the second thyristor to become conductive.

Abstract: A bidirectional thyristor structure with a single MOS gate controlled turn off capability. In a vertical conduction embodiment, the device has a six layer structure including a backside diffusion. One vertical conduction structure includes a single body region at the first surface of the device for conduction in both the forward and reverse directions. Another vertical conduction structure includes a two body regions at the first surface, one for controlling forward conduction and the other for controlling reverse conduction. The vertical conduction embodiments are preferably implemented in a cellular geometry, with a large number of symmetrical cells connected in parallel. The bidirectional thyristor of the present invention can also be provided in a lateral conduction structure for power IC applications.

Abstract: An insulated-gate bipolar transistor (IGBT) is connected in reverse-parallel with a current-regenerative diode which, for economy of manufacture, is integrated with the IGBT. Such a diode may extend laterally on an IGBT chip, with two conductivity regions forming the diode respectively connected to emitter and collector electrodes of the IGBT. Alternatively, the diode may be formed by short-circuiting a buffer layer and a collector layer. By such integration, greater device packing density can be realized.

Abstract: An a.c. switch includes across first and second main terminals a first thyristor disposed in parallel with, but in an opposite direction of, a first diode and in series with a second thyristor disposed in parallel with, but in an opposite direction of, a second diode. The first thyristor has a gate terminal connected to its gate area. The second thyristor and second diode are vertically realized in the same substrate, their conduction areas being closely interlaced, whereby a polarity inversion following a conduction period of the second diode causes the second thyristor to become conductive.

Abstract: A reverse conducting gate turn-off thyristor (RC-GTO) includes, in the same semiconductor body, a gate turn-off thyristor, a reverse current diode, and a semiconductor isolation region between the gate turn-off thyristor and the reverse current diode and having a first conductivity type semiconductor layer adjacent an anode electrode and spaced apart second conductivity type high-dopant-impurity-concentration regions opposite the anode electrode.

Abstract: A switching device includes a thyristor and a MOSFET, and a voltage clamp circuit. The voltage clamp circuit includes an N.sup.+ type contact region formed in a surface layer of a N type substrate and electrically connected to a gate electrode of a MOSFET, and a P type guard ring surrounding the contact region.

Abstract: A bidirectional protection component comprises two reverse connected thyristors, each of which is in anti-parallel with a diode, the gates of the two thyristors being interconnected and floating. This component, which can be monolithic comprises two vertical thyristors having the same orientation and two vertical diodes having the same orientation, opposite that of the thyristors. Semiconductor regions (P3, N2, P1) constituting the thyristors are common except for their cathode regions (N11, N12). The component comprises three metallizations: a rear surface metallization (M1) connecting the common anodes of the thyristors with the cathodes of the diodes, a first front surface metallization (A1) connecting the cathode (N11) of a thyristor to the anode (P21) of a diode, and a second front surface metallization (A2) connecting the cathode (N12) of the other thyristor to the anode (P22) of the other diode.

Abstract: This thyristor comprises a main current-carrying portion in the form of a semiconductor body having four layers, with contiguous layers being of different P and N conductivity types and with three back-to-back PN junctions between contiguous layers. One end layer constitutes an anode layer, an opposite end layer constitutes a cathode layer, and an intermediate layer contiguous with the cathode layer constitutes a gate layer. The cathode layer is divided into many elongated fingers, thereby dividing the PN junction between the cathode layer and the gate layer into many discrete PN subjunctions between the fingers and the gate layer. These subjunctions are effectively in parallel with each other so as to share the main current through the thyristor when the thyristor is "on". The gate layer has predetermined surface regions adjacent the cathode layer that are uncovered by the cathode-layer fingers and that respectively surround the PN subjunctions between the fingers and the gate layer.