With Large Area Flexible Electrodes In Press Contact With Opposite Sides Of Active Semiconductor Chip And Surrounded By An Insulating Element, (e.g., Ring) Patents (Class 257/181)
  • Patent number: 5428229
    Abstract: A MOS semiconductor device which exhibits high switching operations including high turn-on and an excellent self-cooling capability. The device prevents damage to insulation films and electrodes thereof. An IGT includes a multi-layer structure having a p type emitter layer, an n type base layer, a p type base layer and an n type emitter layer superimposed therein. A gate electrode and an overlying gate oxide film are disposed on a recessed surface of the multi-layer structure. A cathode electrode is located only in and around a cathode surface so that most of the top surface of the gate electrode is uncovered. Via an intervening cathode distortion snubbering plate, the cathode electrode is in pressure contact with a cathode electrode body. The gate and the cathode electrodes have a reduced capacitance therebetween. The cathode electrode body serves to cool the cathode electrode. The gate electrode and the gate oxide film are protected from stress, and hence, will not be damaged by stress.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: June 27, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuhiko Niwayama, Futoshi Tokunou
  • Patent number: 5371386
    Abstract: In a semiconductor device, a semiconductor element is stored in a casing while being held by external electrodes through first and second electrodes. The outer peripheral edge of the first electrode plate is projected outwardly beyond that of the semiconductor element and a ring-shaped groove is provided in the first surface of the first electrode plate along the outer peripheral edge of the semiconductor element. An adhesive holding member is charged in the groove and the outer peripheral portion of the semiconductor element. Thus, the semiconductor element is fixed to the first electrode plate and is protected by the adhesive holding member covering its end portion.
    Type: Grant
    Filed: April 15, 1993
    Date of Patent: December 6, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Futoshi Tokunoh, Katsumi Satoh
  • Patent number: 5360985
    Abstract: In a semiconductor device, a pellet electrode, which is formed on a mesa-shaped pellet, and an external electrode, with which a package is provided, are in pressure-contact with each other. A soft-metal plate which has projections along its surface is arranged between the external electrode and the pellet electrode.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: November 1, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Michiaki Hiyoshi, Takashi Fujiwara, Hisashi Suzuki, Hideo Matsuda
  • Patent number: 5278434
    Abstract: Coned disc springs (84, 86) lie between a gate extracting electrode (80G) held in a ringlike recess (63) of an external cathode electrode (60K) and a bottom surface of the ringlike recess (63). A semiconductor body (30) is pressed against an anode distortion buffering plate (50A) by a urging force of the coned disc springs (84, 86) for vertical positional fixation of the semiconductor body (30). This enables the semiconductor body to be prevented from damages and deformation in a full press-pack type semiconductor device.
    Type: Grant
    Filed: May 27, 1992
    Date of Patent: January 11, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kazuhiko Niwayama
  • Patent number: 5250821
    Abstract: Plural modular elementary semiconductor power components are respectively contained within plural semiconductor chip regions of a same semiconductor slice. A metallic layer covers a first surface of the semiconductor slice and is commonly connected to anode electrodes of the plural elementary power components. Plural space apart quadrangular metallic layer regions respectively cover the plural semiconductor chip regions on a second surface of the semiconductor slice and are respectively connected to cathode electrodes of the plural elementary power components. Plural first metallic tracks are spaced apart from and surround the respective plural metallic layer regions on the second surface of the semiconductor slice. Each respective first metallic track is connected to a control electrode of the elementary power component contained within the semiconductor chip regions surrounded by the respective first metallic track.
    Type: Grant
    Filed: January 9, 1992
    Date of Patent: October 5, 1993
    Assignees: SGS-Thomson Microelectronisc S.r.L., Ansaldo Transporti S.p.A.
    Inventors: Giuseppe Ferla, Cesare Ronsisvalle, Pier E. Zani
  • Patent number: 5221851
    Abstract: In a large-area controlled-turn-off high-power semiconductor component containing a multiplicity of finely structured individual components, a semiconductor device (12) is formed by a multiplicity of small-area semiconductor chips (7) which are accommodated alongside one another in a common housing (13) and connected in parallel. This achievement avoids problems of yield with structures which are becoming finer.
    Type: Grant
    Filed: February 4, 1992
    Date of Patent: June 22, 1993
    Assignee: Asea Brown Boveri Ltd.
    Inventors: Jens Gobrecht, Thomas Stockmeier