Light Responsive Structure Patents (Class 257/184)
  • Publication number: 20140070272
    Abstract: The present invention relates to a UV photodetector having a high sensitivity and a low dark current. The object of the present invention is to specify a UV photodetector that has a high sensitivity and a low dark current. According to the invention, the fingers of the first electrode structure and the fingers of the second electrode structure have a cover layer made of a second semiconducting material, wherein the cover layer is arranged on the absorber layer and directly contacts the absorber layer in the region of the fingers, and the first semiconducting material and the second semiconducting material are designed in such a manner that a two-dimensional electron gas (2DEG) is formed at the boundary layer between the absorber layer and the cover layer in the region of the fingers.
    Type: Application
    Filed: April 26, 2012
    Publication date: March 13, 2014
    Applicant: Forschungsverbund Berlin e.V.
    Inventors: Andrea Knigge, Markus Weyers, Hans-Joachim Wurfl
  • Patent number: 8669588
    Abstract: A unit cell for use in an imaging system may include an absorber layer of semiconductor material formed on a semiconductor substrate, at least one contact including semiconductor material formed on the semiconductor substrate and electrically coupled to the absorber layer, and a cap layer of semiconductor material formed on the semiconductor substrate and electrically coupled to and formed between the absorber layer and the at least one contact. The absorber layer may be configured to absorb incident photons such that the absorbed photons excite electrons in the absorber layer to generate a photocurrent. The at least one contact may be configured to conduct the photocurrent to one or more electrical components external to the unit cell. The cap layer may be configured to conduct the photocurrent between the absorber layer and the at least one contact.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: March 11, 2014
    Assignee: Raytheon Company
    Inventors: Edward Peter Gordon Smith, Gregory Mark Venzor, Eric J. Beuville
  • Patent number: 8669466
    Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: March 11, 2014
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Yves Martin, Naim Moumen, Robert L. Sandstrom, Theodore G. van Kessel
  • Patent number: 8659053
    Abstract: A semiconductor light detecting element includes: an InP substrate; and a semiconductor stacked structure on the InP substrate and including at least a light absorbing layer, wherein the light absorbing layer includes an InGaAsBi layer lattice-matched to the InP substrate.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: February 25, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshifumi Sasahata, Eitaro Ishimura
  • Patent number: 8653529
    Abstract: In a semiconductor device in which a glass substrate is attached to a surface of a semiconductor die with an adhesive layer being interposed therebetween, it is an object to fill a recess portion of an insulation film formed on a photodiode with the adhesive layer without bubbles therein. In a semiconductor die in which an optical semiconductor integrated circuit including a photodiode having a recess portion of an interlayer insulation film in the upper portion, an NPN bipolar transistor, and so on are formed, generally, a light shield film covers a portion except the recess portion region on the photodiode and except a dicing region. In the invention, an opening slit is further formed in the light shield film, extending from the recess portion to the outside of the recess portion, so as to attain the object.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: February 18, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Shinzo Ishibe, Katsuhiko Kitagawa
  • Patent number: 8637875
    Abstract: Apparatuses and systems for photon detection can include a first optical sensing structure structured to absorb light at a first optical wavelength; and a second optical sensing structure engaged with the first optical sensing structure to allow optical communication between the first and the second optical sensing structures. The second optical sensing structure can be structured to absorb light at a second optical wavelength longer than the first optical wavelength and to emit light at the first optical wavelength which is absorbed by the first optical sensing structure. Apparatuses and systems can include a bandgap grading region.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: January 28, 2014
    Assignee: The Regents of the University of California
    Inventors: Hod Finkelstein, Sadik C. Esener, Yu-Hwa Lo, Kai Zhao, James Cheng, Sifang You
  • Patent number: 8633513
    Abstract: Structures and method for reducing junction leakage in semiconductor devices. The die can include a substrate having a cut edge, a first region of first conductivity type within the substrate and a region of a second conductivity type within the substrate and in contact with the first region forming a junction. At least one semiconductor device is on the substrate. A second region of the first conductivity type is between the plurality of semiconductor devices and the cut edge within the region of the second conductivity type, and extending to the junction. The second region of the first conductivity type can isolate the at least one semiconductor device from leakage pathways created by saw damage at the junction along the cut edge.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: January 21, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Daniel Doyle, Jeffrey Gleason
  • Patent number: 8629385
    Abstract: Disclosed herein is a solid-state imaging element including: (A) a light reception/charge storage region formed in a semiconductor layer, the light reception/charge storage region including M light reception/charge storage layers stacked one on top of the other, where M?2; (B) a charge output region formed in the semiconductor layer; (C) a conduction/non-conduction control region which includes a portion of the semiconductor layer located between the light reception/charge storage region and the charge output region; and (D) a conduction/non-conduction control electrode adapted to control the conduction or non-conduction state of the conduction/non-conduction control region, wherein mth potential control electrodes are provided between the mth and (m+1)th light reception/charge storage layers, where 1?m?(M?1), to control the potentials of the light reception/charge storage layers.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: January 14, 2014
    Assignee: Sony Corporation
    Inventors: Kaneyoshi Takeshita, Takashi Kubodera, Akihiro Nakamura
  • Publication number: 20140008698
    Abstract: There is provided a semiconductor wafer including a base wafer whose surface is entirely or partially a silicon crystal plane, an inhibitor positioned on the base wafer to inhibit crystal growth and having an opening that reaches the silicon crystal plane, a first crystal layer made of SixGe1-x (0?x<1) and positioned on the silicon crystal plane that is exposed in the opening, a second crystal layer positioned on the first crystal layer and made of a III-V Group compound semiconductor that has a band gap width larger than a band gap width of the first crystal layer, and a pair of metal layers positioned on the inhibitor and the second crystal layer. The pair of the metal layers are each in contact with the first crystal layer and the second crystal layer.
    Type: Application
    Filed: September 5, 2013
    Publication date: January 9, 2014
    Applicants: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Tomoyuki TAKADA, Sadanori YAMANAKA, Masao SHIMADA, Masahiko HATA, Taro ITATANI, Hiroyuki ISHII, Eiji KUME
  • Patent number: 8624294
    Abstract: An apparatus, system, and method are disclosed for providing optical power to a semiconductor chip. An active semiconductor layer of the semiconductor chip is disposed toward a front side of the semiconductor chip. The active semiconductor layer comprises one or more integrated circuit devices. A photovoltaic semiconductor layer of the semiconductor chip is disposed between the active semiconductor layer and a back side of the semiconductor chip. The back side of the semiconductor chip is opposite the front side of the semiconductor chip. The photovoltaic semiconductor layer converts electromagnetic radiation to electric power. One or more conductive pathways between the photovoltaic semiconductor layer and the active semiconductor layer provide the electric power from the photovoltaic semiconductor layer to the one or more integrated circuit devices of the active semiconductor layer.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventor: Eric V. Kline
  • Patent number: 8610048
    Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 17, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Jerome Alieu, Simon Guillaumet, Christophe Legendre, Hughes Leininger, Jean-Pierre Oddou, Marc Vincent
  • Patent number: 8592243
    Abstract: A method for forming a buffer layer in a dye-sensitized solar cell including a transparent electrode, a counter electrode, an electrolyte layer disposed between the electrodes, and a photocatalyst film disposed between the electrodes and near the transparent electrode, the buffer layer being disposed between the transparent electrode and photocatalyst film, the method including: forming the buffer layer by sintering a mixed solution of an alcohol solution and 0.03% to 5% by mass of metal alkoxide by laser beam irradiation after applying the mixed solution to the surface of the transparent electrode by spin coating, the transparent electrode being rotated by a rotating table.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: November 26, 2013
    Assignee: Hitachi Zosen Corporation
    Inventors: Takeshi Sugiyo, Tetsuya Inoue
  • Patent number: 8586859
    Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: November 19, 2013
    Assignee: Emcore Solar Power, Inc.
    Inventor: Tansen Varghese
  • Patent number: 8581166
    Abstract: An optoelectronic shutter, a method of operating the same, and an optical apparatus including the optoelectronic shutter are provided. The optoelectronic shutter includes a phototransistor which generates an output signal from incident input light and a light emitting diode serially connected to the phototransistor. The light emitting diode outputs output light according to the output signal, and the output signal is gain-modulated according to a modulation of a current gain of the phototransistor.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 12, 2013
    Assignees: Samsung Electronics Co., Ltd., Gwangju Institute of Science and Technology
    Inventors: Yong-chul Cho, Jae-hyung Jang, Yong-hwa Park, Chang-soo Park, Jong-in Song
  • Patent number: 8575471
    Abstract: Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a?) that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: November 5, 2013
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Andrew G. Norman, Aaron J. Ptak, William E. McMahon
  • Patent number: 8569813
    Abstract: The objective of this invention is to provide a photodiode which has high sensitivity even to light with a wavelength in the blue region while maintaining the high-frequency characterstics. The n type second semiconductor layer (13) containing an n type electroconductive impurity at a low concentration is formed directly or via an intrinsic semiconductor layer (11) on the p type first semiconductor layer (10). The third semiconductor layer (20) containing an n type electroconductive impurity at a medium concentration is formed shallower than said second semiconductor layer (13) in its main plane. The fourth semiconductor layer (21) containing an n type electroconductive impurity at a high concentration is formed shallower than said third semiconductor layer (20) in the main plane of the third semiconductor layer (20).
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: October 29, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroyuki Tomomatsu, Tohru Katoh, Motoaki Kusamaki, Tetsuhiko Kinoshita
  • Publication number: 20130269761
    Abstract: This disclosure relates to photovoltaic and photoelectrosynthetic cells, devices, methods of making and using the same.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 17, 2013
    Inventors: Shane Ardo, Matthew Shaner, Robert Coridan, Nicholas C. Strandwitz, James R. McKone, Katherine Fountaine, Harry A. Atwater, Nathan S. Lewis
  • Publication number: 20130270589
    Abstract: An optoelectronic device is disclosed. The optoelectronic device comprises a semiconductor structure; a plurality of contacts on the front side of the semiconductor structure; and a plurality of non-continuous metal contacts on a back side of the semiconductor structure. In an embodiment, a plurality of non-continuous back contacts on an optoelectronic device improve the reflectivity and reduce the losses associated with the back surface of the device.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 17, 2013
    Applicant: ALTA DEVICES, INC.
    Inventors: Brendan M. KAYES, Sylvia SPRYUTTE, I-Kang DING, Rose TWIST, Gregg HIGASHI
  • Patent number: 8552470
    Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: October 8, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Yuanning Chen, Thomas Patrick Conroy, Jeffrey DeBord, Nagarajan Sridhar
  • Patent number: 8552483
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: October 8, 2013
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Publication number: 20130256750
    Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.
    Type: Application
    Filed: February 13, 2013
    Publication date: October 3, 2013
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8541813
    Abstract: A homojunction type high-speed photodiode has an active area of greater than at least 50 microns (?m) or preferably greater than 60 microns (?m) in diameter, which has an p-i-n junction epitaxial layer formed on a semiconductor substrate and includes a first ohmic contact layer, an absorption layer, a collector layer and a second ohmic contact layer. No more absorbance occurs in the collector layer of InGaAs, by means of completely absorbing the photon energy in advance by the absorption layer in which the absorption layer has powerful optical absorption constant. Not only can the prior art problems be solved, such as surface absorbance, but also improved electron transport can be achieved by using InGaAs as the constructing material, compared to other materials. The resistance capacitance (RC) for the entire structure can be significantly reduced, and the limitations to the bandwidth resulted from the carrier transport time can be improved.
    Type: Grant
    Filed: July 14, 2012
    Date of Patent: September 24, 2013
    Assignee: National Central University
    Inventors: Jin-Wei Shi, Kai-Lun Chi
  • Patent number: 8541820
    Abstract: According to one embodiment, a semiconductor device includes the following structure. The first insulating film is formed on a first major surface of a semiconductor substrate. The electrode pad is formed in the first insulating film. The electrode pad includes a conductive film. At least a part of the conductive film includes a free region in which the conductive film is not present. The external connection terminal is formed on a second major surface facing the first major surface. The through-electrode is formed in a through-hole formed from the second major surface side of the semiconductor substrate and reaching the electrode pad. The first insulating film is present in the free region, and a step, on a through-electrode side, between the first insulating film being present in the free region and the electrode pad is not greater than a thickness of the electrode pad.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: September 24, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuko Hayasaki, Kenichiro Hagiwara
  • Publication number: 20130240948
    Abstract: The present invention aims to improve the conversion efficiency in a photoelectric conversion device. A photoelectric conversion device comprises an electrode, a first semiconductor layer containing a Group I-III-VI compound semiconductor and located on the electrode, and a second semiconductor layer having a conductivity type different from that of the first semiconductor layer and located on the first semiconductor layer, wherein, in the first semiconductor layer, a ratio CVI/CI of the content CVI of a Group VI-B element to the content CI of a Group I-B element in a surface part of the second semiconductor layer side thereof is larger than the ratio CVI/CI in a rest part of the electrode side thereof.
    Type: Application
    Filed: November 18, 2011
    Publication date: September 19, 2013
    Applicant: KYOCERA CORPORATION
    Inventor: Shinnosuke Ushio
  • Publication number: 20130234202
    Abstract: Image sensors comprising an isolation region according to embodiments are disclosed, as well as methods of forming the image sensors with isolation region. An embodiment is a structure comprising a semiconductor substrate, a photo element in the semiconductor substrate, and an isolation region in the semiconductor substrate. The isolation region is proximate the photo element and comprises a dielectric material and an epitaxial region. The epitaxial region is disposed between the semiconductor substrate and the dielectric material.
    Type: Application
    Filed: March 8, 2012
    Publication date: September 12, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko JangJian, Min Hao Hong, Kei-Wei Chen, Szu-An Wu
  • Patent number: 8530885
    Abstract: A system includes a substrate having a plurality of three-dimensional photonic crystal elements directly coupled thereto. The photonic crystal elements may each partially or substantially coated with oriented graphene and may comprise undoped silicon. The graphene may be oriented in a direction parallel to or normal to the photonic crystal element and may comprise graphene flakes contained within a composite thin film. The system may also include at least one optical component, such as a waveguide, contained within the plurality of three-dimensional photonic crystal elements. A method is also provided for preparing the graphene and coating the photonic crystal elements with the graphene.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: September 10, 2013
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Joanna N. Ptasinski, Stephen D. Russell
  • Patent number: 8530257
    Abstract: Methods for improving the temperature performance of AlInGaP based light emitters. Nitrogen is added to the quantum wells in small quantities. Nitrogen is added in a range of about 0.5 percent to 2 percent. The addition of nitrogen increases the conduction band offset and increases the separation of the indirect conduction band. To keep the emission wavelength in a particular range, the concentration of In in the quantum wells may be decreased or the concentration of Al in the quantum wells may be increased. The net result is an increase in the conduction band offset and an increase in the separation of the indirect conduction band.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: September 10, 2013
    Assignee: Finisar Corporation
    Inventor: Ralph Herbert Johnson
  • Patent number: 8530933
    Abstract: A highly sensitive and wide spectra-range mesa type photodetector having the impurity diffusion along the mesa-sidewall is provided. A mesa-type hetero-bipolar phototransistor or photodiode having a photo-absorption layer formed by a first semiconductor layer of a first conductivity type, an anode layer (or base layer) formed by a second semiconductor layer of a second conductivity type which has an opposite polarity with the first conductivity type, a wide band gap emitter or window layer formed by the third semiconductor layer on the anode layer, and the wide band gap buffer layer of the first conductivity type which has a relatively wide band gap semiconductor as compared with the second semiconductor layer on the substrate, which also serves as the cathode layer. And the first semiconductor layer, the second semiconductor layer and the wide band gap emitter or window layer is selectively etched to form the mesa structure.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: September 10, 2013
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventor: Mutsuo Ogura
  • Patent number: 8525165
    Abstract: To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: September 3, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kengo Akimoto
  • Patent number: 8525242
    Abstract: A solid-state image pickup device including: a pixel region on a semiconductor substrate, the pixel region including: a sensor region for photoelectrically converting incident light; a vertical CCD formed on one side of the sensor region with a readout region interposed between the sensor region and the vertical CCD; and a channel stop region formed on a side opposite from the sensor region with the vertical CCD interposed between the sensor region and the channel stop region; and a vertical transfer electrode on the vertical CCD with an insulating film interposed between the vertical transfer electrode and the vertical CCD. The vertical transfer electrode is formed above the vertical CCD such that width of the vertical transfer electrode and width of a channel region of the vertical CCD are substantially equal to each other.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: September 3, 2013
    Assignee: Sony Corporation
    Inventor: Hideo Kanbe
  • Patent number: 8519435
    Abstract: A photovoltaic cell is fabricated onto a polyimide film using an unbalanced RF magnetron sputtering process. The sputtering process includes the addition of 0.05% to 0.5% oxygen to an inert gas stream. Portions of the photovoltaic cell are exposed to an elevated temperature CdCl2 treatment which is at or below the glass transition temperature of the polyimide film.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: August 27, 2013
    Assignee: The University of Toledo
    Inventors: Anthony Vasko, Kristopher Wieland, James Walker, Alvin Compaan
  • Patent number: 8519460
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: August 27, 2013
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8513651
    Abstract: Provided is a photoelectric conversion device comprising an electrically conductive film, a photoelectric conversion film, and a transparent electrically conductive film, wherein the photoelectric conversion film contains a fullerene or a fullerene derivative and a photoelectric conversion material having an absorption spectrum satisfying at least either the following condition (A) or (B): ?M1<?L1 and ?M2<?L2??(A) ?M1<?L1 and ?|?M1??L1|>?|?M2??L2|??(B) wherein ?L1, ?L2, ?M1 and ?M2 are the wavelength at an absorption intensity of ½ of the maximum absorption intensity in the wavelength range of from 400 to 800 nm, each of ?L1 and ?L2 represents the wavelength in a chloroform solution spectrum when the photoelectric conversion material is dissolved in chloroform, and each of ?M1 and ?M2 represents the wavelength in a thin-film absorption spectrum of the photoelectric conversion material alone, provided that ?L1<?L2 and ?M1<?M2.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: August 20, 2013
    Assignee: Fujifilm Corporation
    Inventors: Tetsuro Mitsui, Kimiatsu Nomura, Mitsumasa Hamano
  • Patent number: 8513754
    Abstract: A solar cell includes a substrate of a first conductive type; an emitter layer that is positioned on the substrate and is a second conductive type that is opposite to the first conductive type; first electrodes that are connected to the emitter layer; and a second electrode that is connected to the substrate, wherein the emitter layer includes a first emitter portion and a second emitter portion, the first electrodes include a finger electrode, and a bus electrode intersecting and connected to the finger electrode, and the first emitter portion and the second emitter portion are positioned under the bus electrode.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: August 20, 2013
    Assignee: LG Electronics Inc.
    Inventor: JaeSung You
  • Patent number: 8507789
    Abstract: A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a substrate of a first conductive type having at least one via hole; an emitter layer only on at least a portion of the via hole and at least one selected from a group consisting of an incident surface and side surfaces of the substrate, the emitter layer having a second conductive type opposite the first conductive type; at least one first electrode on the incident surface, the first electrode being electrically connected to the emitter layer; a second electrode connected to an opposite surface to the incident surface; and at least one first electrode current collector on the opposite surface, the at least one first electrode current collector being insulated from the second electrode and being electrically connected to the at least one first electrode through the via hole.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: August 13, 2013
    Assignee: LG Electronics Inc.
    Inventors: Jihoon Ko, Juwan Kang, Jonghwan Kim, Daehee Jang
  • Patent number: 8501519
    Abstract: A method of production of a CIS-based thin film solar cell comprises the steps of forming an alkali control layer on a high strain point glass substrate, forming a back surface electrode layer on the alkali control layer, forming a CIS-based light absorption layer on the back surface electrode layer, and forming an n-type transparent conductive film on the CIS-based light absorption layer, wherein the alkali control layer is formed to a thickness which allows heat diffusion of the alkali metal which is contained in the high strain point glass substrate to the CIS-based light absorption layer and, furthermore, the CIS-based light absorption layer has an alkali metal added to it from the outside in addition to heat diffusion from the high strain point glass substrate.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: August 6, 2013
    Assignee: Showa Shell Sekiyu K.K.
    Inventors: Hideki Hakuma, Tetsuya Aramoto, Yoshiyuki Chiba, Yoshiaki Tanaka
  • Patent number: 8487344
    Abstract: Disclosed is an optical device including an optical member and a contact layer stacked on at least one of top and bottom surfaces of the optical member. The contact layer has at least one transparent conducting oxynitride (TCON) layer. The TCON consists of at least one of indium (In), tin (Sn), zinc (Zn), cadmium (Cd), gallium (Ga), aluminum (Al), magnesium (Mg), titanium (Ti), molybdenum (Mo), nickel (Ni), copper (Cu), silver (Ag), gold (Au), platinum (Pt), rhodium (Rh), iridium (Ir), ruthenium (Ru), and palladium (Pd).
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: July 16, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Tae-Yeon Seong
  • Patent number: 8481996
    Abstract: The present invention relates to a photodiode, comprising a photo-active layer which layer comprises at least one electron donating material, and at least one fullerene derivative as an electron accepting material. The present invention further relates to a method for making such a photo diode, to a photo-active layer and to a fullerene derivative.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: July 9, 2013
    Assignee: Rijksuniversiteit Groningen
    Inventors: Jan Cornelis Hummelen, René Albert Johan Janssen, Joop Knol, Martinus Maria Wienk, Johannes Martinus Kroon, Wilhelmus Johannus Hermanus Verhees
  • Patent number: 8481847
    Abstract: A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a substrate of a first conductive type having at least one via hole; an emitter layer only on at least a portion of the via hole and at least one selected from a group consisting of an incident surface and side surfaces of the substrate, the emitter layer having a second conductive type opposite the first conductive type; at least one first electrode on the incident surface, the first electrode being electrically connected to the emitter layer; a second electrode connected to an opposite surface to the incident surface; and at least one first electrode current collector on the opposite surface, the at least one first electrode current collector being insulated from the second electrode and being electrically connected to the at least one first electrode through the via hole.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: July 9, 2013
    Assignee: LG Electronics Inc.
    Inventors: Jihoon Ko, Juwan Kang, Jonghwan Kim, Daehee Jang
  • Patent number: 8477125
    Abstract: An organic light-emitting display includes a substrate, a thin film transistor on the substrate, an organic light-emitting diode electrically connected to the thin film transistor, and a photo sensor having a plurality of photo diodes connected to one another in parallel.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: July 2, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hye Hyang Park, Byoung Deog Choi, Sun A Yang, Youn Chul Oh, Eun Jung Lee, Won Seok Kang
  • Patent number: 8471317
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer, wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: June 25, 2013
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8466003
    Abstract: Embodiments of the current invention describe methods of forming different types of crystalline silicon based solar cells that can be combinatorially varied and evaluated. Examples of these different types of solar cells include front and back contact silicon based solar cells, all-back contact solar cells and selective emitter solar cells. These methodologies all incorporate the formation of site-isolated regions using a combinatorial processing tool and the use of these site-isolated regions to form the solar cell area. Therefore, multiple solar cells may be rapidly formed on a single crystalline silicon substrate for use in combinatorial methodologies. Any of the individual processes of the methods described may be varied combinatorially to test varied process conditions or materials.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: June 18, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Jian Li, James Craig Hunter, Nikhil Kalyankar, Nitin Kumar, Minh Anh Anh Nguyen
  • Patent number: 8450720
    Abstract: A method of fabricating a frontside-illuminated inverted quantum well infrared photodetector may include providing a quantum well wafer having a bulk substrate layer and a quantum material layer, wherein the quantum material layer includes a plurality of alternating quantum well layers and barrier layers epitaxially grown on the bulk substrate layer. The method further includes applying at least one frontside common electrical contact to a frontside of the quantum well wafer, bonding a transparent substrate to the frontside of the quantum well wafer, thinning the bulk substrate layer of the quantum well wafer, and etching the quantum material layer to form quantum well facets that define at least one pyramidal quantum well stack. A backside electrical contact may be applied to the pyramidal quantum well stack. In one embodiment, a plurality of quantum well stacks is bonded to a read-out integrated circuit of a focal plane array.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: May 28, 2013
    Assignee: L-3 Communications Cincinnati Electronics Corporation
    Inventors: David Forrai, Darrel Endres, Robert Jones, Michael James Garter
  • Patent number: 8450773
    Abstract: A photodetector is disclosed for the detection of infrared light with a long cutoff wavelength in the range of about 4.5-10 microns. The photodetector, which can be formed on a semiconductor substrate as an nBn device, has a light absorbing region which includes InAsSb light-absorbing layers and tensile-strained layers interspersed between the InAsSb light-absorbing layers. The tensile-strained layers can be formed from GaAs, InAs, InGaAs or a combination of these III-V compound semiconductor materials. A barrier layer in the photodetector can be formed from AlAsSb or AlGaAsSb; and a contact layer in the photodetector can be formed from InAs, GaSb or InAsSb. The photodetector is useful as an individual device, or to form a focal plane array.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: May 28, 2013
    Assignee: Sandia Corporation
    Inventors: Jin K. Kim, Samuel D. Hawkins, John F. Klem, Michael J. Cich
  • Publication number: 20130126941
    Abstract: A semiconductor optical device includes a first clad layer, a second clad layer and an optical waveguide layer sandwiched between the first clad layer and the second clad layer, wherein the optical waveguide layer includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer and extending in one direction, and a third semiconductor layer covering a top surface of the second semiconductor layer, and wherein the first semiconductor layer includes an n-type region disposed on one side of the second semiconductor layer, a p-type region disposed on the other side of the second semiconductor layer, and an i-type region disposed between the n-type region and the p-type region, and wherein the second semiconductor layer has a band gap narrower than band gaps of the first semiconductor layer and the third semiconductor layer.
    Type: Application
    Filed: September 13, 2012
    Publication date: May 23, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Lei Zhu, Shigeaki Sekiguchi, Shinsuke Tanaka, Kenichi Kawaguchi
  • Publication number: 20130112256
    Abstract: A photovoltaic device operable to convert light to electricity, comprising a substrate, one or more structures essentially perpendicular to the substrate, and a wavelength-selective layer disposed on the substrate, wherein the structures comprise a crystalline semiconductor material.
    Type: Application
    Filed: November 3, 2011
    Publication date: May 9, 2013
    Inventors: Young-June YU, Munib WOBER
  • Patent number: 8431425
    Abstract: A method for fabricating an image sensor is provided. A substrate is provided, and then a plurality of photoresist patterns is formed on the substrate. The photoresist patterns are arranged in a first array and defined by a plurality of photomask patterns arranged as a photomask pattern array, wherein a top view of each photoresist pattern has a substantially square shape and a distance between two neighboring photoresist patterns decreases from a center of the first array toward an edge of the first array. Besides, each photomask pattern includes a transparent portion and an opaque portion, wherein an area proportion of the transparent portion included in a photomask pattern increases from the center toward the edge of the photomask pattern array. Then, a thermal reflow step is performed to convert the photoresist patterns into a plurality of microlenses arranged in a second array.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: April 30, 2013
    Assignee: United Microelectronics Corp.
    Inventor: Cheng-Yu Hsieh
  • Patent number: 8431976
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk) so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: April 30, 2013
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Patent number: 8426864
    Abstract: The infrared sensor (1) includes a base (10), and an infrared detection element (3) formed over a surface of the base (10). The infrared detection element (3) comprises an infrared absorption member (33) in the form of a thin film configured to absorb infrared, and a temperature detection member (30) configured to measure a temperature difference between the infrared absorption member (33) and the base (10). The temperature detection member (30) includes a p-type polysilicon layer (35) formed over the infrared absorption member (33) and the base (10), an n-type polysilicon layer (34) formed over the infrared absorption member (33) and the base (10) without contact with the p-type polysilicon layer (33), and a connection layer (36) configured to electrically connect the p-type polysilicon layer (35) to the n-type polysilicon layer (34). Each of the p-type polysilicon layer (35) and the n-type polysilicon layer (34) has an impurity concentration in a range of 1018 to 1020 cm?3.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: April 23, 2013
    Assignee: Panasonic Corporation
    Inventors: Koji Tsuji, Yosuke Hagihara, Naoki Ushiyama
  • Patent number: 8426883
    Abstract: Provided are a light emitting device, a method for fabricating the light emitting device, a light emitting device package, and a lighting unit. The light emitting device includes a conductive support substrate, a protection layer on the conductive support substrate, the protection layer having an inclined top surface, a light emitting structure layer including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer on the conductive support substrate and the protection layer, and an electrode on the light emitting structure layer. A portion of the protection layer is disposed between the conductive support substrate and the light emitting structure layer.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: April 23, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kyung Wook Park, Myung Hoon Jung