Abstract: One embodiment of the present invention provides a proximity I/O switch, which is configured to transfer data between the components in a computer system. This proximity I/O switch is comprised of multiple switch chips, which are coupled together through capacitive coupling. This enables the multiple switch chips to communicate with each other without being constrained by the limitations of conventional non-capacitive communication mechanisms. The multiple switch chips in the proximity I/O switch are also configured to communicate with components in the computer system through conventional non-capacitive communication mechanisms.

Abstract: A vertical color filter detector group with highlight detector for generating data for a picture element. In one embodiment, the detector group includes three photodiodes each having its own spectral sensitivity and saturation exposure level and a highlight diode having a highlight saturation exposure level. The three photodiodes are located substantially each above or below the others in a semiconductor substrate with the highlight diode in close physical proximity thereto. The four diodes react to light exposure at about the same time as one another. The saturation exposure levels of the three photodiodes are about equal to each other and the highlight saturation exposure level is higher than each of the other three levels. The highlight diode may not be directly exposed to light, but it is close enough to the exposed photodiode region to collect some photoelectrons that are not collected by the three photodiodes.

Abstract: A programmable resistance memory element comprising an adhesion layer between the programmable resistance material and at least one of the electrodes. Preferably, the adhesion layer is a titanium rich titanium nitride composition.

Abstract: The driving device of a solid-state imaging device comprises a driving unit for driving the solid-state imaging device in either an addition driving mode in which a plurality of pixels are added and read as a single pixel or a non-addition driving mode, and a substrate bias voltage supply for applying a bias voltage to the substrate of the solid-state imaging device according to the driving mode. The substrate bias voltage is set according to the number of pixels added in the addition driving mode so that the overflow level of the charge accumulating portion may be lower in the addition driving mode than in the normal driving mode. This suppresses the input of excess charges to the horizontal transfer path even in the addition driving mode, thereby preventing the generation of horizontal streak noise.

Abstract: In a CCD sensor in which electric charges derived from a plurality of detecting elements 2 are outputted from a signal output portion 9, two diffusion portions 22A and 22B are provided in a parallel manner to each other in the signal output portion 9, and electric charges outputted from a designated detecting element 2 are accumulated into one diffusion portions 22A so as to output the accumulated electric charges. Even in such a case that signal levels derived from detecting elements are low, such a CCD sensor capable of performing a high-precision measuring operation is provided, while a dynamic range of the CCD sensor is widened.

Abstract: A solid-state imaging device includes a plurality of vertical charge transferring portions, and a horizontal charge transferring portion connected to at least one end of each of the vertical charge transferring portions.

Abstract: A solid-state imaging device comprises an image pickup unit having unit cells including opto-electrical converter elements, said unit cells being disposed in a two-dimensional array, a selection line made of polysilicon for selectively determining the unit cells in the same row within the image pickup unit, a read-out line made of polysilicon for reading out an electric charge accumulated in the opto-electrical converter elements of the unit cells in the same row within the image pickup unit, a signal line transmitting pixel signals produced from the unit cells in the same row within the image pickup unit, a reset line made of polysilicon for discharging the unit cells in the same row within the image pickup unit down to a desired voltage level, a driver circuit located on one side of the image pickup unit for supplying drive signals to the read-out line, the selection line, and the reset line, respectively, and a read-out auxiliary wiring disposed along at least the read-out line and electrically connected t

Abstract: A circuit for processing charge detecting signals transferred to a floating diffusion amplifier from a charge coupled device includes a first node connected to the floating diffusion amplifier; a first enhancement type FET connected in series between a first fixed-voltage supply line for supplying a first fixed voltage and an output terminal, where the first enhancement type FET has a first gate connected to the first node; and a second enhancement type FET connected in series between a second fixed-voltage supply line for supplying a second fixed voltage and the output terminal, where the second enhancement type FET has a second gate supplied with a third fixed voltage which is different in potential from the second fixed voltage.

Abstract: A pixel sensor cell for use in a CMOS imager exhibiting improved storage capacitance. The source follower transistor is formed with a large gate that has an area from about 0.3 ?m2 to about 10 ?m2. The large size of the source follower gate enables the photocharge collector area to be kept small, thereby permitting use of the pixel cell in dense arrays, and maintaining low leakage levels. Methods for forming the source follower transistor and pixel cell are also disclosed.

Abstract: A double-slope MOS active pixel sensor disposed on a semiconductor substrate has a first light-to-output-voltage transfer gain up to a first charge accumulation threshold, has a second light-to-output-voltage transfer gain lower than the first light-to-output-voltage transfer gain above the light accumulation threshold, and comprises first and second photodiodes each having a first terminal coupled to a fixed potential and a second terminal. The second photodiode is smaller than the first photodiode. First and second semiconductor reset switches each have a first terminal coupled respectively to the second terminal of the first and second photodiodes and a second terminal coupled respectively to first and second reset potentials that reverse bias the photodiodes. First and second semiconductor amplifiers each have an input coupled respectively to the second terminals of the first and second photodiodes and have their outputs coupled together.

Abstract: A color linear image sensor device has a shutter function for selectively draining charges stored in a photodetector circuit. The color linear image sensor device includes first, second, and third linear image sensors having different sensitivities with respect to incident light and arranged successively in sensitivity decreasing order from the outermost, and a shutter gate and a shutter drain for adjusting an amount of exposure to the linear image sensor which has the highest sensitivity to incident light.

Abstract: A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical transfer register is provided for each of columns of said light receiving portions. The first and third transfer electrodes of the first layer are alternately arranged in a charge transfer direction, and the adjacent two of the first and third transfer electrodes extend in parallel to each other between the light receiving portions. With this solid-state image pickup device, the accumulated charge capacity of each transfer region composed of the adjacent transfer electrodes for two-phases is equalized and the area of the light receiving portion is increased irrespective of variations in processed dimension between the transfer electrodes.

Abstract: A CCD type solid state image pickup device having: a number of photoelectric conversion elements formed in and on the semiconductor substrate in a matrix configuration of rows and columns; a plurality of VCCDs each having a vertical channel region formed along each column of the photoelectric conversion elements, and charge transfer electrodes formed above the vertical channel region; an HCCD having a horizontal channel region coupled to one ends of the VCCDs, and charge transfer electrodes formed above the horizontal channel region; a floating diffusion formed in the semiconductor substrate and coupled to one end of the HCCD; and an input gate electrode of an output amplifier having a portion extending at least near to the floating diffusion, and the input gate electrode being thinner than the charge transfer electrodes.

Abstract: A pixel cell having two capacitors connected in series where each capacitor has a capacitance approximating that at of the periphery capacitors and such that the effective capacitance of the series capacitors is smaller than that of each of the periphery capacitors. The series-connected capacitors are coupled to the floating diffusion (FD) region for receiving “surplus” charge from the FD region during saturation conditions.

Abstract: A solid-state image sensor comprising an effective pixel area having light receiving portions which perform photoelectric conversion by taking in light and an optical black area which forms a reference black level without taking in light. The light receiving portions are formed inside electrode opening port portions which are formed through an electrode. Electrode opening port portions in the optical black area which are formed through the electrode are formed narrower than the electrode port portions in the effective pixel area. Alternatively, there may be no opening port portions formed in the optical black area.

Abstract: A semiconductor device is provided, which includes a pair of differential transistors that convert a voltage difference between a first input terminal and a second input terminal into a drain current difference between a first transistor and a second transistor and in which a voltage range of the first input terminal or the second input terminal is wide. A SOI structure MOSFET is used as each of the pair of differential transistors. The MOSFET includes a general MOSFET structure including a source region, a drain region, a well region between both the regions, a gate oxide film on an upper surface of the well region, and a gate electrode on the gate oxide film, and further includes a first conductivity type substrate region under the source region, the drain region and the well region through a buried oxide film.

Abstract: A field effect transistor device and a method for making a field effect transistor device are disclosed. The field effect transistor device includes a stripe trench extending from the major surface of a semiconductor substrate into the semiconductor substrate to a predetermined depth. The stripe trench contains a semiconductor material of the second conductivity type to form a PN junction at an interface formed with the semiconductor substrate.

Abstract: In accordance with an embodiment of the present invention, a MOSFET includes a first semiconductor region of a first conductivity type, a gate trench which extends into the first semiconductor region, and a source trench which extends into the first semiconductor region. The source trench is laterally spaced from the gate trench.

Abstract: A triple-slope MOS active pixel sensor disposed on a semiconductor substrate comprises first and second capacitive storage elements each having a first terminal connected to a fixed potential and a second terminal. First and second photodiodes each have a first terminal connected to a fixed potential and a second terminal. The second photodiode is smaller than the first photodiode. First and second semiconductor reset switches each have a first terminal connected respectively to the second terminal of the first and second photodiodes and a second terminal connected respectively to first and second reset potentials that reverse bias the photodiodes. First and second semiconductor transfer switches each have a first terminal connected respectively to the second terminals of the first photodiode and a second terminal connected respectively to the second terminals of the first and second capacitive storage elements.

Abstract: An imaging system includes an array of pixel sensors and a mode control circuit. The array of pixel sensors is adapted to furnish logarithmically encoded indications of light intensities during a first mode and furnish linearly encoded indications of the light intensities during a second mode. The mode control circuit is adapted to selectively place the array in one of the first and second modes. The imaging system may include more than one array, and the mode control circuit may configure one of the arrays. The imaging system may include a camera, for example, that includes the array(s) and mode control circuit.

Abstract: A wavelength selective detector having a first absorbing layer for absorbing light with a wavelength below a lower band cutoff, a second absorbing layer downstream of the first absorbing layer for absorbing light with a wavelength below an upper band cutoff, and a confinement layer situated between the first and second absorbing layers. The lower and upper band cutoffs can be set by controlling the bandgaps and/or thicknesses of the first and second absorbing layers. The wavelength selective detector of the present invention has a good out-of-band rejection, a narrow spectral responsivity, and a high in-band responsivity. In addition, the wavelength selective detector is relatively easy to manufacture using conventional integrated circuit fabrication techniques.

Abstract: The present invention provides a solid-state image sensor wherein the color shading is decreased, and/or a solid-state image sensor wherein the shading effect is outstanding. Moreover, the invention provides a digital camera having the solid-state image sensor. The solid-state image sensor of the present invention has color filters and/or apertures of a light blocking layer, and the center of the color filters and/or the center of the apertures of the light blocking layer is offset with respect to the center of a light-receiving part, in the direction to the center of a valid cell area. In each photodetecting cell of a preferred solid-state image sensor, micro-lenses are further placed on the light-receiving side of the solid-state image sensor, and preferably, the center of the micro-lens is similarly offset with respect to the center of the light-receiving part. Also, the digital camera is mounted with an above-described solid-state image sensor.

Abstract: A solid-state imaging device includes an imaging area including a plurality of pixels arranged in columns and rows, and peripheral circuitry for selecting at least one of the pixels. Each said pixel includes: a photoelectric transducer for creating electric charges by photoelectric conversion and storing the charges therein; means for storing the charges read out from the photoelectric transducer; a transfer electrode, provided between the photoelectric transducer and the storage means, for reading out the charges from the photoelectric transducer to the storage means; an amplifier for sensing a variation in potential in the storage means; and a reset electrode for discharging the charges, stored in the storage means, to a power supply, thereby resetting the potential in the storage means.

Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.

Abstract: Disclosed is a color linear image sensor having a small line-to-line distance, which comprises signal charge storage sections adjacent to light receiving sections. Signal charges are read by signal charge reading sections from the signal charge storage sections to signal charge transfer sections, and thereby residual images are prevented from being generated. Each of the signal charge reading sections is electrically connected with a portion of the signal charge transfer section which is adjacent to the signal charge reading section, and driving pulses are made common (&phgr;1 (TG)). Alternatively, each of the signal charge storage sections is electrically connected with a portion of the signal charge transfer section which is not adjacent to the signal charge reading section, and driving pulses are made common ((&phgr;2 (ST)). Accordingly, the number of wiring lines (pulse lines) arranged between the light receiving sections of respective colors is reduced by one.

Abstract: The invention is regarding to solid-state imaging device.

Abstract: Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.

Abstract: In an image sensing array, the structure of the image sensor pixel is based on a vertical punch through transistor with a junction gate surrounding its source and connected to it, the junction gate being further surrounded by an MOS gate. The new pixel has a large conversion gain, high dynamic range, blooming protection, and low dark current. It senses charge nondestructively with a complete charge removal, which avoids generation of kTC noise. The pixel fabrication is compatible with CMOS processing that includes two metal layers. The array also includes the pixel reset through column sense lines, polysilicon field plate in the image-sensing area for improved pixel isolation, denser pixel packing, and either n-channel or p-channel addressing transistor.

Abstract: A pixel site of a semiconductor imager structure includes a substrate layer of a first dopant type; a photodiode being formed of a doped well region within the substrate layer, the doped well region being of a second dopant type; a transistor wherein a terminal of the transistor being provided within the doped well region, the terminal of the transistor being of the second dopant type and of a dopant concentration greater than a dopant concentration of the doped well region; and an oxide layer formed over the substrate layer, the doped well region, and the terminal of the transistor. The oxide layer has a varying height such that a height of the oxide layer associated with the doped well region is thicker than a height of the oxide layer associated with the terminal of the transistor. The oxide layer includes a step region being located where the height of the oxide layer transitions from the height associated with the doped well region to the height associated with the terminal of the transistor.

Abstract: A high-concentration light-receiving N-layer 32 is formed by ion implantation in a region near a substrate surface, and a low-concentration N-type epitaxial layer 25 is formed by epitaxial growth in a deeper region. The depletion layer of a photodiode is thus expanded to a deep portion of the substrate by the low-concentration N-type region 25, by which a photoelectric conversion effect on incident light of a long wavelength is increased to improve sensitivity. In the above stage, a deepest potential portion is formed on the substrate surface side. Therefore, a depletion voltage can be prevented from rising. Further, an intermediate-concentration N-type epitaxial layer 23 and a high-concentration N-type epitaxial layer 22 are formed in a stack of two layers by epitaxial growth in a region deeper than a region in which a first P-type layer 24, or a barrier region is formed, by which a shutter voltage can be prevented from rising.

Abstract: An optoelectronic component has a lens that is formed in the surface of an encapsulant surrounding a semiconductor diode element. With respect to emitters, the lens reduces internal reflection and reduces dispersion to increase overall efficiency. With respect to detectors, the lens focuses photons on the active area of the detector, increasing detector sensitivity, which allows a detector having a reduced size and reduced cost for a given application. The lens portion of the encapsulant is generally non-protruding from the surrounding portions of the encapsulant reducing contact surface pressure caused by the optoelectronic component. This non-protruding lens is particularly useful in pulse oximetry sensor applications. The lens is advantageously formed with a contoured-tip ejector pin incorporated into the encapsulant transfer mold, and the lens shape facilitates mold release.

Abstract: An image sensor includes a plurality of unit pixels for sensing a light beam to generate an image data. Each of the unit pixels includes, a photoelectric element for sensing a light beam incident thereto and generating photoelectric charges, a transistor including a gate dielectric formed adjacent to the photoelectric element and a gate electrode formed on top of the gate dielectric and a capacitor structure including an insulating film formed on a portion of the photoelectric element and a bottom electrode, wherein the insulating film and the gate dielectric are made of a same material and the bottom electrode and the gate electrode are made of a same material.

Abstract: The present invention provides a solid-state image sensor wherein the color shading is decreased, and/or a solid-state image sensor wherein the shading effect is outstanding. Moreover, the invention provides a digital camera having the solid-state image sensor. The solid-state image sensor of the present invention has color filters and/or apertures of a light blocking layer, and the center of the color filters and/or the center of the apertures of the light blocking layer is offset with respect to the center of a light-receiving part, in the direction to the center of a valid cell area. In each photodetecting cell of a preferred solid-state image sensor, micro-lenses are further placed on the light-receiving side of the solid-state image sensor, and preferably, the center of the micro-lens is similarly offset with respect to the center of the light-receiving part. Also, the digital camera is mounted with an above-described solid-state image sensor.

Abstract: A new High Dynamic Range charge detection concept useful for CCD and Active Pixel CMOS image sensors uses at least one transistor operating in a punch through mode for the charge detection node reset. The punch through operation significantly reduces the reset feed through which leads to a higher voltage swing available on the node for the signal. This in turn allows building smaller and thus more sensitive charge detection nodes. The undesirabe artifacts, associated with the incomplete reset that are induced by the punch through operation, are completely removed by incorporating the CDS signal processing method into the signal processing chain. The incomplete reset artifact removal by the CDS technique is extended to all other resetting concepts that are modeled by a large reset time constant. The punch through concept is suitable for resetting Floating Diffusion charge detection nodes as well as Floating Gate charge detection nodes.

Abstract: The present invention is a structure for a fast-dump gate (FDG) and a fast-dump drain (FDD) for a charge coupled device. It is envisioned that the charge coupled device be a horizontal readout register of a solid-state image sensor. This structure uses a third layer of polysilicon (or other suitable gate material) to form the fast-dump gate which is in addition to the other two layers of gate material used to form the gates in the horizontal readout register. This allows the channel region under the fast-dump gate (FDG) to form without the use of highly-doped channel stop regions thereby eliminating any potential wells or barriers that may result in transfer inefficiency often time found with other structures.

Abstract: The invention relates to a CCD of the buried-channel type comprising a charge-transport channel in the form of a zone (12) of the first conductivity type, for example the n-type, in a well (13) of the opposite conductivity type, in the example the p-type. In order to obtain a drift field in the channel below one or more gates (9, 10a) to improve the charge transfer, the well is provided with a doping profile, so that the average concentration decreases in the direction of charge transport. Such a profile can be formed by covering the area of the well during the well implantation with a mask, thereby causing fewer ions to be implanted below the gates (9, 10a) than below other parts of the channel. By virtue of the invention, it is possible to produce a gate (10a) combining a comparatively large length, for example in the output stage in front of the output gate (9) to obtain sufficient storage capacity, with a high transport rate.

Abstract: An active pixel cell includes electronic shuttering capability. The cell can be “shuttered” to prevent additional charge accumulation. One mode transfers the current charge to a storage node that is blocked against accumulation of optical radiation. The charge is sampled from a floating node. Since the charge is stored, the node can be sampled at the beginning and the end of every cycle. Another aspect allows charge to spill out of the well whenever the charge amount gets higher than some amount, thereby providing anti blooming.

Abstract: An electronic component having an image sensing device (41, 71, 86, 132, 182, 212) and a method for improving pixel charge transfer in the image sensing device (41, 71, 86, 132, 182, 212). The image sensing device (41, 71, 86, 132, 182, 212) has a transfer gate (42, 82) between a source region (43, 83) and an image sensing region. The image sensing region is formed to have a wider device width proximate to the transfer gate (42, 82) than at a point distal from the transfer gate (42, 82).

Abstract: A CCD area sensor has an effective pixel region for detecting optical information of a subject and an ineffective pixel region for detecting optical black. On a light-receiving region in the ineffective pixel region, a light shielding film is provided with an opening portion. This enables hydrogen ions to be sufficiently diffused from a passivation film made of a P—SiN film toward a silicon substrate in a hydrogen annealing process even though the light shielding film is made of a material such as a high-melting point metal of TiW that is hard for hydrogen ions to penetrate. As a result, interface state densities in a light-receiving region and a transfer channel region are reduced, and a dark-time output voltage of the ineffective pixel region is reduced to be equivalent to that of the effective pixel region. Thus, no difference occurs between the effective pixel region and the ineffective pixel region in terms of the black level.

Abstract: A solid state imaging apparatus includes a detection capacitor storing a signal charge, and an output amplifier including a plurality of transistors, and outputting the signal charge stored in the detection capacitor as a voltage signal. A gate electrode of one of the plurality of transistors as an input transistor is connected to the detection capacitor. Also, the plurality of transistors other than the input transistor has a thinner gate insulating film than the input transistor.

Abstract: An active photodiode CMOS image sensor comprising a light-sensitive photodiode region, a transistor and a cover layer. The light-sensitive region is formed in a substrate body and the transistor is formed above the substrate body. The source region of the transistor is connected to the light-sensitive region. The cover layer is formed above the light-sensitive photodiode region using a method similar to method used to form the gate dielectric layer.

Abstract: A charge transfer device has a charge transfer region under charge transfer electrodes for stepwise conveying charge packets through potential wells to a floating diffusion region, and the charge transfer region has a boundary sub-region contracting toward the floating diffusion region, wherein the final potential well is created at a certain portion in said boundary sub-region close to the floating diffusion region so that each charge packet travels over a short distance, thereby enhancing a charge transfer efficiency.

Abstract: It is an object of the present invention to provide an inverter circuit including a power arm ensuring a high breakdown voltage and having low probability of malfunction. In a power arm element consisting of a switching element and a diode connected in inverse-parallel connection thereto, n free wheeling diodes (n≧2) connected in series are connected in inverse-parallel connection to a switching element (1b). A breakdown voltage between an anode and a cathode of each free wheeling diode is defined to be 1/n of a breakdown voltage of the switching element (1b). That is, the breakdown voltage of each free wheeling diode is reduced to 1/n to reduce a thickness of a n− drift region. A transient voltage characteristic during flow of a free wheeling current can be thereby kept low. The drop in the breakdown voltage is compensated with the n free wheeling diodes connected in series, to thereby ensure breakdown voltage of a degree approximately the same as that of the switching element.

Abstract: A solid-state imaging device includes a second conductive type impurity region formed in a first conductive type semiconductor substrate in an area corresponding to a pixel area, a high-resistivity semiconductor layer of the first conductive type formed on the semiconductor substrate including the impurity region, and an ion-implanted region of the first conductive type formed in at least one of the semiconductor substrate and the high-resistivity semiconductor layer in a peripheral area other than the pixel area. A method of fabricating the solid-state imaging device is also disclosed.

Abstract: The film thickness of a second oxide film 105 is set to be larger than that of a first gate oxide film 103 in such a way that, when the identical voltage is applied to both of electrodes, the channel potentials under respective electrodes are ±0.2 V or less. The second gate oxide film 105 is formed by the CVD method and the like.

Abstract: In a solid state image pickup device of the invention, photoelectric transforming regions in each of which a plurality of photoelectric transforming parts are arranged at predetermined intervals in a first predetermined direction and charge transfer regions extending in the first direction are alternately arranged in a second predetermined direction which perpendicularly crosses the first predetermined direction. There are also provided bridge regions formed in regions sandwiched by two photoelectric transforming parts in order to connect the charge transfer regions neighboring in the second predetermined direction. The bridge region has: a first bridge wiring extending in the second predetermined direction; an oxide film formed so as to cover the periphery of the first bridge wiring; and second and forth bridge wirings formed via the oxide film on the side wall part of the first bridge wiring in the first predetermined direction.

Abstract: A solid-state imaging device comprises a plurality of pixels, each pixel comprising a semiconductor substrate of a first conductivity type; a photo-receiving portion of a second conductivity type formed in the semiconductor substrate; a detecting portion of the second conductivity type formed in the semiconductor substrate; an insulating film formed on the semiconductor substrate; a transfer gate electrode formed on the insulating film at lest between the photo-receiving portion and the detecting portion; and a read-out circuit, which is electrically connected to the detecting portion. A diffusion region of the same conductivity type as the detecting portion is formed in a region of the semiconductor substrate that is adjacent to an end of the detecting portion near the gate electrode and separate from the photo-receiving portion. An impurity concentration in the photo-receiving portion and an impurity concentration in the diffusion region are lower than an impurity concentration in the detecting portion.

Abstract: A solid state image sensing device formed on a substrate includes a transfer electrode having a first layer of polychrystalline silicon and a second layer of silicon nitride. The silicon nitride layer has a higher refractive index than an interlayer insulation film formed of silicon oxide, which allows light of shorter wavelengths, such as blue light, to reach light receiving pixels beyond the transfer electrode. The image sensing device has an improved sensitivity to shorter wavelength light.

Abstract: In the present invention, a charge transfer unit is arranged on a first-plane side of a thinly-formed semiconductor base. Charge accumulating units are arranged on a second-plane side, the opposite side. A depletion prevention layer is arranged closer to the second-plane side than the charge accumulating units. The depletion prevention layer prevents a depletion region around the charge accumulating units from reaching the second plane of the semiconductor base. The depletion prevention layer can suppress surface dark current going into the charge accumulating units. Meanwhile, an energy ray incident from the second-plane side pass through the depletion prevention layer to generate signal charges in the charge accumulating units (depletion regions). The charge accumulating units collect, on a pixel-by-pixel basis, the signal charges which are to be transported to the charge transfer unit under voltage control or the like, and then are read to exterior as image signals.

Abstract: A power semiconductor containing an anode disposed on either a top side or a bottom side is described. A cathode is disposed on the side that is unoccupied by the anode, and edge terminations are provided on the top side. The power semiconductor is characterized in that at least one region extends from an edge termination on the top side to a semiconductor region on the bottom side in order to form an ohmic connection, and is characterized in that this at least one region is doped with sulfur.