Abstract: A semiconductor device and a method of fabricating thereof are disclosed. The method of fabricating a semiconductor device includes: forming a trench fill structure in a substrate in a pixel area; covering a buffer dielectric layer over a surface of the substrate in the pixel area, the buffer dielectric layer burying the trench fill structure; etching the buffer dielectric layer to form a first opening, which exposes at least a portion of the substrate surrounding sidewalls of a top of the trench fill structure and/or at least a portion of the top of the trench fill structure; and forming a metal grid layer on the buffer dielectric layer, wherein the metal grid layer fills the first opening and is electrically connected to the exposed portion of the substrate and/or the exposed portion of the trench fill structure.

Abstract: Disclosed herein is a detector having a pixel in a substrate and configured to detect radiation particles incident thereon; a first guard ring in the substrate, surrounding the pixel, and comprising a first doped semiconductor region in the substrate and a first electrically conductive layer in electrical contact to the first doped semiconductor region. The first electrically conductive layer overhangs the first doped semiconductor region toward an interior of the first guard ring.

Abstract: A photo-detecting apparatus is provided. The photo-detecting apparatus includes a carrier conducting layer having a first surface; an absorption region is doped with a first dopant having a first conductivity type and a first peak doping concentration, wherein the carrier conducting layer is doped with a second dopant having a second conductivity type and a second peak doping concentration, wherein the carrier conducting layer comprises a material different from a material of the absorption region, wherein the carrier conducting layer is in contact with the absorption region to form at least one heterointerface, wherein a ratio between the first peak doping concentration of the absorption region and the second peak doping concentration of the carrier conducting layer is equal to or greater than 10; and a first electrode and a second electrode both formed over the first surface of the carrier conducting layer.

Abstract: A photosensitive unit and a photo-insensitive unit are formed in a substrate. A lens is formed to cover the photosensitive unit and the photo-insensitive unit, and the lens has a single radius of curvature and an optical axis passing through a surface of the curvature at the center of the lens. The photosensitive unit is disposed at a first side of the optical axis and the photo-insensitive unit is disposed at a second side opposite to the first side of the optical axis, a light beam passing through the lens is simultaneously incident into the photosensitive unit and the photo-insensitive unit without being blocked, and the photosensitive unit detects the light beam while the photo-insensitive unit is ineffective in sensing the light beam. A conductive feature is formed over the substrate between the photosensitive unit and the photo-insensitive unit, wherein the optical axis of the lens passes the conductive feature.

Abstract: An optical phase shifter may include a waveguide core that has a top surface, and a semiconductor contact that is laterally displaced relative to the waveguide core and is electrically connected to the waveguide core. A top surface of the semiconductor contact is above the top surface of the waveguide core. The waveguide core may include a p-type core region and an n-type core region. A p-type semiconductor region may be in physical contact with the n-type core region of the waveguide core, and an n-type semiconductor region may be in physical contact with the p-type core region of the waveguide core. A phase shifter region and a light-emitting region may be disposed at different depth levels, and the light-emitting region may emit light from a phase shifter region that is in a position adjacent to the light-emitting region.

Abstract: A pixel circuit includes a transfer transistor is coupled between a photodiode and a floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A lateral overflow integration capacitor (LOFIC) includes an insulating region between a first metal electrode and a second metal electrode that is coupled to a first reset transistor and selectively coupled to the floating diffusion. A second reset transistor and a bias voltage source are coupled to the first metal electrode. During an idle period, the first reset transistor is configured to be on, the second reset transistor is configured to be off, and the bias voltage source is configured to provide a first bias voltage to the first metal electrode to reverse bias the LOFIC. The first bias voltage is less than a reset voltage provided from the reset voltage source.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor comprises a plurality of photodetectors disposed within a substrate. A metal grid layer is disposed over the substrate. The metal grid layer comprises a metal grid structure overlying a central pixel region of the substrate. The metal grid layer continuously extends from the central pixel region to a peripheral pixel region of the substrate that laterally encloses the central pixel region. An upper metal structure is disposed over the metal grid layer. The upper metal structure overlies the peripheral pixel region. The upper metal structure is laterally offset from the metal grid structure. A lower surface of the upper metal structure is disposed vertically over an upper surface of the metal grid structure.

Abstract: A solid-state image sensor includes a plurality of imaging element blocks each configured from a plurality of imaging elements. Each of the imaging elements includes a first electrode, a charge accumulating electrode arranged in a spaced relation from the first electrode, a photoelectric conversion portion contacting with the first electrode and formed above the charge accumulating electrode with an insulating layer interposed therebetween, and a second electrode formed on the photoelectric conversion portion. The first electrode and the charge accumulating electrode are provided on an interlayer insulating layer, and the first electrode is connected to a connection portion provided in the interlayer insulating layer.

Abstract: An imaging apparatus includes: a semiconductor substrate which includes a charge accumulation portion containing an impurity of a first conductivity type; a contact plug which is connected to the charge accumulation portion, contains an impurity of the first conductivity type, and is not silicide; a first insulating film which includes an upper wall located above the contact plug; and a second insulating film which includes a portion located above the upper wall. A material of the second insulating film is different from a material of the first insulating film, and the first insulating film is thinner than the second insulating film.

Abstract: A pixel includes: a detection node; a first normally on transistor connected between the detection node and a rail for applying a first potential; and a second transistor whose gate is connected to the detection node. An image sensor includes a plurality of the pixels and a control circuit configured to apply, during for a phase of initializing the detection node, the first potential to the gate of the first transistor.

Abstract: A solid-state imaging device includes: a pixel region in which a plurality of pixels composed of a photoelectric conversion section and a pixel transistor is arranged; an on-chip color filter; an on-chip microlens; and a multilayer interconnection layer in which a plurality of layers of interconnections is formed through an interlayer insulating film. The solid-state imaging device further includes a light-shielding film formed through an insulating layer in a pixel boundary of a light receiving surface in which the photoelectric conversion section is arranged.

Abstract: A photoelectric conversion apparatus comprises a semiconductor layer including a first surface and a second surface, a first semiconductor region of a first conductivity type arranged in the semiconductor layer and configured to accumulate a signal charge generated by incident light, a second semiconductor region of the first conductivity type arranged in the semiconductor layer, a first transfer electrode configured to transfer the signal charge accumulated in the first semiconductor region to the second semiconductor region, a third semiconductor region of a second conductivity type arranged between the second semiconductor region and the second surface, and a fourth semiconductor region of the second conductivity type arranged between the third semiconductor region and the second surface. The third semiconductor region at least partially overlaps, in orthographic projection to the first surface, the second semiconductor region and the fourth semiconductor region.

Abstract: Shared-readout pixels conventionally disposed in two or more physical columns of a pixel array are spatially interleaved (merged) within a single physical column to yield a pixel array in which each physical pixel column includes two or more logical columns of shared-readout pixels coupled to respective logical-column output lines.

Abstract: A method for forming contacts applied to a CMOS image sensor includes: forming a transmission gate structure; performing source and drain ion implantation processes to form source and drain; forming auxiliary sidewalls on the outer sides of the gate sidewalls, the material of the auxiliary sidewalls being the same as the material of the adjacent gate sidewalls; sequentially forming a silicide block layer, a contact etch stop layer and an interlayer dielectric layer; defining source and drain contact regions; performing etching processes to remove the interlayer dielectric layer and the contact etch stop layer corresponding to the source and drain contact regions sequentially; etching the silicide block layer by adopting a predetermined etching selection ratio to form source and drain contacts, wherein the etching rate of the silicide block layer is higher than the etching rate of the auxiliary sidewalls in the process of etching the silicide block layer.

Abstract: A semiconductor device includes element regions which each include a first region of a first conductivity type, a second region of the first conductivity type on the first region and having a higher impurity concentration than that of the first region, a third region of a second conductivity type on the second region. The second region is between the first and third regions in a first direction. A first insulating portion surrounds each element region in a first plane. A fourth region of the first conductivity type surrounds each element region and the first insulating portion in the first plane. The fourth region has a higher impurity concentration than that of the first region. A quenching structure is above a part of the fourth region in the first direction and electrically connected to the third region.

Abstract: A light sensing module including a photodiode array substrate, a distance increasing layer, and a light converging element array is provided. The photodiode array substrate includes a plurality of light sensing units arranged in an array and a circuit region. The circuit region is disposed on the periphery of the light sensing units. Each of the light sensing units includes a plurality of adjacent photodiodes arranged in an array. The distance increasing layer is disposed on the photodiode array substrate. The light converging element array is disposed on the distance increasing layer, and includes a plurality of light converging units arranged in an array. Reflected light from an outside is converged by the light converging elements on the light sensing units, respectively.

Abstract: The present invention relates to an optoelectronic apparatus, comprising: —an optoelectronic device comprising: —a transport structure (T) comprising a 2-dimensional layer; —a photosensitizing structure (P) to absorb incident light and induce changes in the electrical conductivity of the transport structure (T); and—drain (D) and source (S) electrodes electrically connected to the transport structure (T); —a read-out unit to read an electrical signal, generated at a transport channel of the transport structure (T), after an integration time interval tint has passed, and during a taccess that is at least 10 times shorter than tint, wherein tint is longer than a predetermined trapping time ?tr. The present invention also relates to a reading-out method, comprising performing the operations of the read-out unit of the apparatus of the invention, and to the use of the apparatus as a light detector or as an image sensor.

Abstract: A light sensor includes a semiconductor substrate supporting a number of pixels. Each pixel includes a photoconversion zone extending in the substrate between a front face and a back face of the substrate. An optical diffraction grating is arranged over the back face of the substrate at a position facing the photoconversion zone of the pixel. For at least two different pixels of the light sensor, the optical diffraction gratings have different pitches. Additionally, the optical grating of each pixel is surrounded by an opaque wall configured to absorb at operating wavelengths of the sensor.

Abstract: An inventive solid-state imaging apparatus is provided which can improve the efficiency of the electric carrier transfer from a photoelectric conversion portion to an electric-carrier accumulation portion. The solid-state imaging apparatus includes an active region having the photoelectric conversion portion, the electric-carrier accumulation portion, and a floating diffusion, and an element isolation region having an insulator defining the active region. In planer view, the width of the active region in the electric-carrier accumulation portion under a gate of the first transfer transistor is larger than the width of the active region in the photoelectric conversion portion under the gate of the first transfer transistor.

Abstract: A method of manufacturing an optoelectronic integrated device can include: providing a semiconductor substrate including at least one optoelectronic device in the semiconductor substrate; forming a first dielectric layer on a first surface of the semiconductor substrate; forming a multilayer insulating layer on the first dielectric layer; forming a first opening in the multilayer insulating layer to expose the first dielectric layer above the optoelectronic device area; and forming a second dielectric layer on the dielectric layer, where the first dielectric layer and the second dielectric layer are anti-reflection layers.

Abstract: The present disclosure relates to a semiconductor device, a manufacturing method, an imaging element, and an electronic device capable of reducing manufacturing steps in a stacked structure obtained by stacking two or more semiconductor substrates. The semiconductor device has a stacked structure obtained by stacking at least a first semiconductor substrate in which a first wiring layer is stacked on a first semiconductor layer and a second semiconductor substrate in which a second wiring layer is stacked on a second semiconductor layer. Then, a through via which electrically connects the first semiconductor substrate and the second semiconductor substrate to each other and penetrates at least the first semiconductor layer is formed in an embedded oxide film formed when element isolation of a semiconductor element formed in the first semiconductor layer is performed. The present technology is applicable to, for example, a stacked semiconductor device.

Abstract: A back side illuminated image sensor includes a pixel formed by three doped photosensitive regions that are superposed vertically in a semiconductor substrate. Each photosensitive region is laterally framed by a respective vertical annular gate. The vertical annular gates are biased by a control circuit during an integration phase so as to generate an electrostatic potential comprising potential wells in the central portion of the volume of each doped photosensitive region and a potential barrier at each interface between two neighboring doped photosensitive regions.

Abstract: An electronic system for monitoring a physical parameter includes an ADM comprising an accumulation mode sensor for measuring the physical parameter by generating electrical energy associated with the physical parameter in response to a surrounding condition, and an energy storing device coupled to the accumulation mode sensor for accumulatively storing the generated electrical energy; a power source; and an SoC coupling with the ADM and the power source, configured such that the stored electrical energy is monitored, and when the stored electrical energy is equal to or greater than a pre-defined threshold, a wake-up event is generated to trigger the SoC to operates in a run mode in which the physical parameter is wirelessly transmitted to a receiver and the stored electrical energy in the energy storing device is discharged, and then the SoC returns to a sleep mode in which a minimal power is consumed.

Abstract: A display apparatus including a substrate including a display area and a peripheral area outside the display area, a first insulating layer over the substrate in the display area and the peripheral area, the first insulating layer including a plurality of first contact holes located in the display area, a plurality of second contact holes located in the peripheral area, and a plurality of dummy contact holes located between the plurality of first contact holes and the plurality of second contact holes, first wirings filling the plurality of first contact holes, second wirings filling the plurality of second contact holes, and a second insulating layer covering the first wirings and the second wirings and filling the plurality of dummy contact holes.

Abstract: An operating method of an image sensor, including performing a first sampling operation corresponding to first illumination in at least one pixel; performing a second sampling operation corresponding to second illumination in the at least one pixel; and outputting a first pixel voltage corresponding to the first sampling operation, or outputting a second pixel voltage corresponding to the second sampling operation, in the at least one pixel.

Abstract: An image sensor includes: an accumulation unit that accumulates an electric charge generated by a photoelectric conversion unit that photoelectrically converts incident light transmitted through a microlens; and a readout unit that reads out a signal based on a voltage of the accumulation unit, wherein the accumulation unit and the readout unit are included along an optical axis direction of the microlens.

Abstract: Implantation mask formation techniques described herein include increasing an initial aspect ratio of a pattern in an implantation mask by non-lithography techniques, which may include forming a resist hardening layer on the implantation mask. The pattern may be formed by photolithography techniques to the initial aspect ratio that reduces or minimizes the likelihood of pattern collapse during formation of the pattern. Then, the resist hardening layer is formed on the implantation mask to increase the height of the pattern and reduce the width of the pattern, which increases the aspect ratio between the height of the openings or trenches and the width of the openings or trenches of the pattern. In this way, the pattern in the implantation mask may be formed to an ultra-high aspect ratio in a manner that reduces or minimizes the likelihood of pattern collapse during formation of the pattern.

Abstract: An image sensing device is disclosed. The image sensing device includes a semiconductor substrate configured to generate charge carriers in response to light incident, a plurality of control regions supported by the semiconductor substrate and configured to cause majority carrier currents in the semiconductor substrate to control movement of minority carriers, and a plurality of detection regions formed adjacent to the control regions and configured to capture the minority carriers moving in the semiconductor substrate. Each of the control regions includes an upper portion, a lower portion, and a middle portion disposed between the upper portion and the lower portion. The middle portion has a smaller horizontal cross-sectional profile than each of the upper portion and the lower portion.

Abstract: The present disclosure relates to an imaging device and an electronic device that make it possible to obtain a better pixel signal. A photoelectric conversion part that converts received light into a charge; a holding part that holds a charge transferred from the photoelectric conversion part; and a light shielding part that shields light between the photoelectric conversion part and the holding part are provided. The photoelectric conversion part, the holding part, and the light shielding part are formed in a semiconductor substrate. The light shielding part of a transfer region that transfers the charge from the photoelectric conversion part to the holding part is formed as a non-penetrating light shielding part that does not penetrate the semiconductor substrate. The light shielding part other than the transfer region is formed as a penetrating light shielding part that penetrates the semiconductor substrate. The present technology is applicable to an imaging device.

Abstract: A time-of-flight device comprises a pixel array including an array of pixel circuits, wherein a column of the array includes: a first pixel circuit including a first photodiode, a first capacitor and a second capacitor coupled to the first photodiode, and a second pixel circuit including a second photodiode, a third capacitor and a fourth capacitor coupled to the second photodiode, a first signal line coupled to the first capacitor, a second signal line coupled to the second capacitor, a third signal line coupled to the third capacitor, a fourth signal line coupled to the fourth capacitor, a first switch circuitry, a second switch circuitry, a first comparator coupled to the first signal line and the third signal line through the first switch circuitry, and a second comparator coupled to the second signal line and the fourth signal line through the second switch circuitry.

Abstract: A pixel circuit includes: a charge storage circuit with first and second terminals thereof electrically coupled to first and second nodes, respectively; a reset circuit with first, second and third control terminals thereof electrically coupled to a reference signal line, a first initialization signal line, and a second initialization signal line, respectively, with fourth, fifth and sixth terminals thereof electrically coupled to the first node, a cathode of a photodiode and the second node, respectively; a photosensitive control circuit with first, second and third terminals thereof electrically coupled to an anode of the photodiode, the first node and the second node, respectively; an output circuit with first and second terminals thereof electrically coupled to a first level terminal and a fourth terminal of the photosensitive control circuit, respectively.

Abstract: A photodetection film includes at least one lower photodiode and upper photodiode layered members. The at least one lower photodiode layered member includes lower first-type, intrinsic and second-type semiconductor layers. The at least one upper photodiode layered member is disposed on the at least one lower photodiode layered member and includes upper first-type, intrinsic and second-type semiconductor layers. The upper intrinsic semiconductor layer has an amorphous silicon structure. The lower intrinsic semiconductor layer has a structure selected from one of a microcrystalline silicon structure, a microcrystalline silicon-germanium structure, and a non-crystalline silicon-germanium structure.

Abstract: An imaging device including: a photoelectric converter that generates a signal charge by photoelectric conversion of light; a semiconductor substrate; a charge accumulation region that is an impurity region of a first conductivity type in the semiconductor substrate, the charge accumulation region being configured to receive the signal charge; a first transistor that includes, as a source or a drain, a first impurity region of the first conductivity type in the semiconductor substrate; and a blocking structure that is located between the charge accumulation region and the first transistor. The blocking structure includes a second impurity region of a second conductivity type in the semiconductor substrate, the second conductivity type being different from the first conductivity type, and a first electrode that is located above the semiconductor substrate, the first electrode being configured to be applied with a first voltage.

Abstract: An image sensor is provided. The image sensor includes: a pixel array including a plurality of pixels arranged along rows and columns; and a row driver which drives the plurality of pixels for each of the rows, wherein each of the plurality of pixels includes a plurality of sub-pixels, each of the plurality of sub-pixels includes a plurality of photoelectric conversion elements sharing a floating diffusion area with each other, and a micro lens disposed to overlap the plurality of photoelectric conversion elements, a readout area is defined on the pixel array in accordance with a preset readout mode, and the row driver generates a drive signal for reading out signals provided from a photoelectric conversion element included in the readout area from among the plurality of photoelectric conversion elements, and provides the drive signal to the pixel array.

Abstract: An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.

Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. At least three substrate trench structures are formed in the semiconductor substrate, defining two nonplanar structures, each having a plurality of sidewall portions. An isolation layer includes at least three isolation layer trench structures, each being disposed in a respective one of the three substrate trench structures. A gate includes three fingers, each being disposed in a respective one of the three isolation layer trench structures. An electron channel of the transistor extends along the plurality of sidewall portions of the two nonplanar structures in a channel width plane.

Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.

Abstract: An electronic device, including a substrate, a transistor, a data line, a first transparent conductive layer, an insulating layer, and a metal layer, is provided. The transistor is disposed on the substrate. The data line is disposed on the substrate and electrically connected to the transistor. The first transparent conductive layer is disposed on the data line. The insulating layer is disposed on the first transparent conductive layer. The metal layer is disposed on the data line and overlapped with the data line. The electronic device of the disclosure may reduce an impedance of the transparent conductive layer, mitigate a problem of visual visibility caused by metal reflection, reduce a probability of light entering a semiconductor layer of the transistor, or increase an aperture ratio.

Abstract: A color filter is disposed on a substrate. An organic photodiode is disposed on the color filter. The organic photodiode includes an electrode insulating layer having a recess region on the substrate, a first electrode on the color filter, the first electrode filling the recess region of the electrode insulating layer, a second electrode on the first electrode, and an organic photoelectric conversion layer interposed between the first electrode and the second electrode. The first electrode includes a seam extending at a first angle from a side surface of the recess region of the electrode insulating layer.

Abstract: Provided is a solid-state imaging element, a manufacturing method, and an electronic apparatus which are capable of further improving a light-blocking effect. The solid-state imaging element has a laminated structure in which a memory substrate, a logic substrate, and a sensor substrate are laminated. The solid-state imaging element includes a through electrode that connects the memory substrate and the sensor substrate in a manner passing through a semiconductor layer of the logic substrate, and a light-blocking metal film arranged in a wiring layer included in the logic substrate and provided on the sensor substrate side, where the light-blocking metal film has an opening opened so as to allow the through electrode to pass through. The solid-state imaging element further includes a contact electrode formed on a bonded surface between the logic substrate and the sensor substrate and used to connect the through electrode to the sensor substrate side.

Abstract: To enhance a charge transfer efficiency in a transfer gate having a vertical gate electrode. A solid-state imaging element includes a photoelectric conversion section, a charge accumulating section, and a transfer gate. The photoelectric conversion section is formed in a depth direction of a semiconductor substrate, and generates charges corresponding to a quantity of received light. The charge accumulating section accumulates the charges generated by the photoelectric conversion section. The transfer gate transfers the charges generated by the photoelectric conversion section to the charge accumulating section. The transfer gate includes a plurality of vertical gate electrodes which is filled to a predetermined depth from an interface of the semiconductor substrate, and at least a part of a diameter is different in the depth direction of the semiconductor substrate.

Abstract: There is provided a solid-state imaging device including a substrate having a surface over which a plurality of photodiodes are formed, and a protection film that is transparent, has a water-proofing property, and includes a side wall part vertical to the surface of the substrate and a ceiling part covering a region surrounded by the side wall part, the side wall part and the ceiling part surrounding a region where the plurality of photodiodes are arranged over the substrate.

Abstract: To improve image quality of image data in a solid-state image sensor that detects an address event. The solid-state image sensor includes a photodiode, a pixel signal generation unit, and a detection unit. In the solid-state image sensor, the photodiode generates electrons and holes by photoelectric conversion. The pixel signal generation unit generates a pixel signal having a voltage according to an amount of one of the electrons and the holes. The detection unit detects whether or not a change amount in the other of the electrons and the holes has exceeded a predetermined threshold and outputs a detection signal.

Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.

Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.

Abstract: A light receiving element includes: a first tap; a second tap; a first photoelectric conversion unit configured to detect a charge generated by photoelectric conversion according to a light amount of incident light in accordance with a voltage applied to the first tap; a second photoelectric conversion unit configured to detect a charge generated by photoelectric conversion according to a light amount of the incident light in accordance with a voltage applied to the second tap; a plurality of accumulation units configured to accumulate the charges generated by the first photoelectric conversion unit and the second photoelectric conversion unit; a plurality of transmission units configured to transmit the charges generated by the first photoelectric conversion unit and the second photoelectric conversion unit to the plurality of accumulation units; and a calculation unit configured to execute calculation based on the charges accumulated in the plurality of accumulation units.

Abstract: A photodiode array has buried photodiodes and vertical selection transistors. Trenches are lined with gate oxide and metallic plugs of first material lie within the trenches. Gate contacts of second material contact the metallic plugs, with photodiode diffusion regions adjacent the trenches as sources of vertical transistors, the metallic plugs form gates of the vertical transistors, and buried photodiode regions form sources of the vertical transistors. In embodiments, the first conductive material is tungsten, titanium nitride, titanium carbide, or aluminum and the second conductive material is polysilicon. The array is formed by trenching, growing gate oxide, and depositing first material in the trenches. The first material is etched to define metallic plugs, the second material is deposited onto the metallic plugs then masked and etched; and drain regions implanted. Etching the second material is performed by a reactive ion etch that stops upon reaching the metallic plugs.

Abstract: A display device includes a first semiconductor pattern on a substrate, a first insulating layer on the first semiconductor pattern, a first gate electrode on the first insulating layer, a second insulating layer on the first gate electrode, a second semiconductor pattern on the second insulating layer, a material of the second semiconductor pattern being different from that of the first semiconductor pattern, a third insulating layer on the second semiconductor pattern, a second gate electrode on the third insulating layer, a first planarization layer overlapping the second gate electrode, a second planarization layer on the first planarization layer and including a light blocking portion, and a pixel definition layer on the second planarization layer, wherein at least a portion of the pixel definition layer directly contacts the light blocking portion of the second planarization layer.

Abstract: An imaging device includes a first electrode, a charge accumulating electrode arranged with a space from the first electrode, an isolation electrode arranged with a space from the first electrode and the charge accumulating electrode and surrounding the charge accumulating electrode, a photoelectric conversion layer formed in contact with the first electrode and above the charge accumulating electrode with an insulating layer interposed therebetween, and a second electrode formed on the photoelectric conversion layer. The isolation electrode includes a first isolation electrode and a second isolation electrode arranged with a space from the first isolation electrode, and the first isolation electrode is positioned between the first electrode and the second isolation electrode.

Abstract: A TDI sensor which is capable of controlling the exposure according to the present disclosure includes a pixel unit which includes a plurality of line sensors; a light blocking unit which blocks light from being incident into some of the plurality of line sensors; a scan controller which generates an exposure control signal based on an external line trigger signal, generates an internal line trigger signal based on the external line trigger signal and the exposure control signal, and controls the movement of charges of the plurality of line sensors based on the internal line trigger signal.