Abstract: An imaging device according to an embodiment of the present invention includes a plurality of pixels. Each of the pixels has an active region including a first region and a second region with an electrode therebetween in plan view. A portion that is a portion of the active region and that is located under the electrode forms at least a portion of a capacitor. The first region includes a first semiconductor region of a first conductivity type that forms at least a portion of a floating diffusion, and the second region includes a second semiconductor region of a second conductivity type opposite to the first conductivity type. An insulating film is disposed on the second semiconductor region.

Abstract: Embodiments of the present disclosure provide a structure including: a p-type field effect transistor (pFET device) and an n-type field effect transistor (nFET device) each having sidewall spacers on opposite sidewalls of a gate and source drain region adjacent to the sidewall spacers, a distance between the pFET source drain region and the pFET gate is substantially equal to a distance between the nFET source drain region and the nFET gate.

Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.

Abstract: A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.

Abstract: An image sensor structure is provided. The image sensor structure includes a substrate including a first light sensing region and a second light sensing region. The image sensor structure further includes an isolation structure formed through the substrate to separate the first light sensing region and the second light sensing region and a first source/drain structure and a second source/drain structure formed at a front side of the substrate. In addition, the first source/drain structure and the second source/drain structure are located at opposite sides of the isolation structure. The image sensor structure further includes a contact formed over the isolation structure, a portion of the first source/drain structure, and a portion of the second source/drain structure.

Abstract: A backside illumination image sensor and a method for reducing a dark current of the backside illumination image sensor. The backside illumination image sensor comprises: a photodiode, a first conductive type isolated layer (120); a gate structure of a pass transistor, corresponding to the first conductive type isolated layer (120) and formed on an upper surface of a first conductive type semiconductor substrate (100), the gate structure (130) comprising: gate oxide (131), a gate layer (132), and a gate sidewall (133), and the gate structure (130) correspondingly covering the photodiode; and a floating diffusion zone (140), formed in the first conductive type semiconductor substrate (100) and having second conductive type heavy doping. In the backside illumination image sensor, a defect does not easily appear on a surface, right above the photodiode, of the first conductive type semiconductor substrate (100), so that a dark current is effectively prevented from being produced.

Abstract: A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes.

Abstract: An image sensor such as a complementary metal-oxide-semiconductor (CMOS) image sensor and a method of manufacturing the same are provided. The CMOS image sensor includes: a semiconductor substrate including a first surface and a third surface formed by removing a part of the semiconductor substrate from a second surface opposite to the first surface; a plurality of active regions which are formed between the first surface and the third surface and each of which includes a photoelectric conversion element generating charges in response to light input through the third surface; and an isolation region vertically formed from either of the first and third surfaces to isolate the active regions from one another. When the CMOS image sensor is viewed from the above of the third surface, each of the active regions may have round corners and concave sides.

Abstract: An imaging device comprises at least one unit pixel cell. Each of them comprises: a photoelectric conversion layer having a first and second surfaces; a pixel electrode and a shield electrode located on the first surface and separated from each other, a shield voltage being applied to the shield electrode; an upper electrode located on the second surface and opposing to the pixel electrode and the shield electrode, a counter voltage being applied to the upper electrode; a charge accumulation node electrically connected to the pixel electrode; and a charge detection circuit electrically connected to the charge accumulation node. The charge detection circuit includes a reset transistor that sets the pixel electrode at an initialization voltage at predetermined timing. An absolute value of a difference between the shield voltage and the counter voltage is larger than an absolute value of a difference between the initialization voltage and the counter voltage.

Abstract: An image sensor may include isolation regions that are formed in between photodiodes. These isolation regions may prevent cross-talk and improve the performance of the image sensor. The isolation regions may include a conductive layer that is electrically connected to a bias voltage supply line. Biasing the conductive layer may result in a charge inversion in the substrate adjacent to the conductive layer. The charge inversion may prevent the generation of dark current. The conductive layer may be formed on a liner oxide layer in trenches formed in epitaxial silicon. A connecting layer may be used to electrically connect each conductive layer. The connecting layer may be formed integrally with the conductive layer or formed from a separate material.

Abstract: A camera and a method for manufacturing the camera are disclosed, the camera including parts including a lens unit formed with at least one lens for concentrating an image of an outside object, and an image sensor for converting the image of the outside object concentrated in the lens to an electric signal; and a molding unit for exposing the lens of the lens unit and for integrating the parts without any coupling seams.

Abstract: Provided herein is a digital x-ray detector wherein a plurality of sensing pixels are formed in a matrix structure, and wherein a pin structure positioned in an odd number line and a pin structure positioned in an even number line are not formed in the same process, thereby preventing a line detect by a particle.

Abstract: An avalanche photodiode detector is provided. The avalanche photodiode detector comprises an absorber region having an absorption layer for receiving incident photons and generating charged carriers; and a multiplier region having a multiplication layer; wherein the multiplier region is on a mesa structure separate from the absorber region and is coupled to the absorber region by a bridge for transferring charged carriers between the absorber region and multiplier region.

Abstract: An angle restriction filter that allows light incident thereon in a predetermined range of incident angles to pass, includes: an optical path wall section formed from a plurality of light shield members laminated in layers including a common material, thereby forming an optical path in a lamination direction of the light shield members; and a light transmission section formed in a region surrounded by the optical path wall section.

Abstract: A solid-state imaging device including is provided. The solid-state imaging device includes: pixels arrayed; a photoelectric conversion element in each of the pixels; a read transistor for reading electric charges photoelectrically-converted in the photoelectric conversion elements to a floating diffusion portion; a shallow trench element isolation region bordering the floating diffusion portion; and an impurity diffusion isolation region for other element isolation regions than the shallow trench element isolation region.

Abstract: A stacked type image sensor including color separation elements, and an image pickup apparatus including the stacked type image sensor, are provided. The stacked type image sensor includes a first light sensing layer including first pixels configured to absorb and detect light of a first wavelength band and transmit light of a second wavelength band and a third wavelength band, and a second light sensing layer disposed to face the first light sensing layer, the second light sensing layer including second pixels configured to detect light of the second wavelength band and third pixels configured to detect light of the third wavelength band. The color separation elements are disposed between the first light sensing layer and the second light sensing layer, and are configured to direct the light of the second wavelength band toward the second pixels, and direct the light of the third wavelength band toward the third pixels.

Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate made of a first semiconductor material, an element isolation insulating film, a gate electrode film, source/drain regions, a channel region, and a diffusion preventing film. The channel region is provided near a surface of the semiconductor substrate below the gate electrode film, and containing a second impurity of a predetermined conductivity type diffused therein. The diffusion preventing film is provided at an interface between the element isolation insulating film and the semiconductor substrate, and made of a second semiconductor material different from the first semiconductor material.

Abstract: A transistor a gate of which, one of a source and a drain of which, and the other are electrically connected to a selection signal line, an output signal line, and a reference signal line, respectively and a photodiode one of an anode and a cathode of which and the other are electrically connected to a reset signal line and a back gate of the transistor, respectively are included. The photodiode is forward biased to initialize the back-gate potential of the transistor, the back-gate potential is changed by current of the inversely-biased photodiode flowing in an inverse direction in accordance with the light intensity, and the transistor is turned on to change the potential of the output signal line, so that a signal in accordance with the intensity is obtained.

Abstract: An integrated circuit including an isolated device which is isolated with a lower buried layer combined with deep trench isolation. An upper buried layer, with the same conductivity type as the substrate, is disposed over the lower buried layer, so that electrical contact to the lower buried layer is made at a perimeter of the isolated device. The deep trench isolation laterally surrounds the isolated device. Electrical contact to the lower buried layer sufficient to maintain a desired bias to the lower buried layer is made along less than half of the perimeter of the isolated device, between the upper buried layer and the deep trench.

Abstract: A method of fabricating an X-ray imager including the steps of forming an etch stop layer on a glass substrate and depositing a stack of semiconductor layers on the etch stop layer to form a sensor plane. Separating the stack into an array of PIN photodiodes. Depositing a layer of insulating material on the array to form a planarized surface and forming vias through the insulating layer into communication with an upper surface of each photodiode and forming metal contacts on the planarized surface through the vias in contact with each photodiode. Fabricating an array of MOTFTs in an active pixel sensor configuration backplane on the planarized surface and in electrical communication with the contacts, to provide a sensor plane/MOTFT backplane interconnected combination. Attaching a flexible support carrier to the MOTFT backplane and removing the glass substrate. A scintillator is then laminated on the array of photodiodes.

Abstract: In an imaging device having a waveguide, a surface of an insulating film covering a seal ring is prevented from getting rough. A pixel region, a peripheral circuit region, and a seal region are defined over a semiconductor substrate. After formation of a pad electrode in the peripheral circuit region and a seal ring in the seal ring region, a TEOS film is so formed as to cover the pad electrode and the seal ring. A pattern of a photoresist for exposing a portion of the TEOS film covering the pad electrode and the seal ring, respectively, is formed and etching treatment is subjected to the exposed TEOS film. Then, after the pattern of the photoresist has been formed, a second waveguide holding hole is formed in the pixel region by performing etching treatment.

Abstract: An image sensor with an array of image sensor pixels is provided. Each image sensor pixel may include a set of photodiodes formed in a semiconductor substrate, a color filter structure formed over the set of photodiodes, a microlens formed over the color filter structure, and associated pixel circuitry coupled to the set of photodiodes. The set of photodiodes may include at least two photodiodes linked together via a preferential blooming channel that provides a reduced potential barrier between the two photodiodes. This allows excess charge to spill over from one photodiode to another when more charge is concentrated in a particular photodiode. Configured in this way, the pixel can provide depth sensing capabilities without suffering from reduced pixel capacity.

Abstract: The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure.

Abstract: Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.

Abstract: Realization of an adequate hole accumulation layer and reduction in dark current are allowed to become mutually compatible. A solid-state imaging device 1 having a light-receiving portion 12 to photoelectrically convert incident light is characterized by including a film 21, which is disposed on a light-receiving surface 12s of the above-described light-receiving portion 12 and which lowers an interface state, and a film 22, which is disposed on the above-described film 21 to lower the interface state and which has a negative fixed charge, wherein a hole accumulation layer 23 is disposed on the light-receiving surface 12s side of the light-receiving portion 12.

Abstract: A display apparatus includes a thin film transistor substrate, a substrate facing the thin film transistor substrate, and a liquid crystal layer. The thin film transistor substrate includes an insulating substrate, a gate electrode disposed on a surface of the insulating substrate, a gate insulating layer covering the gate electrode, a semiconductor layer disposed on the gate insulating layer, a source electrode disposed on the semiconductor layer, and a drain electrode disposed on the semiconductor layer and spaced apart from the source electrode. One of the source electrode and the drain electrode is spaced apart from the gate electrode in a plan view. The gate electrode includes a side surface inclined with respect to the surface of the insulating substrate and is partially overlapped with a portion of the source electrode or the drain electrode in a direction perpendicular to the side surface of the gate electrode.

Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.

Abstract: A solid-state image-capturing device has a plurality of pixels and first and second substrates in which circuit elements constituting the pixels are arranged and which are electrically connected through a connection unit. The solid-state image-capturing device includes: a photoelectric conversion element included in the pixel of the first substrate; a first current source; a first amplification transistor having a source or a drain connected to the first current source and a gate to which a signal generated by the photoelectric conversion element is input; a second current source; a switch configured to switch ON and OFF of a connection between a vertical signal line and the second current source and to be turned off when the gate of the first amplification transistor is reset; a voltage output circuit configured to output a power supply voltage to the vertical signal line when the gate of the first amplification transistor is reset.

Abstract: An imaging device includes: a photodiode configured to perform photoelectric conversion and to generate electric charge in accordance with an amount of received light; a floating diffusion section configured to accumulate the electric charge generated in the photodiode; a reading circuit configured to output a pixel signal having a voltage in accordance with a level of the electric charge accumulated in the floating diffusion section, the reading circuit including one or a plurality of transistors each having a gate that is electrically connected to a wiring used for selecting a pixel; and an insulating section extending into part or whole of a bottom surface of the floating diffusion section, part or whole of bottom surfaces of source-drain regions in the one or the plurality of transistors, or both. The photodiode, the floating diffusion section, the reading circuit, and the insulating section are provided in a semiconductor layer.

Abstract: A solid-state imaging device including: a semiconductor substrate of a first conductivity type, having a fixed electric potential; a dark-current drain region of a second conductivity type, formed on a portion of the semiconductor substrate; a connection region of the first conductivity type, formed on another portion of the semiconductor substrate where the dark-current drain region is not formed; a well region of the first conductivity type, covering the dark-current drain region and the connection region; and a first region and a second region, formed within the well region and constituting a part of a read transistor that reads signal charge generated by photoelectric conversion. The well region is maintained at a fixed electric potential by being connected to the semiconductor substrate via the connection region.

Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.

Abstract: The present invention discloses a method for pixel image non-uniformity compensation. The method including the steps of: first, receiving an input image by an image sensor having a plurality of pixels, wherein each pixel includes a variable capacitor; next, calculating brightness information of at least a portion of the pixels; and further, trimming the capacitances of the variable capacitors in the portion of pixels respectively according to the brightness information.

Abstract: The invention relates to the field of semiconductor, more particularly, to a preparation process of image sensors, comprising: Step S1, providing a semiconductor structure, a top of which is provided with a groove, and leads being formed in said groove, the top of said semiconductor structure and an exposed surface of said groove are covered with a first dielectric layer; Step S2: depositing a second dielectric layer covering the upper surface of said first dielectric layer and said leads and filling said groove; Step S3: performing a reversed-etching process to thin said second dielectric layer, and to form a convex structure on a surface of said second dielectric layer above the groove; Step S4: performing a planarization process to said second dielectric layer to improve surface evenness of said second dielectric layer after grinding by the convex structure.

Abstract: A highly accurate imaging device or a highly accurate imaging device capable of detecting differences is provided. A configuration including a circuit in which variation in threshold voltage among amplifier transistors of pixels is corrected is employed. The configuration reduces variation in difference data due to variation in the threshold voltage among the amplifier transistors of the pixels to obtain highly accurate imaging data. Furthermore, charge corresponding to difference data between imaging data in an initial frame and imaging data in a current frame is accumulated in pixels and the difference data is read from each pixel, whereby highly accurate difference data is obtained when whether there is a difference between the initial frame and the current frame is determined.

Abstract: A solid-state imaging device includes a photoelectric conversion device that includes a non-chalcopyrite-based compound semiconductor of at least one layer, which is lattice bonded or pseudo lattice bonded, and is formed on a silicon substrate, and a chalcopyrite-based compound semiconductor of at least one layer which is formed on the non-chalcopyrite-based compound semiconductor.

Abstract: A solid-state image sensing element including a transistor with stable electrical characteristics (e.g., significantly low off-state current) is provided. Two different element layers (an element layer including an oxide semiconductor layer and an element layer including a photodiode) are stacked over a semiconductor substrate provided with a driver circuit such as an amplifier circuit, so that the area occupied by a photodiode is secured. A transistor including an oxide semiconductor layer in a channel formation region is used as a transistor electrically connected to the photodiode, which leads to lower power consumption of a semiconductor device.

Abstract: An improved back side illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor, and associated methods, improve phase detecting capability. The BSI CMOS image sensor has an array of pixels that include a phase detecting pixel (PDP), a composite grid formed of a buried color filter array and composite metal/oxide grid, and a photodiode implant corresponding to the PDP. A PDP mask is fabricated with a deep trench isolation (DTI) structure proximate the PDP and positioned to mask at least part of the photodiode implant such that the PDP mask is positioned between the composite grid and the photodiode implant.

Abstract: A depth sensing pixel includes a photodiode; a first photo storage device; and a first transistor configured to selectively couple the photodiode to the first photo storage device. The depth sensing pixel further includes a second photo storage diode different from the first photo storage device; and a second transistor configured to selectively couple the photodiode to the second photo storage device. The depth sensing pixel further includes a first transfer gate configured to selectively couple the first photo storage diode to a first output node. The depth sensing pixel further includes a second transfer gate configured to selectively couple the second photo storage diode to a second output node.

Abstract: Provided is a semiconductor integrated circuit device having pixel regions in a photodiode array region and having, in each of the pixel regions, a waveguide holding hole having a substantially perpendicular sidewall above the photodiode and embedded with a silicon oxide-based sidewall insulating film reaching the bottom surface of the hole and two or more silicon nitride-based insulating films having a higher refractive index on the inner side of the hole. This structure makes it possible to prevent deterioration of pixel characteristics of an imaging device, such as CMOS sensor, which is rapidly decreasing in size.

Abstract: A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer.

Abstract: A semiconductor structure for suppressing hot clusters includes a substrate of a first dopant concentration, an epitaxial layer having a second dopant concentration smaller than the first dopant concentration and directly disposed on the substrate, a dopant gradient region disposed in the epitaxial layer and having a gradient decreasing from the substrate to the epitaxial layer, a shallow trench isolation disposed between a first element region and a second element region, and a shallow trench doping region surrounding the shallow trench isolation and near the dopant gradient region to suppress a hot cluster formed by the first element region to jeopardize the second element region.

Abstract: An image sensor chip includes a first wafer and a second wafer. The first wafer includes an image sensor having a plurality of sub-pixels, each of which is configured to detect at least one photon and output a sub-pixel signal according to a result of the detection. The image processor is configured to process sub-pixel signals for each sub-pixel and generate image data. The first wafer and the second wafer are formed in a wafer stack structure.

Abstract: Disclosed herein is a solid-state imaging apparatus including: a semiconductor base; a photodiode created on the semiconductor base and used for carrying out photoelectric conversion; a pixel section provided with pixels each having the photodiode; a first wire created by being electrically connected to the semiconductor base for the pixel section through a contact section and being extended in a first direction to the outside of the pixel section; a second wire made from a wiring layer different from the first wire and created by being extended in a second direction different from the first direction to the outside of the pixel section; and a contact section for electrically connecting the first and second wires to each other.

Abstract: Solid-state imaging devices and fabrication methods thereof are provided. The solid-state imaging device includes a substrate containing a first photoelectric conversion element and a second photoelectric conversion element. A color filter layer has a first color filter component and a second color filter component respectively disposed above the first and second photoelectric conversion elements. A light-shielding partition is disposed between the first and second color filter components. The light-shielding partition has a height lower than that of the first and second color filter components. A buffer layer is disposed between the first and second color filter components and above the light-shielding partition. The buffer layer has a refractive index lower than that of the color filter layer.

Abstract: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads.

Abstract: A unit pixel includes a sensing transistor, a photo diode, and a reset drain region. The sensing transistor includes a reference active region, an output active region, and a gate. The gate is between the reference active region and the output active region to electrically connect the reference active region to the output active region based on a gate voltage. The reference active region and output active region are within a semiconductor substrate. The photo diode is under the gate within the semiconductor substrate. The reset drain region is within the semiconductor substrate and is electrically connected to the photo diode by the gate based on the gate voltage.

Abstract: An image sensor device comprises an isolation well region within a substrate. A gate stack is over the isolation well region on the first surface of the substrate. The gate stack has an edge. A doped isolation feature is within the substrate between the isolation well region and the gate stack. The doped isolation feature surrounds an active area. The gate stack is over the active area. The doped isolation feature extends from the edge of the gate stack under the gate stack.

Abstract: An apparatus including: a plurality of photodetectors for converting the light to which they are exposed to into signals for image generation, wherein the photodetectors use locally optimized saturation signal. The apparatus is, for example, an image sensor or an electronic communication device.

Abstract: There is provided a solid-state image sensor including a semiconductor substrate in which a plurality of pixels are arranged, and a wiring layer stacked on the semiconductor substrate and formed in such a manner that a plurality of conductor layers having a plurality of wirings are buried in an insulation film. In the wiring layer, wirings connected to the pixels are formed of two conductor layers.

Abstract: A CMOS image sensor unit and a method for fabricating the same are described. The image sensor unit includes a photodiode, a transfer gate, a reset gate, a source follower gate, a floating drain region between the transfer gate and the reset gate, and a PIP capacitor. The lower poly-Si electrode of the PIP capacitor is electrically connected with the floating drain region and the source follower gate to also serve as an interconnect between the floating drain region and the source follower gate. The fabrication method includes forming contact plugs on the floating drain region and the source follower gate, and then forming a PIP capacitor whose lower poly-Si electrode is connected with each contact plug.