Abstract: A single photon avalanche diode (SPAD) image sensor is disclosed. The SPAD image sensor includes: a substrate having a front surface and a back surface; a trench isolation in the substrate, the trench isolation extending from the front surface of the substrate toward the back surface of the substrate, the trench isolation having a first surface and a second surface opposite to the first surface, the first surface being coplanar with the front surface of the substrate, the second surface being distanced from the back surface of the substrate by a distance greater than 0; wherein the substrate includes: a first layer doped with dopants of a first conductivity type, the first layer extending from the back surface of the substrate toward the trench isolation and laterally surrounding at least a portion of sidewalls of the trench isolation.

Abstract: An imaging device of a CMOS type having a global shutter function is downsized. In the imaging device, a photoelectric conversion unit generates charge corresponding to an exposure amount in a predetermined exposure period. A generated charge retaining unit is formed to have a predetermined impurity concentration in a semiconductor substrate and retains the charge. A generated charge transferring unit renders the photoelectric conversion unit and the generated charge retaining unit conductive therebetween after the exposure period has elapsed and transfers the charge from the photoelectric conversion unit to the generated charge retaining unit. An output charge retaining unit is formed to have substantially the same impurity concentration as that of the generated charge retaining unit and retains charge.

Abstract: A camera and a method for manufacturing the camera are disclosed, the camera including parts including a lens unit formed with at least one lens for concentrating an image of an outside object, and an image sensor for converting the image of the outside object concentrated in the lens to an electric signal; and a molding unit for exposing the lens of the lens unit and for integrating the parts without any coupling seams.

Abstract: A color image sensor including an array of pixels is formed in a semiconductor layer having a back side that receives an illumination. Insulated conductive walls penetrate into the semiconductor layer from the back side and separate the pixels from one another. For each pixel, a color pixel penetrates into from 5 to 30% of a thickness of the semiconductor layer from the back side and occupies at least 90% of the surface area delimited by the walls. An electrically-conductive layer extends from the lateral wall of the filter all the way to the walls.

Abstract: An image sensor including first and second pixel regions adjacent to each other in a first direction in a light-receiving region that receives light and generates charges; a third pixel region adjacent to the first pixel region in a second direction intersecting the first direction in the light-receiving region; a first device isolation layer between the first and second pixel regions and between the first and third pixel regions to separate the first pixel region from the second pixel region and the first pixel region from the third pixel region; second device isolation layers in each of the first to third pixel regions to define active regions; a plurality of transfer gates and a plurality of logic gates on the active regions; and a side connection contact overlapping the first device isolation layer and connected to a side surface of an active region.

Abstract: To provide a solid-state imaging device with short image-capturing duration. A first photodiode in a pixel in an n-th row and an m-th column is connected to a second photodiode in a pixel in an (n+1)-th row and the m-th column through a transistor. The first photodiode and the second photodiode receive light concurrently, the potential in accordance with the amount of received light is held in a pixel in the n-th row and the m-th column, and the potential in accordance with the amount of received light is held in a pixel in the (n+1)-th row and the m-th column without performing a reset operation. Then, each potential is read out. Under a large amount of light, either the first photodiode or the second photodiode is used.

Abstract: Electronic devices may include High Dynamic Range (HDR) complementary metal-oxide-semiconductor (CMOS) image sensor arrays that are illuminated from the back side of the substrate and operate in a rolling shutter (RS) scanning mode. An image sensor may include stacked chips to improve image sensor performance. For example, by stacking photodiodes on top of each other and using dichroic dielectric layers in chip-to-chip isolation, sensor sensitivity may be increased, Moiré effect may be reduced, and the overall image sensor performance may be improved. Image sensors may include a charge sensing and charge storing scheme where charge generated by low incident light levels is transferred onto a charge sensing node of an in-pixel inverting feedback amplifier and charge generated by high incident light levels overflows a certain potential barrier built in the pixel, is stored on capacitors, and is sensed by a source follower.

Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

Abstract: An image sensor includes: a first sub-pixel and a second sub-pixel that are adjacent to each other; and an upper shield, wherein the first sub-pixel includes a first photodiode and a first storage diode, and the second sub-pixel includes a second photodiode and a second storage diode, and the upper shield is formed over the first and second storage diodes vertically overlap with the first and second storage diodes.

Abstract: A semiconductor device, and a method of fabrication, is introduced. In an embodiment, one or more passivation layers are formed over a first substrate. Recesses are formed in the passivation layers and a first plurality of bonding pads and a second plurality of bonding pads are formed in the recesses. In an embodiment, the first plurality of bonding pads have a first width and a first pitch, and the second plurality of bonding pads have the first width and are grouped into clusters. The first plurality of bonding pads and the second plurality of bonding pads in the first substrate are aligned to a third plurality of bonding pads in a second substrate and are bonded using a direct bonding method.

Abstract: A method for fabricating a backside device contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer, includes forming a trench in the device layer. A trench is formed in the device layer. A sacrificial plug is formed in the trench. The handle wafer is removed to reveal the buried insulator layer. The buried insulator layer is partially removed to expose the sacrificial plug at a bottom of the trench. The sacrificial plug is removed. Backside processing of the buried insulator layer is performed. The trench is filled with a conductor to form a contact plug. A final substrate is connected to the buried insulator layer such that the contact plug contacts metallization of the final substrate.

Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

Abstract: In some embodiments, the present disclosure relates to an image sensor device. The image sensor device has an isolation well region surrounding a photodetector arranged within a substrate at a first depth. A gate stack is arranged over the isolation well region along a first surface of the substrate. The gate stack defines an edge. A doped isolation feature is arranged within the substrate at a second depth between the isolation well region and the gate stack. The gate stack is vertically over an active area. The doped isolation feature extends from the edge of the gate stack to under the gate stack.

Abstract: An image pickup device including an amplification transistor (136) and a photodiode (134) is provided. The photodiode is configured to generate an electric charge and provide the electric charge to a first terminal of the amplification transistor. The image pickup device also includes a selection transistor (131) having a first terminal electrically connected to a second terminal of the amplification transistor and a second terminal of the selection transistor electrically connected to a signal line (129) is provided. In particular, a third terminal of the amplification transistor is electrically connected to a ground potential.

Abstract: A method for fabricating a backside device contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer, includes forming a trench in the device layer. The trench is filled with a contact plug. The backside device contact includes the contact plug. After the trench is filled with the contact plug, the handle wafer is removed to reveal the buried insulator layer. The buried insulator layer is partially removed to expose the trench containing the contact plug. A final substrate is connected to the buried insulator layer such that the contact plug contacts metallization of the final substrate. A device structure is formed using the device layer.

Abstract: An imaging device includes a semiconductor substrate and at least one unit pixel cell provided to a surface of the semiconductor substrate. Each of the at least one unit pixel cell includes: a photoelectric converter including a pixel electrode and a photoelectric conversion layer located on the pixel electrode, the photoelectric converter converting incident light into electric charges; a charge detection transistor that includes a part of the semiconductor substrate and detects the electric charges; and a reset transistor that includes a gate electrode and initializes a voltage of the photoelectric converter. The pixel electrode is located above the charge detection transistor. The reset transistor is located between the charge detection transistor and the pixel electrode. When viewed from a direction normal to the surface of the semiconductor substrate, at least a part of the gate electrode is located outside the pixel electrode.

Abstract: A unit pixel formed on a substrate and configured to convert incident light to an electrical signal to constitute an image sensor provided. A unit pixel includes a source having a source voltage supplied thereto and having a silicide layer for metal contact formed thereabove, a drain spaced apart from the source and having a silicide layer for metal contact formed thereabove, a channel formed between the source and the drain and having a current flowed therethrough, an insulating layer formed above the channel, a light receiving part placed in a light receiving region of the surface of the image sensor and having changes in electrical properties caused by incident light therein; and a floating gate formed above the insulating layer so as to be placed between the source and the drain, configured to be electrically connected with the light receiving part, and configured to control an amount of current flowing through the channel by an electric field generated by the changes in electrical properties.

Abstract: A digital radiographic detector uses an IGZO active layer in the switching element for each imaging pixel in a two-dimensional array of imaging pixels. Each imaging pixel has a photo-sensitive element and the switching element. Read-out circuits electrically connected to the two-dimensional array generate a radiographic image by reading out image data by switching on and off the switching elements. The IGZO active layer may be formed having a thickness less than about 7 nm.

Abstract: An image sensor includes a semiconductor material having a front side and a back side opposite the front side. The image sensor also includes a shallow trench isolation (STI) structure, an interlayer dielectric, an intermetal dielectric, and a contact area. The STI structure extends from the front side of the semiconductor material into the semiconductor material. The interlayer dielectric is disposed between the front side of the semiconductor material and the intermetal dielectric. The contact area is disposed proximate to a lateral edge of the semiconductor material. The contact area includes a metal interconnect disposed within the intermetal dielectric and a plurality of contact plugs at least partially disposed within the interlayer dielectric. The contact area also includes a contact pad. The plurality of contact plugs is coupled between the contact pad and the metal interconnect.

Abstract: A solid-state imaging device includes: a pixel region in which a plurality of pixels composed of a photoelectric conversion section and a pixel transistor is arranged; an on-chip color filter; an on-chip microlens; and a multilayer interconnection layer in which a plurality of layers of interconnections is formed through an interlayer insulating film. The solid-state imaging device further includes a light-shielding film formed through an insulating layer in a pixel boundary of a light receiving surface in which the photoelectric conversion section is arranged.

Abstract: A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure.

Abstract: A backside illumination global shutter pixel is disposed in a substrate having a first surface and a second surface and includes an isolation structure having a deep trench isolation pattern, a storage node, and a photoelectric conversion element. The deep trench isolation pattern has a channel and defines a first region and a second region connected with each other by the channel. The storage node is disposed in the second region. The photoelectric conversion element has a main photoelectric conversion portion disposed in the first region and an extending photoelectric conversion portion extended from the main photoelectric conversion portion through the channel to the second region. The extending photoelectric conversion portion is disposed between the second surface and the storage node. A backside illumination global shutter sensor including a plurality of backside illumination global shutter pixels is also provided.

Abstract: Vertical gate all-around (VGAA) structures are described. In an embodiment, a structure including a first doped region in a substrate, a first vertical channel extending from the first doped region, a first metal-semiconductor compound region in a top surface of the first doped region, the first metal-semiconductor compound region extending along at least two sides of the first vertical channel, and a first gate electrode around the first vertical channel.

Abstract: Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.

Abstract: An imaging device includes a plurality of pixels. Each of the pixels includes a photoelectric conversion unit provided in a first semiconductor region of a first conductivity type, a transfer transistor including a second semiconductor region of a second conductivity type to which charge generated in the photoelectric conversion unit is transferred, a third semiconductor region of the first conductivity type provided in a portion deeper than the second semiconductor region and having a higher impurity concentration than the first semiconductor region, and a counter doped region provided around the second semiconductor region. A part of the third semiconductor region and a part the counter doped region are overlapped with a gate electrode of the transfer transistor in a plan view. An overlap of the counter doped region with respect to the gate electrode is larger than an overlap of the third semiconductor region with respect to the gate electrode.

Abstract: A solid-state imaging device includes: pixels arranged in a matrix; a vertical signal line provided for each column, conveying a pixel signal; a power line provided for each column, proving a power supply voltage; and a feedback signal line provided for each column, conveying a signal from a peripheral circuit to a pixel, in which each of the pixels includes: an N-type diffusion layer; a photoelectric conversion element above the N-type diffusion layer; and a charge accumulation node between the N-type diffusion layer and the photoelectric conversion element, accumulating signal charge generated in the photoelectric conversion element, the feedback signal line, a metal line which is a part of the charge accumulation node, the vertical signal line, and the power line are disposed in a second interconnect layer, and the vertical signal line and the power line are disposed between the feedback signal line and the metal line.

Abstract: A semiconductor device includes a substrate, a buried doped layer, a first doped well, a multiplication region and a first contact doped region. The substrate has a first doping type, wherein the substrate includes a surface. The buried doped layer is in the substrate and exposed from the surface of the substrate, wherein the buried doped layer has a second doping type opposite to the first doping type. The first doped well is over the buried doped layer, wherein the first doped well has the first doping type. The multiplication region is proximal to an interface between the buried doped layer and the first doped well. The first contact doped region is over the first doped well, wherein the first contact doped region has the first doping type and a doped concentration higher than a doped concentration of the first doped well.

Abstract: An image sensor includes: a light receiving section suitable for generating photocharges in response to incident light; and a driving section including a source follower transistor suitable for generating an output voltage corresponding to a reference voltage in response to the photocharges. The source follower transistor includes: a stack structure formed by sequentially stacking a first conductive layer, an insulating layer and a second conductive layer; an open portion formed through the second conductive layer and the insulating layer so as to expose the first conductive layer; a channel layer formed along the surface of the open portion so as to be connected to the first conductive layer and the second conductive layer; and a gate is connected to the light receiving section and which is formed over the channel layer so as to overlap the second conductive layer.

Abstract: An image sensor includes a substrate having a first pixel region and a second pixel region adjacent to the first pixel region, a device isolation layer between the first pixel region and the second pixel region and isolating the first pixel region and the second pixel region from each other, a first transistor disposed in the first pixel region, a second transistor disposed in the second pixel region, and a wiring structure electrically connecting the first transistor and the second transistor. The device isolation layer has a deep trench isolation (DTI) structure which extends from a top surface toward a bottom surface of the substrate.

Abstract: The present invention provides an array substrate and a manufacturing method thereof, and a display apparatus; and it relates to the field of display. The array substrate includes a first thin film transistor and a first electrode which are formed on a substrate. The first thin film transistor includes a gate, a gate insulating layer, an active layer, and an etch stop layer. The etch stop layer is formed with first via holes, and the etch stop layer and the gate insulating layer are formed with a second via hole at a position corresponding to the first electrode. A maximal diameter of the first via holes is not greater than a minimal diameter of the second via hole.

Abstract: A shared pixel includes a plurality of photo diode regions, a shared floating diffusion region, a plurality of transfer gates and a blooming layer. Each of the photo diode regions generates photo-charges in response to incident light. The photo diode regions are formed in a semiconductor substrate. The shared floating diffusion region is shared by the plurality of photo diode regions. The shared floating diffusion region is separated from the plurality of photo diode regions in the semiconductor substrate. Each of the transfer gates transfers the photo-charges of a corresponding photo diode region to the shared floating diffusion region in response to a transfer control signal. The blooming layer transfers overflow photo-charges to a power supply voltage node.

Abstract: An image sensor includes a semiconductor substrate, a plurality of photoelectric transducer devices, a dielectric isolating structure and a plurality of spacers. The semiconductor substrate has a backside surface and a front side surface opposite to the backside surface. The photoelectric transducer devices are disposed on the front side surface. The dielectric isolating structure extends downwards into the semiconductor substrate from the front side surface and penetrates through the backside surface, so as to from a grid structure and isolate the photoelectric transducer devices from each other. The spacers are disposed on a plurality of sidewalls of the grid structure.

Abstract: Phase detection pixel pairs may include first and second photodiodes covered by a single microlens. To decrease the readout time of the phase detection pixels, each phase detection pixel may have a respective floating diffusion region. Each phase detection pixel may include a transfer gate that can be asserted to transfer charge from the photodiode to the floating diffusion region. During readout, charge from each photodiode in the phase detection pixel pair may be read out in parallel. The phase detection pixel pairs may be implemented in multiple substrates connected by interconnect layers.

Abstract: In a line sensor including color filters that are periodically disposed in a light-receiving-element row, a problem called a “mixture of colors” occurs. A “mixture of colors” occurs when light that has been transmitted through a color filter differing from a color filter corresponding to a light receiving element is incident upon the light receiving element. In a CMOS sensor 107 including a light-receiving-element row in which a plurality of photodiodes 1204 are disposed side by side in a main scanning direction and a plurality of color filters 1202 that are disposed in correspondence with the plurality of photodiodes 1204, the center of each color filter 1202 is displaced in a direction of the center of the light-receiving-element row from the center of the photodiode 1204 corresponding to the color filter.

Abstract: Provided is a semiconductor device with improved performance. The semiconductor device includes a photodiode having a charge storage layer (n-type semiconductor region) and a surface layer (p-type semiconductor region), and a transfer transistor having a gate electrode and a floating diffusion. The surface layer (p-type semiconductor region) of a second conductive type formed over the charge storage layer (n-type semiconductor region) of a first conductive type includes a first sub-region having a low impurity concentration, and a second sub-region having a high impurity concentration. The first sub-region is arranged closer to the floating diffusion than the second sub-region.

Abstract: Systems on chips are provided. A system on chip (SoC) includes a first gate line, a second gate line and a third gate line extending in a first direction, a gate isolation region cutting the first gate line, the second gate line and the third gate line and extending in a second direction across the first direction, a first gate contact formed on the second gate line arranged between the first gate line and the third gate line, and electrically connecting the cut second gate line, a second gate contact formed on the first gate line, a third gate contact formed on the third gate line, a first metal line electrically connecting the second gate contact and the third gate contact, and a second metal line electrically connected to the first gate contact.

Abstract: The invention provides the art with novel image sensor pixel designs comprising stacked, pinned photodiodes. The stacked pinned photodiodes provide pixels with greatly increased dynamic range. The stacked pinned photodiodes also allow improved color discrimination for low light imaging, for example utilizing pixels with no overlaying color filter array.

Abstract: There is provided a solid-state imaging device including a plurality of photoelectric conversion units, a signal line that is wired along the plurality of photoelectric conversion units, and an output transistor that is electrically connected to each of the photoelectric conversion units and includes a gate electrode and two impurity regions, the two impurity regions being disposed on both sides of the gate electrode and being different in sizes in terms of at least one of a dimension in a channel width direction and a depth, the signal line being connected to one of the two impurity regions that has a smaller size.

Abstract: An array substrate provided by embodiments of the present disclosure includes a base substrate; a gate line pattern and a data line pattern formed on the base substrate; a gate insulating layer pattern formed between the gate line pattern and the data line pattern; and a spare line pattern formed on a same layer as the gate line pattern. The spare line pattern includes multiple spare lines which are substantially in parallel with the gate lines in the gate line pattern. Respective spare lines may be arranged at multiple rows of pixels defined by the gate line pattern and the data line pattern. And the respective spare lines and respective data lines in the data line pattern may have respective vertically overlapped regions.

Abstract: An imaging device includes pixels each including first and second photoelectric conversion units on which pupil-divided parts of incident light are incident and a holding unit that holds charges transferred from the first and second photoelectric conversion units, and outputting signals based on amounts of charges held by the holding unit. Each pixel outputs a first signal and a second signal based on amounts of charges generated by the first photoelectric conversion unit and by the first and second photoelectric conversion units, respectively, during a first exposure time, and a third signal and a fourth signal based on amounts of charges generated by the first photoelectric conversion unit and by the first and second photoelectric conversion units, respectively, during a second exposure time. The first and second signals are output before the third and fourth signals in one frame and after the third and fourth signals in another frame.

Abstract: A solid-state image sensor includes a substrate including a photoelectric conversion portion, an insulating layer having an opening, and a member arranged inside the opening. Letting d be a depth of the opening, the opening has, at an upper end of the opening, a shape having a width in a first direction parallel to the surface of the substrate, and a width in a second direction parallel to the surface of the substrate and orthogonal to the first direction. The widths in the first and second directions are different from each other. The shape is capable of drawing, at each point on a circumference of the opening at the upper end, a circle of 0.6d in diameter which contacts the circumference at the point and does not include a portion outside the opening.

Abstract: An image sensor includes a first light detecting device configured to selectively sense or absorb first visible light, a second light detecting device configured to selectively sense or absorb second visible light having a longer wavelength region than the first visible light, and a third light detecting device on the first light detecting device and the second light detecting device. The first light detecting device has one of a maximum transmission wavelength and a maximum absorption wavelength less than about 440 nm, the second light detecting device has one of a maximum transmission wavelength and a maximum absorption wavelength greater than about 630 nm, and the third light detecting device is configured to selectively sense or absorb third visible light having a wavelength region between the first visible light and the second visible light.

Abstract: An image sensor pixel may include a photodiode, a floating diffusion, and a transfer gate. A buried channel may be formed under the transfer gate. The buried channel may extend from the floating diffusion to overlap a portion of the transfer gate without extending completely beneath the transfer gate or reaching the photodiode. The buried channel may provide a path for antiblooming current from the photodiode to reach the floating diffusion, while allowing for the transfer gate off voltage to remain high enough to prevent transfer gate dark current from flowing into the photodiode.

Abstract: An image sensor includes a substrate including an active region defined by a device isolation layer, a photoelectric conversion layer in the substrate, a floating diffusion region in the substrate at an edge of the active region, and a transfer gate on the active region. The transfer gate is in contact with a portion of the device isolation layer adjacent the active region.

Abstract: In various embodiments, a photodetector includes a semiconductor substrate and a plurality of pixel regions. Each of the plurality of pixel regions comprises an optically sensitive layer over the semiconductor substrate. A pixel circuit is formed for each of the plurality of pixel regions. Each pixel circuit includes a pinned photodiode, a charge store, and a read out circuit for each of the plurality pixel regions. The optically sensitive layer is in electrical communication with a portion of a silicon diode to form the pinned photodiode. A potential difference between two electrodes in communication with the optically sensitive layer associated with a pixel region exhibits a time-dependent bias; a biasing during a first film reset period being different from a biasing during a second integration period.

Abstract: A method of image sensor fabrication includes forming a photodiode and a floating diffusion in a first semiconductor material, and removing part of an oxide layer disposed proximate to a seed area on a surface of the first semiconductor material. The method also includes depositing a second semiconductor material over the surface of the first semiconductor material, and annealing the first semiconductor material and second semiconductor material. A portion of the second semiconductor material is etched away to form part of a source follower transistor, and dopant is implanted into the second semiconductor material to form a first doped region, a third doped region, and a second doped region. The second doped region is laterally disposed between the first doped region and the third doped region, and the second doped region is a channel of the source follower transistor.

Abstract: Provided is a semiconductor device having a light receiving element in which a plurality of photodiodes are formed on a top surface of a P-type semiconductor substrate, an insulating oxide film is formed on surfaces of the photodiodes 51 via a buried oxide film, and an SOI layer of single crystal silicon is formed between a photodiode and an adjacent photodiode via the buried oxide film for shielding unnecessary light.

Abstract: A three-dimensionally integrated imaging device is provided. The imaging device includes a first layer that includes a first transistor including a metal oxide in a channel formation region, a first insulating layer, and a second insulating layer, and a second layer that includes a photodiode. A conductive layer in contact with the metal oxide is electrically connected to one of a cathode and an anode of the photodiode via a conductor that penetrates the first insulating layer and the second insulating layer.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes a step of grinding to thin a first semiconductor wafer on which a semiconductor device is formed in a state in which a surface of a second semiconductor wafer is fixed on a chuck table of a grinding device after bonding the first semiconductor wafer to the second semiconductor wafer. The method includes a step of fixing a surface of the first semiconductor wafer on the chuck table and grinding the surface of the second semiconductor wafer in a state in which the first semiconductor wafer is bonded to the second semiconductor wafer prior to the grinding step to thin the first semiconductor wafer.

Abstract: An X-ray detection panel for X-ray detectors and a method of manufacturing the same are disclosed. The X-ray detection panel includes a substrate, a photodiode disposed on the substrate and generating an electrical signal in response to light illuminating the photodiode, a first thin-film transistor disposed on the substrate and processing the electrical signal generated by the photodiode, and a second thin-film transistor disposed on the substrate and removing a residual current component accumulated in the photodiode and the first thin-film transistor. The X-ray detection panel can improve actual sensitivity and signal-to-noise ratio (SNR).