Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion.

Abstract: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; and a plurality of fourth semiconductor regions of the second conductivity type formed on the second semiconductor region, each of the plurality of fourth semiconductor regions being surrounded by the third semiconductor region, including a second conductivity type impurity having a concentration higher than a concentration of the second semiconductor region, and electrically connected to a second external electrode.

Abstract: A solid-state imaging device includes photoelectric conversion elements on an imaging surface of a substrate, receiving light incident on a light receiving surface and performing photoelectric conversion to produce a signal charge. Electrodes are interposed between the photoelectric conversion elements and light blocking portions are provided above the electrodes and interposed between the photoelectric conversion elements. The light blocking portions include an electrode light blocking portion formed to cover the corresponding electrode, and a pixel isolation and light blocking portion protruding convexly from the upper surface of the electrode light blocking portion. The photoelectric conversion elements are arranged at first pitches on the imaging surface. The electrode light blocking portions and the pixel isolation and light blocking portions are arranged at second and third pitches on the imaging surface.

Abstract: A solid-state imaging device that includes a pixel including a photoelectric conversion section, and a conversion section that converts an electric charge generated by photoelectric conversion into a pixel signal. In the solid-state imaging device, substantially only a gate insulation film is formed on a substrate corresponding to an area under a gate electrode of at least one transistor in the pixel.

Abstract: Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate). In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.

Abstract: A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5×1019/cm3, the work function ?ms of a source electrode in contact with the oxide semiconductor, the work function ?md of a drain electrode in contact with the oxide semiconductor, and electron affinity ? of the oxide semiconductor satisfy ?ms??<?md. By electrically connecting a gate electrode and the drain electrode of the thin film transistor, a non-linear element with a more favorable rectification property can be achieved.

Abstract: An organic light-emitting display includes a substrate, a thin film transistor on the substrate, an organic light-emitting diode electrically connected to the thin film transistor, and a photo sensor having a plurality of photo diodes connected to one another in parallel.

Abstract: Image sensor arrays may include image sensor pixels each having at least one back-gate-modulated vertical transistor. The back-gate-modulated vertical transistor may be used as a source follower amplifier. An image sensor pixel need not include an address transistor. The image sensor pixel with the back-gate-modulated vertical source follower transistor may exhibit high fill factor, large charge storage capacity, and has as few as two row control lines and two column control lines per pixel. This can be accomplished without pixel circuit sharing. The pixel may also provide direct photo-current sensing capabilities. The ability to directly sense photo-current may facilitate fast adjustment of sensor integration time. Fast adjustment of sensor integration time may be advantageous in automotive and endoscopic applications in which the time available for the correction of integration time is limited.

Abstract: A solid-state imaging device includes a substrate, a plurality of photodiodes arranged in the substrate in a depth direction of the substrate, a vertical readout gate electrode for reading signal charges in the photodiodes, the vertical readout gate electrode being embedded in the substrate such that the readout gate electrode extends in the depth direction of the substrate, a dark-current suppressing area which covers a bottom portion and a side surface of the readout gate electrode, the dark-current suppressing area including a first-conductivity-type semiconductor area having a uniform thickness on the side surface of the readout gate electrode, and a reading channel area disposed between the first-conductivity-type semiconductor area and the photodiodes, the reading channel area including a second-conductivity-type semiconductor area.

Abstract: An image sensor according to example embodiments may include a plurality of light-sensitive transparent oxide semiconductor layers as light-sensing layers. The light-sensing layers may be stacked in one unit pixel region.

Abstract: The invention relates to image sensors produced with CMOS technology, whose individual pixels, arranged in an array of rows and columns, each consist of a photodiode (PD1) associated with a charge storage region (N2) which receives the photogenerated charge before a charge readout phase. To eliminate the risk of introducing kTC-type noise into the signal, during the reset of the storage zone (N2) at the end of a readout cycle, the invention proposes that the storage zone be divided into two parts one of which (N2b), adjacent to the reset gate (G3), is covered by a diffused region (P2) of the same type of conductivity as the substrate in which the photodiode is formed, this region being brought to the fixed potential of the substrate, and the other (N2a) of which is not covered by such a region and is not adjacent to the reset gate.

Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.

Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.

Abstract: A method of fabricating an MOS device is provided. First, gates and source/drain regions of transistors are formed on a substrate. A photodiode doped region and a floating node doped region are formed in the substrate. Thereafter, a spacer stacked layer including a bottom layer, an inter-layer and a top layer is formed to cover each gate of the transistors. Afterwards, a first mask layer having an opening exposing at least the photodiode doped region is formed on the substrate, and then the top layer exposed by the opening is removed. Next, the first mask layer is removed, and then a second mask layer is formed on a region correspondingly exposed by the opening. A portion of the top layer and the inter-layer exposed by the second mask layer is removed to form spacers on sidewalls of the gates.

Abstract: A light detecting apparatus is provided with a semiconductor substrate, a first electrode layer, and a second electrode layer. The semiconductor substrate has a first conductivity type first semiconductor region, and a second conductivity type second semiconductor region formed on the first semiconductor region and constituting a photodiode based on a pn junction formed between the first semiconductor region and the second semiconductor region. The first electrode layer is arranged above the second semiconductor region so as to be opposed to the second semiconductor region and is electrically connected to the second semiconductor region. The second electrode layer is arranged above the first electrode layer so as to be opposed to the first electrode layer and forms a capacitance component connected to the photodiode, between the first electrode layer and the second electrode layer.

Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.

Abstract: This invention relates to photodetector and its array in the form of a image sensor having multispectral detection capability covering the wavelengths from ultra-violet (UV) or near UV to shortwave infrared (over 1700 nm), ultra-violet (UV) or near UV to mid infrared (3500 nm), or ultra-violet (UV) or near UV to 5500 nm. More particularly, this invention is related to the multicolor detector, which can detect the light wavelengths ranges from as low as UV to the wavelengths over 1700 nm covering the most of the communication wavelength, and also from UV to as high as 5500 nm using of the single monolithic detector fabricated on the single wafer. This invention is also related to the multispectral photodetector arrays for multicolor imaging, sensing, and advanced communication.

Abstract: A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of less than about 0.4 V is disclosed. The transistor is provided with high dosage source and drain regions around the gate electrode and with the halo implanted regions and/or the lightly doped LDD regions and/or the enhancement implanted regions omitted from at least one side of the gate electrode. The low threshold transistor is electrically connected to a high voltage transistor with a high threshold voltage of about 0.7 V.

Abstract: A method of forming stress-tuned dielectric films having Si—N bonds on a semiconductor substrate by modified plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen-and hydrogen-containing reactive gas and an additive gas into a reaction space inside which a semiconductor substrate is placed; applying RF power to the reaction space using a high frequency RF power source and a low frequency RF power source; and introducing a hydrogen-containing silicon precursor in pulses into the reaction space wherein a plasma is excited, thereby forming a stress-tuned dielectric film having Si—N bonds on the substrate.

Abstract: An organic photodetector including a substrate, a first electrode, an insulation layer, an organic layer, and a second electrode is provided. The first electrode is disposed on the substrate. The insulation layer is disposed on the first electrode. The organic layer is disposed on the substrate and the insulation layer and covers a side surface of the insulation layer and a side surface of the first electrode. The second electrode is disposed on the organic layer and located above the insulation layer.

Abstract: A substrate for a semiconductor device is provided, including: a substrate; a transistor, formed on the substrate, that includes a semiconductor layer, and a gate electrode disposed so as to be opposed to the semiconductor layer with a gate insulating film interposed therebetween; and an underlying film disposed below the semiconductor layer, as an underlayer of the transistor, and formed in an island shape so as to at least partially overlap the semiconductor layer, in a plan view of the substrate.

Abstract: Provided is a method of forming and/or using a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A transfer transistor and a photodetector are formed on the front surface. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. Radiation incident the back surface and tratversing the photodetector may be reflected by the optically reflective layer. The reflected radiation may be sensed by the photodetector.

Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).

Abstract: An optoelectronic semiconductor chip including a radiation passage area, where a contact metallization is applied to the radiation passage area, and a first reflective layer sequence is applied to that surface of the contact metallization which is remote from the radiation passage area, and an optoelectronic component that includes such a chip.

Abstract: The present disclosure uses at least two cascaded photodetectors. Device area is increased to provide a bigger current than a single photodetector under the same bandwidth. Hence, bandwidth efficiency (BRP) and saturation current-bandwidth product (SCBP) are improved for a high speed, a high responsivity and a high bandwidth with simple structure and low cost.

Abstract: The invention provides a side-view LED having an LED window opened to a side to emit light sideward. A pair of lead frames each act as a terminal. An LED chip is attached to a portion of the lead frame and electrically connected thereto. A package body houses the lead frames and has a concave formed around the LED chip. Also, a high reflective metal layer is formed integrally on a wall of the concave. A transparent encapsulant is filled in the concave to encapsulate the LED chip, while forming the LED window. In addition, an insulating layer is formed on a predetermined area of the lead frames so that the lead frames are insulated from the high reflective metal layer. The side-view LED of the invention enhances light efficiency and heat release efficiency with an improved side-wall reflection structure.

Abstract: An image sensor having an array of pixels disposed in a substrate. Each pixel includes a photosensitive element, a color filter, and waveguide walls. The waveguide walls are disposed in the color filter and surround portions of the color filter to form waveguides through the color filter. The refractive index of the waveguide walls is less than the refractive index of the color filter. The image sensor may be back side illuminated (BSI) or front side illuminated (FSI). In some embodiments, metal walls may be coupled to the waveguide walls.

Abstract: A method for manufacturing an electronic-photonic device. Epitaxially depositing an n-doped III-V composite semiconductor alloy buffer layer on a crystalline surface of a substrate at a first temperature. Forming an active layer on the n-doped III-V epitaxial composite semiconductor alloy buffer layer at a second temperature, the active layer including a plurality of spheroid-shaped quantum dots. Depositing a p-doped III-V composite semiconductor alloy capping layer on the active layer at a third temperature. The second temperature is less than the first temperature and the third temperature. The active layer has a photoluminescence intensity emission peak in the telecommunication C-band.

Abstract: The invention relates to processes for the production and elements (components) with a nanostructure (2; 4, 4a) for improving the optical behavior of components and devices and/or for improving the behavior of sensors by enlarging the active surface area. The nanostructure (2) is produced in a self-masking fashion by means of RIE etching and its material composition can be modified and it can be provided with suitable cover layers.

Abstract: This describes color filter arrangements for image sensor arrays that are formed using image sensor pixels with stacked photo-diodes. The stacked photo-diodes may include first and second photo-diodes and may have the ability to separate color signal according to the depth of carrier generation in a silicon substrate. A single color filter may be formed over the stacked photo-diodes to provide full red-green-blue sensing capability. Charge drain regions may also be formed at different depths in the silicon substrate. If the charge drain regions are formed beneath the stacked photo-diodes in the substrate, full red-green-blue color sensing may be achieved without the use of color filters.

Abstract: Provided are image sensors and methods of manufacturing the same. An image sensor includes a metal line and an interlayer insulation layer on a semiconductor substrate including a readout circuit; an image detection unit on the interlayer insulation layer and including stacked first and second doping layers; a pixel separation unit penetrating the image detection unit, separating the image detection unit by pixel; a first metal contact penetrating the image detection unit and the interlayer insulation layer to contact the metal line; a first barrier pattern protecting the first metal contact from contacting the second doping layer, while exposing the first metal contact to the first doping layer; and a second metal contact in a trench above the first metal contact, wherein the second metal contact is electrically connected to the second doping layer while being isolated from the first metal contact by a second barrier pattern.

Abstract: An example complementary metal oxide semiconductor (CMOS) image sensor includes an epitaxial layer, an array of pixels, and a trench capacitor. The array of pixels are formed on a front side of the epitaxial layer in an pixel array area of the image sensor. The array of pixels includes one or more shallow trench isolation structures disposed between adjacent pixels for isolating the pixels in the pixel array area. The trench capacitor is formed on the front side of the epitaxial layer in a peripheral circuitry area of the image sensor.

Abstract: A solid-state imaging device includes a layer including an on-chip lens above a sensor section, and the layer including the on-chip lens is composed of an inorganic film which transmits ultraviolet light. The layer including the on-chip lens may further include a planarizing film located below the on-chip lens. A method of fabricating a solid-state imaging device includes the steps of forming a planarizing film composed of a first inorganic film, forming a second inorganic film on the planarizing film, forming a lens-shaped resist layer on the second inorganic film, and etching back the resist layer to form an on-chip lens composed of the second inorganic film. The first inorganic film constituting the planarizing film and the second inorganic film constituting the on-chip lens preferably transmit ultraviolet light.

Abstract: A solid-state imaging device includes a light-receiving portion, which serves as a pixel, and a waveguide, which is disposed at a location in accordance with the light-receiving portion and which includes a clad layer and a core layer embedded having a refractive index distribution in the wave-guiding direction.

Abstract: A process and structure of a back side illumination (BSI) image sensor are disclosed. An n-type doped region is formed in a substrate, and a transfer gate is formed on top of the semiconductor substrate. A p-type doped region is formed in the n-type doped region either using the transfer gate as a mask or is non-self aligned formed.

Abstract: A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process is a destructive implantation to form lattice effects/trap centers. No defect repair process is carried out after the implantation process is performed. The implants can reside at the isolation structures or in the substrate under the isolation structures. Dark leakage and crosstalk are thus suppressed.

Abstract: A CMOS active pixel sensor (APS) cell structure includes at least one transfer gate device and method of operation. A first transfer gate device comprises a diodic or split transfer gate conductor structure having a first doped region of first conductivity type material and a second doped region of a second conductivity type material. A photosensing device is formed adjacent the first doped region for collecting charge carriers in response to light incident thereto, and, a diffusion region of a second conductivity type material is formed at or below the substrate surface adjacent the second doped region of the transfer gate device for receiving charges transferred from the photosensing device while preventing spillback of charges to the photosensing device upon timed voltage bias to the diodic or split transfer gate conductor structure.

Abstract: Provided are an image sensor and a method for manufacturing the same. According to an embodiment, a semiconductor substrate is provided comprising a readout circuit. An interconnection electrically connected to the readout circuit and an interlayer dielectric are disposed over the semiconductor substrate. An image sensing unit is disposed over the interlayer dielectric and comprises a first doping layer and a second doping layer stacked therein. A first via hole is formed, exposing the interconnection through the image sensing unit. A fourth metal contact is formed in the first via hole to electrically connect the interconnection and the first doping layer. A fifth metal contact is formed over the fourth metal contact, the fifth metal contact being electrically insulated from the fourth metal contact and electrically connected to the second doping layer.

Abstract: An image sensor and a method for fabricating the same are provided. The image sensor includes a first conductive type substrate including a trench formed in a predetermined portion of the first conductive type substrate, a second conductive type impurity region for use in a photodiode, formed below a bottom surface of the trench in the first conductive type substrate, and a first conductive type epitaxial layer for use in the photodiode, buried in the trench.

Abstract: A back-illuminated type solid-state imaging device is provided in which an electric field to collect a signal charge (an electron, a hole and the like, for example) is reliably generated to reduce a crosstalk. The back-illuminated type solid-state imaging device includes a structure 34 having a semiconductor film 33 on a semiconductor substrate 31 through an insulation film 32, in which a photoelectric conversion element PD that constitutes a pixel is formed in the semiconductor substrate 31, at least part of transistors 15, 16, and 19 that constitute the pixel is formed in the semiconductor film 33, and a rear surface electrode 51 to which a voltage is applied is formed on the rear surface side of the semiconductor substrate 31.

Abstract: A back-illuminated type solid-state imaging device including (a) a semiconductor layer on a front surface side of a semiconductor substrate with an insulation film between them; (b) a photoelectric conversion element that constitutes a pixel in the semiconductor substrate; (c) at least part of transistors that constitute the pixel in the semiconductor film; and (d) a rear surface electrode to which a voltage is applied on the rear surface side of the semiconductor substrate, wherein, (1) a semiconductor layer of an opposite conduction type to a charge accumulation portion of the photoelectric conversion element is formed in the semiconductor substrate under the insulation film, and (2) the same voltage as the voltage applied to the rear surface electrode is applied to the semiconductor layer.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: A photodetector is provided that includes a FET structure with a channel structure having one or more nanowire structures. Noble metal nanoparticles are positioned on the channel structure so as to produce a functionalized channel structure. The functionalized channel structure exhibits pronounced surface plasmon resonance (SPR) absorption near the SPR frequency of the noble metal nanoparticles.

Abstract: A CMOS image sensor includes a unit pixel including controlled by a high voltage; a reference high voltage generator for generating a reference high voltage; and a high voltage output unit for generating the high voltage by using the reference high voltage as an operating voltage to thereby output the high voltage to the unit pixel, wherein a level of the high voltage is stably maintained regardless of a variations of the reference high voltage level.

Abstract: Photoelectric conversion elements disposed on an imaging surface of a substrate, receiving light incident on a light receiving surface and performing photoelectric conversion to produce a signal charge; electrodes interposed between the photoelectric conversion elements; and light blocking portions provided above the electrodes and interposed between the photoelectric conversion elements. The light blocking portions include an electrode light blocking portion formed to cover the corresponding electrode, and a pixel isolation and light blocking portion protruding convexly from the upper surface of the electrode light blocking portion. The photoelectric conversion elements are arranged at first pitches on the imaging surface. The electrode light blocking portions and the pixel isolation and light blocking portions in the light blocking portions are arranged at second and third pitches, respectively, on the imaging surface.

Abstract: Pixel sensor cells, method of fabricating pixel sensor cells and design structure for pixel sensor cells. The pixel sensor cells including: a photodiode body in a first region of a semiconductor layer; a floating diffusion node in a second region of the semiconductor layer, a third region of the semiconductor layer between and abutting the first and second regions; and dielectric isolation in the semiconductor layer, the dielectric isolation surrounding the first, second and third regions, the dielectric isolation abutting the first, second and third regions and the photodiode body, the dielectric isolation not abutting the floating diffusion node, portions of the second region intervening between the dielectric isolation and the floating diffusion node.

Abstract: A multicolor CMOS pixel sensor formed in a p-type semiconductor region includes a first detector formed from an n-type region of semiconductor material located near the surface of the p-type region. A first pinned p-type region is formed at the surface of the p-type region over the first detector, and has a surface portion extending past an edge of the pinned p-type region. A second detector is formed from an n-type region located in the p-type semiconductor region below the first detector. A second-detector n-type deep contact plug is in contact with the second detector and extends to the surface of the p-type semiconductor region. A second pinned p-type region is formed at the surface of the p-type semiconductor region over the top of the second-detector n-type deep contact plug. A surface portion of the second-detector deep contact plug extends past an edge of the second pinned p-type region.

Abstract: A full color complementary metal oxide semiconductor (CMOS) imaging circuit is provided. The imaging circuit is made up of an array of photodiodes including a plurality of pixel groups. Each pixel group supplies 3 electrical color signals, corresponding to 3 detectable colors. A color filter array overlies the photodiode array employing less than 3 separate filter colors. Each pixel group may be enabled as a dual-pixel including a single photodiode (PD) to supply a first color signal and stacked PDs to supply a second and third color signal. In one aspect, the color filter array employs 1 filter color per pixel group. In another aspect, the color filter array employees 2 filter colors per pixel group. In either aspect, the color filter array forms a checkerboard pattern of color filter pixels. For example, a magenta color filter may overlie the stacked PDs of each dual-pixel, to name one variation.

Abstract: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first conductivity type material; a first doped layer of a second conductivity type material formed adjacent to at least one of the sidewalls; and a second doped layer of the first conductivity type material formed between the first doped layer and the at least one trench sidewall and formed at a surface of the substrate, the second doped layer isolating the first doped layer from the at least one trench sidewall and the substrate surface.

Abstract: In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, a resetting transistor is formed. In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, an amplifying transistor is formed. The first and second active regions are respectively the same in shape in image pixel parts. The resetting transistor and the amplifying transistor are shared by the pixel parts.