High Temperature (i.e., >30o Kelvin) Patents (Class 257/33)
  • Patent number: 5804835
    Abstract: This is an invention of a superconductive device that is equipped with a first superconductive electrode, a second superconductive electrode and a junction that is made of a superconductive material that connects these superconductive electrodes, wherein there are 2-terminal or 3-terminal superconductive devices that use a junction that is in a superconductive state that is weaker than the first and the second superconductive electrodes or in a normal conductive state that is near the superconductive state. The differences between the critical current, the critical temperature, the pair potential and the carrier densities of the first and the second superconductive electrodes and the junction are used as a means of putting the junction in the states mentioned above. Based on the methods mentioned above, a superconductive device which has few pattern rule restrictions and which is easy to fabricate can be offered.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: September 8, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Taketomi Kamikawa, Eiji Natori, Setsuya Iwashita, Tatsuya Shimoda
  • Patent number: 5801393
    Abstract: A superconductor-insulator-superconductor Josephson tunnel junction, comprising: a single crystalline substrate having a perovskite crystal structure; a template layer formed of a b-axis oriented PBCO thin film on the substrate; and a trilayer structure consisting of a lower electrode, a barrier layer and an upper electrode, which serve as a superconductor, an insulator and a superconductor, respectively, the lower electrode and the upper electrode each being formed of an a-axis oriented YBCO superconducting thin film and having an oblique junction edge at an angle of 30.degree. to 70.degree., the barrier layer being formed of an insulating thin film between the two superconducting electrodes, can be operated at a low power with an exceptional speed in calculation and data processing.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: September 1, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gun-Yong Sung, Jeong-Dae Suh
  • Patent number: 5793056
    Abstract: A technique for defining the active area of a high-T.sub.c superconductor Josephson junction uses an epitaxial slotted insulator patterned over the edge of the superconductor thin film-insulator bilayer. The superconductor/normal-metal/superconductor edge junction formed between the slotted insulator has a small active area. The counter electrode provided as an interconnect of the junction can therefore be wider than the active area of the edge junction since it can overlap onto the patterned slotted insulator. The use of the slotted insulator enables fabrication of junctions having resistances and critical currents in the desired range for high-T.sub.c superconductor circuits while enabling the use of wide, low inductance interconnects.
    Type: Grant
    Filed: February 21, 1997
    Date of Patent: August 11, 1998
    Assignee: Northrop Grumman Corporation
    Inventors: Martin G. Forrester, Brian D. Hunt
  • Patent number: 5757243
    Abstract: An effective high frequency oscillator is made of a plurality of Josephson devices. A high frequency converter as a high frequency circuit is made of the high frequency oscillator, nonlinear superconductor devices, and transmission line. Josephson devices are connected in parallel to make a superconductor module. Then superconductive modules are connected in series for high frequency via a phase locking circuit such as a thin film type capacitor to make the high frequency oscillator. Consequently, the high frequency oscillator is used as a local oscillator for a frequency converter. The high frequency system comprises a high frequency package housing a high frequency circuit, a cooling unit including a low temperature stage in thermal contact with the high frequency package, and a shielding case for housing the high frequency circuit and the low temperature stage. The high frequency system of the present invention provides a small-sized and power-saving high frequency circuit having operational stability.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: May 26, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Mizuno, Akira Enokihara, Hidetaka Higashino, Kentaro Setsune
  • Patent number: 5736488
    Abstract: This invention relates to multilayered superconductive composites, particularly to composites based on thallium-containing superconducting oxides, and their process of manufacture.
    Type: Grant
    Filed: January 26, 1996
    Date of Patent: April 7, 1998
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Dean Willett Face, Kirsten Elizabeth Myers
  • Patent number: 5696392
    Abstract: A conductor suitable for use in oxide-based electronic devices and circuits is disclosed. Metallic oxides having the general composition AMO.sub.3, where A is a rare or alkaline earth or an alloy of rare or alkaline earth elements, and M is a transition metal, exhibit metallic behavior and are compatible with high temperature ceramic processing. Other useful metallic oxides have compositions (A.sub.1-x A'.sub.x)A".sub.2 (M.sub.1-y M'.sub.y).sub.3 O.sub.7-.delta. or (A.sub.1-x A'.sub.x).sub.m (M.sub.1-y M'.sub.y).sub.n O.sub.2m+n, where 0.ltoreq.x, y.ltoreq.1 and 0.5.ltoreq.m, n.ltoreq.3, A and A' are rare or alkaline earths, or alloys of rare or alkaline earths, A' and A" are alkaline earth elements, alloys of alkaline earth elements, rare earth elements, alloys of rare earth elements, or alloys of alkaline earth and rare earth elements, and M and M' are transition metal elements or alloys of transition metal elements.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: December 9, 1997
    Assignee: Conductus, Inc.
    Inventors: Kookrin Char, Theodore H. Geballe, Brian H. Moeckly
  • Patent number: 5682042
    Abstract: The optical response of high-quality epitaxial copper-oxide perovskite films on substrates such as LaGaO.sub.3 and SrTiO.sub.3 exhibits a nonbolometric component to a photoresponse at certain temperatures below the onset of the superconducting transition and when carrying bias currents of a certain magnitude. A nonbolometric superconductive photoresponsive cell and method employ such films. The photoresponsive cell and method of the invention can be used to detect electromagnetic radiation incident on the film and to switch or modulate electrical signals passing through the film.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: October 28, 1997
    Assignee: International Business Machines Corporation
    Inventors: Nabil Mahmoud Amer, Elia Zeldov
  • Patent number: 5665980
    Abstract: A method of fabricating a superconducting quantum interference device (DC-SQUID) constructed from short weak links with untrafine wires. The method comprises the following steps: successive forming a niobium nitride film and a silicon nitride film on a substrate; oblique etching of the niobium nitride film and said silicon nitride film with respect to the substrate by a reactive ion etching process using a mixture of oxygen and CF.sub.4 gases to form an olique edge; and successive forming a barrier thin film and a counterelectrode of niobium on the said edge. The short weak links wire fabricated by field evaporation technique. The counterelectrode material were field-evaporated and formed the conductive paths in the pinholes in the insulating thin film.
    Type: Grant
    Filed: June 13, 1994
    Date of Patent: September 9, 1997
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yoshio Onuma, Katsuyoshi Hamasaki
  • Patent number: 5629267
    Abstract: A superconducting element is disclosed which comprises a lower superconducting layer, an upper superconducting layer, and an intermediate layer interposed between the lower and upper superconducting layers. The lower and upper superconducting layers are both form of a superconducting cuprate. The intermediate layer is formed of a layered cuprate containing in the crystal structure thereof multiple fluorite blocks represented by the formula:[B]AE.sub.2 (RE1.sub.1-y RE2.sub.y).sub.m+1 Cu.sub.2 O.sub.z(wherein [B] stands for a block layer, AE for an alkaline earth element, RE1 for at least one element selected from the group consisting of lanthanide elements and actinoid elements which form ions of valency of larger than 3, RE2 for at least one element selected from the group consisting of lanthanide elements which form ions of valency of 3 and yttrium, m for a number satisfying the expression m.gtoreq.2, y for a number satisfying the expression 0.ltoreq.y<1, and z for the oxygen content).
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: May 13, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Sumio Ikegawa, Tadao Miura
  • Patent number: 5627139
    Abstract: A HTSC Josephson device wherein the barrier layer is a cubic, conductive material.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: May 6, 1997
    Assignee: The Regents of the University of California
    Inventors: David K. Chin, Theodore Van Duzer
  • Patent number: 5624885
    Abstract: A Josephson junction device includes a substrate, an oxide thin film formed on a portion of the principal surface of the substrate, which is constituted of a single crystal of which lattices shift at angle of 45.degree. to that of the principal surface of the substrate. One of the two portions of the oxide superconductor thin film is formed on the oxide thin film and the other portion of the superconductor thin film is formed on the principal surface of the substrate directly so that the lattices of the two portions of the oxide superconductor thin film are respectively linear up to those of the oxide thin film and the principal surface of the substrate and the grain boundary. The grain boundary which constitutes a weak link of the Josephson junction is formed just on the step portion formed of the oxide thin film.
    Type: Grant
    Filed: September 11, 1995
    Date of Patent: April 29, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Takashi Matsuura, Hideo Itozaki
  • Patent number: 5612545
    Abstract: A SQUID includes a substrate and a superconducting current path of a patterned oxide superconductor material thin film formed on a surface of the substrate. A c-axis of an oxide crystal of the oxide superconductor material thin film is oriented in parallel to the surface of the substrate.
    Type: Grant
    Filed: December 13, 1995
    Date of Patent: March 18, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Matsuura, Saburo Tanaka, Hideo Itozaki
  • Patent number: 5612290
    Abstract: A Josephson junction device is disclosed that includes a single crystalline substrate having a NaCl type crystal structure. The device includes a principal surface having two horizontal planes and a slope inclined at an angle of 5.degree. to 30.degree. between the two horizontal planes. An oxide superconductor thin film is formed on the principal surface of the substrate, which includes first and a second superconducting portions of a first single crystalline oxide superconductor and a second single crystalline oxide superconductor respectively positioned on the two horizontal planes of the substrate. A junction portion of a single crystalline oxide superconductor has a different crystal orientation from the first and the second superconducting portions, and is positioned on the slope of the substrate. Two grain boundaries between each of the first and the second superconducting portions and the junction portion constitute one weak link of the Josephson junction.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: March 18, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Takashi Matsuura, Hideo Itozaki
  • Patent number: 5596206
    Abstract: A new type of superconducting device is disclosed. The device embodies a superconducting ceramic film as an active part. A control electrode is provided on the superconducting film in which a passing current is controlled by applying a voltage on an intermediate portion of the film.
    Type: Grant
    Filed: April 4, 1995
    Date of Patent: January 21, 1997
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 5593950
    Abstract: A lattice matching device includes a substrate having thereon monocrystal regions having different lattice mismatches with respect to a LnBa.sub.2 Cu.sub.3 O.sub.x superconductor. A superconducting thin film is formed on the substrate, which film consists essentially of a superconductor of LnBa.sub.2 Cu.sub.3 O.sub.x wherein Ln represents yttrium or a lanthanide, and 6<x<7. The first and second superconducting thin film portions have different axes of orientation perpendicular to a main surface of the substrate, and arranged in contact with each other or at a distance which allows transmission of electron pairs from one to another.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: January 14, 1997
    Assignee: Nippon Telegraph & Telephone Corporation
    Inventors: Masashi Mukaida, Shintaro Miyazawa, Junya Kobayashi
  • Patent number: 5552373
    Abstract: A Josephson junction device is disclosed having a substrate upon which are located overlying and underlying high critical temperature crystalline oxide superconductive layers separated by an interposed impedance controlling layer. The underlying superconductive layer is limited to a selected area of the substrate while the overlying and interposed layers overlie only a portion of the underlying superconductive layer. Nonsuperconducting oxide layer portions laterally abut the superconductive and interposed layers. A first electrical conductor is attached to the underlying superconductive layer at a location free of overlying oxide layers, and a second electrical conductor contacts the overlying superconductive layer and extends laterally over the adjacent laterally abutting nonsuperconductive layer portion.
    Type: Grant
    Filed: April 10, 1992
    Date of Patent: September 3, 1996
    Assignee: Eastman Kodak Company
    Inventors: John A. Agostinelli, Jose M. Mir, Gerrit Lubberts, Samuel Chen
  • Patent number: 5543630
    Abstract: The edge-defined, film-fed growth technique process is modified to produce a thin ribbon of bi-crystalline sapphire wherein the grain boundary is an essentially straight boundary and the angle is predetermined by selective cutting of the two seeds which are placed closely together during growth. The angle selection is optimized based on the superconducting material to be deposited and the application intended. After the ribbon is pulled, the ribbon is processed by cutting an appropriate section therefrom with the grain boundary. The substrate is polished and the high Tc superconducting material is deposited thereon to produce devices which rely on weak link Josephson junctions.
    Type: Grant
    Filed: January 31, 1995
    Date of Patent: August 6, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: David F. Bliss, Herbert E. Bates
  • Patent number: 5534715
    Abstract: A Josephson junction is disclosed which includes a substrate of a single crystal having a substantially flat surface, a wiring pattern of an oxide superconductor formed on the flat surface of the substrate, and an altered region formed having a width of 300 nm or less and formed in the wiring pattern to intersect the wiring pattern, the crystal orientations of the wiring pattern on both sides of the altered region being equal to each other.
    Type: Grant
    Filed: November 8, 1993
    Date of Patent: July 9, 1996
    Assignees: International Superconductivity Technology Center, NEC Corporation
    Inventors: Christian Neumann, Katsumi Suzuki, Youichi Enomoto, Shoji Tanaka
  • Patent number: 5525582
    Abstract: A Josephson junction device comprising a single crystalline substrate including a principal surface, a layer of the same material as the substrate formed on the principal surface of the substrate so as to form a step on the principal surface, and an oxide superconductor thin film formed on the principal surface of the substrate. The oxide superconductor thin film includes a first and a second superconducting portions respectively positioned above and below the step, which are constituted of single crystals of the oxide superconductor, a junction portion between the first and the second superconducting portions, which is constituted of a single crystal of the oxide superconductor of which crystal orientation is different from those of the first and second superconducting portions, and grain boundaries between the first superconducting portion and the junction portion and between the second superconducting portion and the junction portion, which constitute one weak link of the Josephson junction.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: June 11, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Takashi Matsuura, Hideo Itozaki
  • Patent number: 5488030
    Abstract: There is disclosed a superconductor junction structure comprising: a first superconducting layer of an oxide superconductor formed in a desired pattern on a substrate; a non-superconducting layer of a non-superconductor formed on at least a part of the side faces of the first superconducting layer, a portion of the surface of the substrate near the part, and a top face of the first superconducting layer; and a second superconducting layer of the oxide superconductor formed on the non-superconducting layer, the non-superconducting layer being formed thin at the part, and forming a tunnel barrier.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: January 30, 1996
    Assignee: Sumitomo Electric Industries, Inc.
    Inventors: Saburo Tanaka, Takashi Matsuura, Hideo Itozaki
  • Patent number: 5480859
    Abstract: A superconductor device is provided including a base, a base electrode formed on the base which is made of a Bi-system oxide superconductive material containing an alkaline earth metal, a barrier layer formed on the base electrode which is made of Bi--Sr--Cu--O, a counter electrode formed on the barrier layer which is made of a Bi-system oxide superconductive material containing an alkaline earth metal, a contact electrode formed so as contact with the counter electrode, and a separation layer for separating said contact electrode from said base electrode.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: January 2, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Mizuno, Hidetaka Higashino, Kentaro Setsune
  • Patent number: 5472934
    Abstract: An anisotropic superconductor junction device consisting of a lower superconducting layer and an upper superconducting layer separated by a barrier layer, in which the upper and lower superconducting layers and the barrier layer each have a (103) crystal orientation in which the c axis is arranged in the same direction at an angle of 45 degrees relative to the plane of the junction.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: December 5, 1995
    Assignees: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Hiroshi Akoh, Hiroshi Sato
  • Patent number: 5468973
    Abstract: A stacked Josephson junction device includes a pair of copper oxide superconductor layers and a non-superconductor layer formed between the pair of oxide superconductor layers. The copper oxide superconductor layers are composed of a compound copper oxide having the composition expressed by the general formula:LnBa.sub.2 Cu.sub.3 O.sub.v(where Ln is Y or rare earth element and 6<v.ltoreq.7).The non-superconductor layer is composed of a chemical compound having the composition expressed by the general formula:Bi.sub.2 Y.sub.x Sr.sub.y Cu.sub.z O.sub.w(where x, y, z and w indicate ratio of components0.ltoreq.x.ltoreq.2,1.ltoreq.y.ltoreq.3,1.ltoreq.z.ltoreq.3,6.ltoreq.w.ltoreq.13.
    Type: Grant
    Filed: March 31, 1994
    Date of Patent: November 21, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keizo Harada, Hideo Itozaki
  • Patent number: 5468723
    Abstract: A superconducting device has a structure of superconductor--normal--conductor (semiconductor)--superconductor. The superconducting regions and the normal-conductor region can be made of the same elements but having different relative proportions of the elements. The device can be fabricated by introducing at least one element into an unmasked region of the superconductor to form a normal conductor region or into unmasked regions of the normal conductor to form superconductor regions.
    Type: Grant
    Filed: May 4, 1994
    Date of Patent: November 21, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Haruhiro Hasegawa, Ushio Kawabe
  • Patent number: 5446016
    Abstract: A method for forming a patterned oxide superconductor thin film on a substrate comprises steps of forming a metal or semi-metal layer on a portion of the substrate, on which the oxide superconductor thin film will be formed, forming a layer of a material including silicon on a portion of the substrate, on which an insulating layer will be formed, removing the metal or semi-metal layer and depositing an oxide superconductor thin film over the substrate.
    Type: Grant
    Filed: February 15, 1994
    Date of Patent: August 29, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: So Tanaka, Takao Nakamura, Michitomo Iiyama
  • Patent number: 5438036
    Abstract: A SQUID comprises a substrate, a washer of an oxide superconductor thin film formed on a principal surface of the substrate, a hole shaped a similar figure to the washer at the center of the washer, a slit formed between one side of the washer and the hole, and a Josephson junction which connects portions of the washer at the both sides of the slit across the slit. In the SQUID, the ratio of similarity of the washer to the hole ranges 100 to 2500.
    Type: Grant
    Filed: April 19, 1993
    Date of Patent: August 1, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Matsuura, Hideo Itozaki
  • Patent number: 5422497
    Abstract: A superconducting device includes a first thin film of oxide superconductor material formed on a substrate, a second thin film of insulator material stacked on the first thin film of oxide superconductor material, and a third thin film of oxide superconductor material formed on the second thin film of insulator material. The second thin film of insulator material is formed of an amorphous oxide including the same constituent elements as those of the oxide superconductor material of the first thin film. The second thin film of insulator material is formed by heat-treating the first thin film of oxide superconductor material in a gaseous atmosphere bringing a surface of the oxide superconductor material into an amorphous condition, after the first thin film of oxide superconductor material has been formed on the substrate.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: June 6, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Mitsuchika Saitoh, Sou Tanaka, Michitomo Iiyama
  • Patent number: 5422337
    Abstract: A Josephson junction device comprising a single crystalline substrate including a principal surface having two horizontal planes and a smooth slope between the two horizontal planes, and an oxide superconductor thin film formed on the principal surface of the substrate. The oxide superconductor thin film includes a first and a second superconducting portions of a single crystalline oxide superconductor respectively positioned on the two horizontal planes of the substrate, a junction portion of a single crystalline oxide superconductor having a different crystal orientation from the two superconducting portions positioned on the slope of the substrate and two grain boundaries between each of the two superconducting portions and the junction portion. The grain boundaries constitutes one weak link of the Josephson junction.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: June 6, 1995
    Assignee: Sumitomo Electric Industries
    Inventors: Saburo Tanaka, Takashi Matsuura, Hideo Itozaki
  • Patent number: 5420100
    Abstract: A planar SQUID magnetometer for detection and measurement of an applied magnetic flux is disclosed wherein a planar microwave-resonant element overlaps a Josephson device incorporated in a high-T.sub.c superconducting, thin-film SQUID device, thereby providing inductive coupling between the planar microwave-resonant element and the SQUID device. When the microwave-resonant element is excited by incident high-frequency microwave radiation, the intensity of reflected microwave radiation varies in response to a magnetic flux applied to the SQUID device in accordance with non-linear oscillatory behavior of the microwave-resonant element due to inductive loading by the SQUID device. The microwave-resonant element and the SQUID device are preferably fabricated photolithographically on a single substrate.
    Type: Grant
    Filed: April 5, 1991
    Date of Patent: May 30, 1995
    Assignee: Northeastern University
    Inventors: Carmine Vittoria, Allan Widom, Yizhou Huang, Hoton How
  • Patent number: 5416072
    Abstract: A superconducting device has a superconducting channel formed of an oxide superconductor on the principal surface of a substrate. A source electrode and a drain electrode likewise formed of oxide superconductor, are electrically connected by the channel to provide for superconducting current flow. A superconducting gate electrode is isolated by a side insulating region which completely covers each of opposite side surfaces of the gate electrode. The relative thicknesses of both the source and drain electrodes are much greater than that of the channel thickness. The superconducting channel and the gate insulator are both formed by one oxide thin film, and in a preferred embodiment, the gate electrode likewise is provided by the same film which forms the gate insulator and channel.
    Type: Grant
    Filed: July 26, 1993
    Date of Patent: May 16, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Michitomo Iiyama
  • Patent number: 5399881
    Abstract: A hysteretic high-T.sub.c trilayer Josephson junction, and a method of forming the same are disclosed. The junction includes lower and upper high T.sub.c superconducting cuprate films separated by a barrier layer, where the thin films each include a molecular junction layer adjacent the barrier layer which is characterized by a high-T.sub.c cuprate stoichiometry and crystal structure, and a flat two-dimensional surface, as evidenced by its electron diffraction pattern using reflected high-energy electron diffraction. The junction and barrier layers in the junction are formed by atomic layer-by-layer deposition.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: March 21, 1995
    Assignee: Varian Associates, Inc.
    Inventors: Ivan Bozovic, James N. Eckstein, Martin E. Klausmeier-Brown, Gary F. Virshup
  • Patent number: 5378683
    Abstract: The disclosure relates to a Josephson junction formed by a non-superconducting barrier between two superconducting films of the (R) BaCuO (R=rare earth) group. In order to take advantage of the greater coherence length of superconductors along the CuO planes, i.e. perpendicularly to the long axis "c" of the crystal unit cell, the superconducting film is oriented so that the axis "c" is parallel to the plane of the junction. The device can be applied to Josephson junctions and to SQUIDs.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: January 3, 1995
    Assignee: Thomson-CSF
    Inventors: Regis Cabanel, Guy Garry, Alain Schuhl, Bruno Ghyselen
  • Patent number: 5376624
    Abstract: A Josephson break junction device suitable for highly sensitive electronic detecting systems. A superconductor film such as YBa.sub.2 Al.sub.3 O.sub.7 is deposited on a substrate such as a single-crystal MgO. The film is fractured across a narrow strip by at least one indentation in the substrate juxtaposed from the strip to form a break junction. A transducer is affixed to the substrate for applying a bending movement to the substrate to regulate the distance across the gap formed at the fracture to produce a Josephson turned junction effect. Alternatively, or in addition to the transducer, a bridge of a nobel metal is applied across the gap to produce a weak-link junction.
    Type: Grant
    Filed: October 10, 1991
    Date of Patent: December 27, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Ignacio M. Perez, William R. Scott
  • Patent number: 5366953
    Abstract: A novel method of producing weak-link grain boundary Josephson junctions in high temperature superconducting thin films is disclosed. These junctions are reliably and reproducibly formed on uniform planar substrates (10) by the action of a seed layer (40) placed intermediate the substrate (10) and the superconductor film (20). The superconductor film (22) grown atop the seed (42) is misoriented from the rest of the film (24) by an angle between 5.degree. and 90.degree.. The grain boundary (30) so formed acts as a high quality weak-link junction for superconductor devices. The performance of these junctions can be improved by the addition of buffer layers (50, 60) between the substrate (10) and the superconductor film (20).
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: November 22, 1994
    Assignee: Conductus, Inc.
    Inventors: Kookrin Char, Stephen M. Garrison, Nathan Newman, Gregory G. Zaharchuk
  • Patent number: 5367178
    Abstract: A microbridge superconductor device includes a substrate, made of a material such as LaAlO.sub.3, having a lower planar substrate surface, an inclined surface having an overall upward inclination of from about 20 to about 80 degrees from the plane of the lower planar substrate surface, and an upper planar substrate surface parallel to the lower planar substrate surface and separated from the lower planar substrate surface by the inclined surface. A layer of a c-axis oriented superconductor material, made of a material such as YBa.sub.2 Cu.sub.3 O.sub.7-x, is epitaxially deposited on the lower planar substrate surface, and has an exposed a-axis edge adjacent the intersection of the lower planar substrate surface with the inclined surface. The a-axis exposed edge is beveled away from the intersection. A layer of a c-axis oriented superconductor material is epitaxially deposited on the upper planar substrate surface, and has an exposed a-axis edge adjacent the inclined surface.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: November 22, 1994
    Assignee: Biomagnetic Technologies, Inc.
    Inventors: Mark S. DiIorio, Shozo Yoshizumi, Kai-Yueh Yang
  • Patent number: 5364836
    Abstract: Disclosed is an article that comprises a superconductor-insulator (s-i) layer structure. The superconductor material has nominal composition Ba.sub.1-x M.sub.x BiO.sub.3-y (M is K, Rb, or K and Rb, 0.35<x.ltorsim.0.5, 0<y.ltorsim.0.25). In some preferred embodiments the insulator is a Ba- and Bi containing oxide, exemplarily BaBi.sub.2 O.sub.4, Ba.sub.1-x M.sub.x BiO.sub.3 (0.ltoreq.x<0.35), or Ba.sub.1-x Bi.sub.1+x O.sub.3 (0.ltoreq.x.ltorsim.0.5). In other embodiments the insulator is an insulating oxide with the NaCl structure (e.g., Mg.sub.1-x Ca.sub.x O), an insulating perovskite (e.g., BaZrO.sub.3 ), an insulator with the K.sub.2 NiF.sub.4 structure (e.g., Ba.sub.2 PbO.sub.4), an insulating fluoride with the BaF.sub.2 structure (e.g., Ba.sub.1-x Sr.sub.x F.sub.2), or an insulating fluoride with the NaCl structure (e.g., LiF). Disclosed are also advantageous methods of making an article according to the invention.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: November 15, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Robert C. Dynes, Elliot H. Hartford, Jr., Eric S. Hellman, Andrew N. Pargellis, Fred Sharifi
  • Patent number: 5362709
    Abstract: A superconducting tunnel junction is disclosed herein. The superconducting tunnel junction is characterized in that a pair of oxide superconducting layers thereof and a tunnel barrier layer located between the oxide superconducting layers have the same or almost the same crystal structure and the same or almost the same lattice constant in a direction of a, b, or c axis. The layers have good crystallization.
    Type: Grant
    Filed: October 22, 1991
    Date of Patent: November 8, 1994
    Assignee: Semiconductor Energy Laboratory, Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 5358928
    Abstract: A process for formulating non-hysteretic and hysteretic Josephson junctions using HTS materials which results in junctions having the ability to operate at high temperatures while maintaining high uniformity and quality. The non-hysteretic Josephson junction is formed by step-etching a LaAlO.sub.3 crystal substrate and then depositing a thin film of TlCaBaCuO on the substrate, covering the step, and forming a grain boundary at the step and a subsequent Josephson junction. Once the non-hysteretic junction is formed the next step to form the hysteretic Josephson junction is to add capacitance to the system. In the current embodiment, this is accomplished by adding a thin dielectric layer, LaA1O.sub.3, followed by a cap layer of a normal metal where the cap layer is formed by first depositing a thin layer of titanium (Ti) followed by a layer of gold (Au). The dielectric layer and the normal metal cap are patterned to the desired geometry.
    Type: Grant
    Filed: September 22, 1992
    Date of Patent: October 25, 1994
    Assignee: Sandia Corporation
    Inventors: David S. Ginley, Vincent M. Hietala, Gert K. G. Hohenwarter, Jon S. Martens, Thomas A. Plut, Chris P. Tigges, Gregory A. Vawter, Thomas E. Zipperian
  • Patent number: 5358925
    Abstract: An HTSC material epitaxially deposited on a YSZ buffer layer on a surface of a monocrystalline silicon substrate has a zero resistance transition temperature of at least 85.degree. K., a transition width (10-90%) of no more than 1.0.degree. K., a resistivity at 300.degree. K. of no more than 300 micro-ohms-centimeter and a resistivity ratio (at 300.degree. K./100.degree. K.) of 3.0.+-. 0.2. The surface of the silicon substrate is cleaned using a spin-etch process to produce an atomically clean surface terminated with an atomic layer of an element such as hydrogen with does not react with silicon. The substrate can be moved to a deposition chamber without contamination. The hydrogen is evaporated in the chamber, and then YSZ is epitaxially deposited preferably by laser ablation. Thereafter, the HTSC material, such as YBCO, is epitaxially deposited preferably by laser ablation. The structure is then cooled in an atmosphere of oxygen.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: October 25, 1994
    Assignee: Board of Trustees of the Leland Stanford Junior University
    Inventors: George A. Neville Connell, David B. Fenner, James B. Boyce, David K. Fork
  • Patent number: 5347157
    Abstract: A multilayer structure comprising in order: a (111)-oriented single crystal substrate and an epitaxial metal oxide buffer layer. The substrate is doped or undoped. The substrate is a semiconductor selected from the group consisting of Si compounds, Ge compounds, and compounds having at least one element selected from the group consisting of Al, Ga, and In and at least one element selected from the group consisting of N, P, As, and Sb. The substrate defines a substrate superlattice dimension equal to 3 times a sublattice constant of the substrate. The epitaxial metal oxide buffer layer has a three-fold rotation symmetry about the substrate (111) direction. The buffer layer defines a buffer layer superlattice dimension equal to 4 times the oxygen-to-oxygen lattice spacing of the buffer layer. The buffer layer superlattice dimension is within 15 percent of the substrate superlattice dimension.
    Type: Grant
    Filed: December 17, 1992
    Date of Patent: September 13, 1994
    Assignee: Eastman Kodak Company
    Inventors: Liang-Sun Hung, John A. Agostinelli, Jose M. Mir
  • Patent number: 5334580
    Abstract: A superconducting device has a structure of superconductor - normal-conductor (semiconductor) - superconductor. The superconductors constituting the superconducting device are made of a superconducting oxide material of K.sub.2 NiF.sub.4 type crystal-line structure or perovskite type crystalline structure which contains at least one element selected from the group consisting of Ba, Sr, Ca, Mg and Ra; at least one element selected from the group consisting of La, Y, Ce, Sc, Sm, Eu, Er, Gd, Ho, Yb, Nd, Pr, Lu and Tb; Cu; and O.
    Type: Grant
    Filed: January 14, 1993
    Date of Patent: August 2, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Haruhiro Hasegawa, Ushio Kawabe
  • Patent number: 5326745
    Abstract: Superconducting device include a type having a structure of a superconductor--a normal-conductor (or a semiconductor)--a superconductor, and a type having a superconducting weak-link portion between superconductors.The superconductors constituting the superconducting device are made of an oxide of either of perovskite type and K.sub.2 NiF.sub.4 type crystalline structures, containing at least one element selected from the group consisting of Ba, Sr, Ca, Mg, and Ra; at least one element selected from the group consisting of La, Y, Ce, Sc, Sm, Eu, Er, Gd, Ho, Yb, Nd, Pr, Lu, and Tb; Cu; and O. In addition, the c-axis of the crystal of the superconductor is substantially perpendicular to the direction of current flowing through this superconductor.
    Type: Grant
    Filed: March 17, 1992
    Date of Patent: July 5, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Ushio Kawabe, Yoshinobu Tarutani, Shinya Kominami, Toshiyuki Aida, Tokuumi Fukazawa, Mutsuko Hatano
  • Patent number: 5324714
    Abstract: A method, and the resulting structure, of growing a superconducting perovskite thin film of, for example, YBa.sub.2 Cu.sub.3 O.sub.7-x. A buffer layer of, for example, the perovskite PrBa.sub.2 Cu.sub.3 O.sub.7-y, is grown on a crystalline (001) substrate under conditions which favor growth of a,b-axis oriented material. Then the YBa.sub.2 Cu.sub.3 O.sub.7-x layer is deposited on the buffer layer under changed growth conditions that favor growth of c-axis oriented material on the substrate, for example, the substrate temperature is raised by 110.degree. C. However, the buffer layer acts as a template that forces the growth of a,b-axis YBa.sub.2 Cu.sub.3 O.sub.7-x, which nonetheless shows a superconducting transition temperature near that of c-axis oriented films.
    Type: Grant
    Filed: May 19, 1993
    Date of Patent: June 28, 1994
    Assignee: Bell Communications Research, Inc.
    Inventors: Arun Inam, Ramamoorthy Ramesh, Charles T. Rogers, Jr.
  • Patent number: 5321004
    Abstract: A Josephson break junction device suitable for highly sensitive electronic detecting systems. A superconductor film such as YBa.sub.2 Cu.sub.3 O.sub.7 is deposited on a substrate such as a simple-crystal MgO. The film is fractured across a narrow strip by at least one indentation in the substrate juxtaposed from the strip to form a break junction. A transducer is affixed to the substrate for applying a bending movement to the substrate to regulate the distance across the gap formed at the fracture to produce a Josephson turned junction effect. Alternatively, or in addition to the transducer, a bridge of a novel metal is applied across the gap to produce a weak-link junction.
    Type: Grant
    Filed: September 17, 1992
    Date of Patent: June 14, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Ignacio M. Perez, William R. Scott
  • Patent number: 5306705
    Abstract: A non-linear superconducting junction device comprising a layer of high transient temperature superconducting material which is superconducting at an operating temperature, a layer of metal in contact with the layer of high temperature superconducting material and which remains non-superconducting at the operating temperature, and a metal material which is superconducting at the operating temperature and which forms distributed Sharvin point contacts with the metal layer.
    Type: Grant
    Filed: May 6, 1993
    Date of Patent: April 26, 1994
    Assignee: Board of Trustees of the Leland Stanford Junior University
    Inventors: Matthew J. Holcomb, William A. Little
  • Patent number: 5304538
    Abstract: Epitaxial heterojunctions formed between high temperature superconductors and metallic or semiconducting oxide barrier layers are provided. Metallic perovskites such as LaTiO.sub.3, CaVO.sub.3, and SrVO.sub.3 are grown on electron-type high temperature superconductors such as Nd.sub.1.85 Ce.sub.0.15 CuO.sub.4-x. Alternatively, transition metal bronzes of the form A.sub.x MO.sub.3 are epitaxially grown on electron-type high temperature superconductors. Also, semiconducting oxides of perovskite-related crystal structures such as WO.sub.3 are grown on either hole-type or electron-type high temperature superconductors.
    Type: Grant
    Filed: March 11, 1992
    Date of Patent: April 19, 1994
    Assignee: The United States of America as repeated by the Administrator of the National Aeronautics and Space Administration
    Inventors: Richard P. Vasquez, Brian D. Hunt, Marc C. Foote
  • Patent number: 5304817
    Abstract: A superconductive circuit is fabricated on a substrate with a major surface, and comprises a wiring layer of superconductive oxide with the a-b plane orientation substantially parallel to the major surface, and a Josephson junction electrically coupled with the wiring layer, wherein the josephson junction comprises a lower electrode of superconductive oxide having the a-b plane orientation substantially perpendicular to the major surface and embedded into the wiring layer so that the structure achieves both long coherent length desirable for large design margin of the junction as well as large amount of current passing through the wiring layer.
    Type: Grant
    Filed: May 22, 1992
    Date of Patent: April 19, 1994
    Assignee: NEC Corporation
    Inventor: Ichiro Ishida
  • Patent number: 5292718
    Abstract: Improvement in a process for fabricating a superconducting junction by depositing successively a first oxide superconductor thin layer, a non-superconducting intermediate thin film layer and a second oxide superconductor thin film layer on a substrate in this order.In the invention, the non-superconducting intermediate thin film layer is composed of MgO and the substrate is preheated at 600.degree.-650.degree. C. for at least 5 minutes in the presence of O.sub.2, and is heated at a temperature between 200.degree. and 400.degree. C. during the non-superconducting intermediate thin film layer is deposited.
    Type: Grant
    Filed: October 6, 1992
    Date of Patent: March 8, 1994
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Hidenori Nakanishi, Hideo Itozaki, Takashi Matsuura
  • Patent number: 5291035
    Abstract: A microelectronic component comprising a crossover is provided comprising a substrate, a first high T.sub.c superconductor thin film, a second insulating thin film comprising SrTiO.sub.3 ; and a third high T.sub.c superconducting film which has strips which crossover one or more areas of the first superconductor film. An in situ method for depositing all three films on a substrate is provided which does not require annealing steps and which can be opened to the atmosphere between depositions.
    Type: Grant
    Filed: March 10, 1993
    Date of Patent: March 1, 1994
    Assignee: The Regents of the University of California
    Inventors: Frederick C. Wellstood, John J. Kingston, John Clarke
  • Patent number: 5287302
    Abstract: A superconducting optically reconfigurable device (SORD) wherein predetermined and optically achieved patterns of superconducting material generate Meissner effect magnetic flux to achieve control of physical characteristics in local areas of an adjacent film of electromagnetic energy controlling material. The superconducting material magnetic flux is remembered by way of a cycle wherein selected portions of the material are elevated from the superconducting temperature range through the critical temperature T.sub.c into the non-superconducting state while in the presence of a writing magnetic field and then cooled through the critical temperature T.sub.c to permanently retain the writing magnetic flux in the area of temporary optical warming. The pattern of magnetic flux thusly achieved is coupled to one of several possible electromagnetic energy influencing or controlling materials which also have magnetic flux susceptibility.
    Type: Grant
    Filed: June 22, 1992
    Date of Patent: February 15, 1994
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Joseph E. Brandelik, Andrew H. Suzuki