High Temperature (i.e., >30o Kelvin) Patents (Class 257/33)
  • Patent number: 5278140
    Abstract: A method is disclosed for fabricating grain boundary junction devices, which comprises preparing a crystalline substrate containing at least one grain boundary therein, epitaxially depositing a high Tc superconducting layer on the substrate, patterning the superconducting layer to leave at least two superconducting regions on either side of the grain boundary and making electrical contacts to the superconducting regions so that bias currents can be produced across the grain boundary.
    Type: Grant
    Filed: September 16, 1992
    Date of Patent: January 11, 1994
    Assignee: International Business Machines Corporation
    Inventors: Praveen Chaudhari, Cheng-Chung J. Chi, Duane B. Dimos, Jochen D. Mannhart, Chang C. Tsuei
  • Patent number: 5274249
    Abstract: A superconducting field effect device includes a substrate with an epitaxial superconducting film upon it and an insulating layer above a thinner region of the film which protects the film from the atmosphere and isolates it from a gate electrode which is on the insulating layer above a channel region of the thin film, and the epitaxial film has thicker regions suitable for contact to source and drain electrodes. Gate electrodes may be isolated from and oppose both sides of the superconducting thin regions so that enhanced modulation of a current in the thin region is provided.The invention provides high speed and high efficiency switches and modulators.
    Type: Grant
    Filed: December 20, 1991
    Date of Patent: December 28, 1993
    Assignee: University of Maryland
    Inventors: Xiaoxing Xi, Chris Doughty, Thirumalai Venkatesan
  • Patent number: 5266558
    Abstract: These superconducting circuit elements, namely SNS heterostructures, such as, e.g. Josephson junctions and field-effect transistors, have a sandwich structure consisting of at least one layer of high-T.sub.c superconductor material arranged adjacent to a metallic substrate, possibly with an insulating layer in between, the substrate, the superconductor and--if present--the insulator all consisting of materials having at least approximately matching molecular structures and lattice constants. Electrical contacts, such as source, drain and gate electrodes are attached to the superconductor layer and to the substrate, respectively. The electrically conductive substrate consists of a metallic oxide such as strontium ruthenate Sr.sub.2 RuO.sub.4, whereas the superconductor layer is of the copper oxide type and may be YBa.sub.2 Cu.sub.3 O.sub.7-.delta., for example. The insulator layer (10) may consist of SrTiO.sub.3.
    Type: Grant
    Filed: February 27, 1992
    Date of Patent: November 30, 1993
    Assignee: International Business Machines Corporation
    Inventors: Frank Lichtenberg, Jochen Mannhart, Darrell Schlom
  • Patent number: 5266815
    Abstract: Technology for using a wiring of a superconductive material in semiconductor integrated circuit device. An isolation layer and/or a barrier layer are provided for preventing diffusion of harmful composition of the superconductive material for the semiconductor device. Control of a circuit can be made utilizing the characteristics of a superconductive material. Also, the characteristics of a superconductive material may be controlled. A method of forming a layer of superconductive material, well compatible with the widely used process of manufacturing integrated circuit devices, is also disclosed.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: November 30, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Sunami, Toshikazu Nishino, Shoji Shukuri, Yasuo Wada, Yutaka Misawa, Takahiko Kato
  • Patent number: 5260264
    Abstract: One or more superconducting memory cells capable of storing binary values as the presence or absence of a persisting loop current in their superconducting memory loops are connected in series by a circuit current line. This arrangement is provided with a set gate which switches to the voltage state and outputs circuit current from its output terminal to one end of the circuit current line when write command current is supplied to its control terminal and is further provided with a sense gate whose control terminal is series coupled though a capacitance element with the same one end of the circuit current line and whose ground side terminal is connected with the other end of the circuit control line thereby forming through the sense gate a read-out loop for receiving as differential current persisting loop current selectively discharged from the memory loop. The differential current causes the sense gate to switch itself to the voltage state and output a sense current.
    Type: Grant
    Filed: March 4, 1991
    Date of Patent: November 9, 1993
    Assignees: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Itaru Kurosawa, Hiroshi Nakagawa, Masahiro Aoyagi
  • Patent number: 5256636
    Abstract: A microelectronic component comprising a crossover is provided comprising a substrate, a first high T.sub.c superconductor thin film, a second insulating thin film comprising SrTiO.sub.3 ; and a third high T.sub.c superconducting film which has strips which crossover one or more areas of the first superconductor film. An insitu method for depositing all three films on a substrate is provided which does not require annealing steps. The photolithographic process is used to separately pattern the high T.sub.c superconductor thin films.
    Type: Grant
    Filed: September 21, 1990
    Date of Patent: October 26, 1993
    Assignee: The Regents of the University of Calif.
    Inventors: Frederick C. Wellstood, John J. Kingston, John Clarke
  • Patent number: 5256897
    Abstract: An oxide superconducting device has a junction structure composed of at least one oxide superconductor and at least one insulator in which carriers have been generated. As the insulator in which carriers have been generated, there can be used, for example, SrTiO.sub.3 doped with Nb. With such a device, rectifying characteristics can be attained in the junction.
    Type: Grant
    Filed: July 10, 1991
    Date of Patent: October 26, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiro Hasegawa, Toshiyuki Aida, Toshikazu Nishino, Mutsuko Hatano, Hideaki Nakane, Tokuumi Fukazawa
  • Patent number: 5252551
    Abstract: An article of manufacture including a substrate, a patterned interlayer of a material selected from the group consisting of magnesium oxide, barium-titanium oxide or barium-zirconium oxide, the patterned interlayer material overcoated with a secondary interlayer material of yttria-stabilized zirconia or magnesium-aluminum oxide, upon the surface of the substrate whereby an intermediate article with an exposed surface of both the overcoated patterned interlayer and the substrate is formed, a coating of a buffer layer selected from the group consisting of cerium oxide, yttrium oxide, curium oxide, dysprosium oxide, erbium oxide, europium oxide, iron oxide, gadolinium oxide, holmium oxide, indium oxide, lanthanum oxide, manganese oxide, lutetium oxide, neodymium oxide, praseodymium oxide, plutonium oxide, samarium oxide, terbium oxide, thallium oxide, thulium oxide, yttrium oxide and ytterbium oxide over the entire exposed surface of the intermediate article, and, a ceramic superco nFIELD OF THE INVENTIONThe pre
    Type: Grant
    Filed: December 27, 1991
    Date of Patent: October 12, 1993
    Assignee: The United States of America as represented by the Department of Energy
    Inventors: Xin D. Wu, Ross E. Muenchausen
  • Patent number: 5247189
    Abstract: A tunnel junction type superconducting device includes a pair of superconductor electrodes formed of compound oxide superconductor material, and a metal layer of a high electric conductivity formed between the pair of superconductor electrodes so as to maintain the pair of superconductor electrodes separate from each other. The pair of superconductor electrodes is separated from each other by a distance within a range of 3 nm to 70 nm by action of the metal layer.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: September 21, 1993
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Hideo Itozaki, Shuji Yazu
  • Patent number: 5240906
    Abstract: An inverted MISFET structure with a high transition temperature superconducting channel comprises a gate substrate, an interfacial layer with one or more elements of the VIII or IB subgroup of the periodic table of elements, an insulating layer and a high transition temperature superconducting channel. An electric field, generated by a voltage applied to its gate alters the conductivity of the channel.
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: August 31, 1993
    Assignee: International Business Machines Corporation
    Inventors: Johannes G. Bednorz, Jochen D. Mannhart, Carl A. Mueller, Darrell Schlom
  • Patent number: 5241191
    Abstract: A cubic perovskite crystal structure is disclosed satisfying the unit cell formula:R.sub.0.33+z A.sub.0.67 C.sub.1-y O.sub.3-xwhereR, A and C represent rare earth, alkaline earth and copper atoms, respectively, capable of forming a superconductive R.sub.1 A.sub.2 C.sub.3 orthorhombic perovskite crystal structure;x is 0.67 to 1.0;y is up to 0.2; andz is up to 0.1.The crystal structure can be used to form superconductive superlattices and weak links for Josephson junction devices. The crystal structure can be produced by laser ablation deposition at a temperature below that required for the formation of a superconductive R.sub.1 A.sub.2 C.sub.3 orthorhombic perovskite crystal structure. The crystal structure can be used as a substrate for the subsequent deposition of an R.sub.1 A.sub.2 C.sub.3 orthorhombic perovskite crystal structure.
    Type: Grant
    Filed: December 31, 1991
    Date of Patent: August 31, 1993
    Assignee: Eastman Kodak Company
    Inventors: John A. Agostinelli, Samuel Chen
  • Patent number: 5232905
    Abstract: A superconducting device has a structure of superconductor - normal-conductor (semiconductor) - superconductor. The superconductors constituting the superconducting device are made of a super-conducting oxide material of K.sub.2 NiF.sub.4 type crystalline structure or perovskite type crystalline structure which contains at least one element selected from the group consisting of Ba, Sr, Ca, Mg and Ra; at least one element selected from the group consisting of La, Y, Ce, Sc, Sm, Eu, Er, Gd, Ho, Yb, Nd, Pr, Lu and Tb; Cu; and O.
    Type: Grant
    Filed: August 7, 1991
    Date of Patent: August 3, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Haruhiro Hasegawa, Ushio Kawabe
  • Patent number: 5215960
    Abstract: In a method of manufacturing a superconducting device which has a first thin film of oxide superconductor material formed on a substrate and a second thin film formed on the first thin film of oxide superconductor material, after the second thin film is deposited on the first thin film of oxide superconductor material, a multi-layer structure formed of the first and second thin films is patterned so that a side surface of the first thin film is exposed. In this condition, the whole of the substrate is heated in an O.sub.2 atmosphere or in an O.sub.3 atmosphere so that oxygen is entrapped into the first thin film of oxide superconductor material. Thereafter, the patterned multi-layer structure is preferably covered with a protection coating.
    Type: Grant
    Filed: July 16, 1991
    Date of Patent: June 1, 1993
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Sou Tanaka, Mitsuchika Saitoh, Michitomo Iiyama
  • Patent number: 5179072
    Abstract: A multispectural superconductive quantum radiant energy detector and related method utilizing a closed loop of superconductive material having spaced legs, one of which is disposed to ambient. The superconductivity current is divided in the first and second legs according to geometric and kinetic inductances. A ground plane is provided for minimizing the geometric inductance with the loop during injection and removal of the current.
    Type: Grant
    Filed: December 10, 1990
    Date of Patent: January 12, 1993
    Assignee: Westinghouse Electric Corp.
    Inventor: Nathan Bluzer
  • Patent number: 5179426
    Abstract: A transistor structure which utilizes the Josephson effect and/or tunneling effect. The Josephson transistors of the invention are composed of superconductive films and tunneling films and work at a high speed with a low energy consumption. They are suitable for the construction of integrated circuits, especially digital circuits.
    Type: Grant
    Filed: August 1, 1988
    Date of Patent: January 12, 1993
    Assignee: Seiko Epson Corporation
    Inventor: Seiichi Iwamatsu
  • Patent number: 5179070
    Abstract: A semiconductor substrate such as silicon single crystal having a thin film of a superconducting material composed of a compound oxide whose critical temperature is higher than 30 K such as Ln.sub.1 Ba.sub.2 Cu.sub.3 O.sub.7-.delta. (Ln is Y or lanthanide), characterized in that a buffer layer composed of ZrO.sub.2, MgO containing or not containing metal element such as Ag is interposed between the semiconductor substrate and the superconducting thin film.
    Type: Grant
    Filed: July 2, 1991
    Date of Patent: January 12, 1993
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keizo Harada, Hideo Itozaki, Naoji Fujimori, Shuji Yazu, Tetsuji Jodai
  • Patent number: 5162298
    Abstract: High T.sub.c superconducting devices are described in which controlled grain boundaries in a layer of the superconductors forms a weak link or barrier between superconducting grains of the layer. A method is described for reproducibly fabricating these devices, including first preparing a substrate to include at least one grain boundary therein. A high T.sub.c superconductor layer is then epitaxially deposited on the substrate in order to produce a corresponding grain boundary in the superconducting layer. This superconducting layer is then patterned to leave at least two regions on either side of the grain boundary, the two regions functioning as contact areas for a barrier device including the grain boundary as a current flow barrier. Electrical contacts can be made to the superconducting regions so that bias currents can be produced across the grain boundary which acts as a tunnel barrier or weak link connection.
    Type: Grant
    Filed: February 16, 1988
    Date of Patent: November 10, 1992
    Assignee: International Business Machines Corporation
    Inventors: Praveen Chaudhari, Cheng-Chung J. Chi, Duane B. Dimos, Jochen D. Mannhart, Chang C. Tsuei