Magnetic Field Patents (Class 257/421)
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Patent number: 10985211Abstract: An embedded MRAM structure includes a substrate divided into a memory cell region and a logic device region. An active area is disposed in the memory cell region. A word line is disposed on the substrate and crosses the active area. A source plug is disposed in the active area and at one side of the word line. A drain plug is disposed in the in the active area and at another side of the word line. When viewing from a direction perpendicular to the top surface of the substrate and taking the word line as a symmetric axis, the source plug is a mirror image of the drain plug.Type: GrantFiled: December 2, 2019Date of Patent: April 20, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Ting-Hsiang Huang
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Patent number: 10985312Abstract: A method of fabricating an MRAM device includes forming a bottom electrode over a semiconductor substrate, forming a magnetic tunnel junction (MTJ) structure on the bottom electrode, and forming a top electrode on the MTJ structure. The method also includes forming spacers on sidewalls of the top electrode and the MTJ structure, and depositing a first dielectric layer to surround the spacers. The method further includes selectively depositing a patterned etch stop layer on the first dielectric layer and the spacers. In addition, the method includes depositing a second dielectric layer on the patterned etch stop layer and the top electrode, forming a via hole in the second dielectric layer to expose the top electrode, and forming a top electrode via in the via hole.Type: GrantFiled: June 13, 2019Date of Patent: April 20, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Hao Liao, Hsi-Wen Tien, Chih-Wei Lu, Pin-Ren Dai, Chung-Ju Lee
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Patent number: 10978234Abstract: A magnetic stack includes a first element including a ferromagnetic layer; a second element including a metal layer able to confer on the assembly formed by the first and the second elements a magnetic anisotropy perpendicular to the plane of the layers. The first element further includes a refractory metal material, the second element being arranged on the first element.Type: GrantFiled: February 15, 2019Date of Patent: April 13, 2021Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, UNIVERSITÉ GRENOBLE ALPES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)Inventors: Jyotirmoy Chatterjee, Paulo Veloso Coelho, Bernard Dieny, Ricardo Sousa, Lucian Prejbeanu
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Patent number: 10978638Abstract: A method of manufacturing a data storage device may include forming a magnetic tunnel junction layer on a substrate, irradiating a first ion beam on the magnetic tunnel junction layer to form magnetic tunnel junction patterns separated from each other, irradiating a second ion beam on the magnetic tunnel junction layer, and irradiating a third ion beam on the magnetic tunnel junction layer. The first ion beam may be irradiated at a first incident angle. The second ion beam may be irradiated at a second incident angle that may be smaller than the first incident angle. The third ion beam may be irradiated to form sidewall insulating patterns on sidewalls of the magnetic tunnel junction patterns based on re-depositing materials separated by the third ion beam on the sidewalls of the magnetic tunnel junction patterns.Type: GrantFiled: April 1, 2020Date of Patent: April 13, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Jongchul Park, Sang-Kuk Kim
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Patent number: 10964468Abstract: A magnetic memory structure employs electric-field controlled interlayer exchange coupling between a free magnetic layer and a fixed magnetic layer to switch a magnetization direction. The magnetic layers are separated by a spacer layer disposed between two oxide layers. The spacer layer exhibits a large IEC while the oxide layers provide tunnel barriers, forming a quantum-well between the magnetic layers with discrete energy states above the equilibrium Fermi level. When an electric field is applied across the structure, the tunnel barriers become transparent at discrete energy states via a resonant tunneling phenomenon. The wave functions of the two magnets then can interact and interfere to provide a sizable IEC. IEC can control the magnetization direction of the free magnetic layer relative to the magnetization direction of the fixed magnetic layer depending on the sign of the IEC, induced by a magnitude of the applied electric field above a threshold value.Type: GrantFiled: July 12, 2019Date of Patent: March 30, 2021Assignee: The Regents of the University of CaliforniaInventors: Sayeef Salahuddin, Shehrin Sayed
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Patent number: 10964886Abstract: The present disclosure relates to the fabrication of spin transfer torque memory devices, wherein a magnetic tunnel junction of the spin transfer torque memory device is formed with Heusler alloys as the fixed and free magnetic layers and a tunnel barrier layer disposed between and abutting the fixed Heusler magnetic layer and the free Heusler magnetic layer, wherein the tunnel barrier layer is lattice matched to the free Heusler magnetic layer. In one embodiment, the tunnel barrier layer may be a strontium titanate layer.Type: GrantFiled: September 27, 2016Date of Patent: March 30, 2021Assignee: Intel CorporationInventors: Brian Doyle, Kaan Oguz, Satyarth Suri, Kevin O'Brien, Mark Doczy, Charles Kuo
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Patent number: 10957850Abstract: A method for fabricating a semiconductor device includes forming a first encapsulation layer along the device, including forming the first encapsulation layer along a memory device region associated with a memory device, forming an intermediate layer on the first encapsulation layer to enable etch endpoint detection and endpoint-based process control for encapsulation layer etch back, and forming a second encapsulation layer on the intermediate layer.Type: GrantFiled: October 4, 2018Date of Patent: March 23, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ashim Dutta, Isabel Cristina Chu, Son Nguyen, Michael Rizzolo, John C. Arnold
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Patent number: 10956352Abstract: A method for detecting and identifying modules of a bus system is provided. The bus system includes a control unit, a bus starting from the control unit, and a plurality of modules connected to the bus. The method includes providing a current sink associated with each of the one or more modules. The current sink includes a transistor. The method includes providing a hall sensor associated with each of the one or more modules. The hall sensor detects a current on a low-side data line of the bus. For each one of the one or more modules: when the hall sensor detects a current on the low-side data line, the method includes maintaining a closed position of the transistor; and when the hall sensor fails to detect a current on the low-side data line, the method includes opening the transistor such that current does not flow to the module.Type: GrantFiled: May 29, 2018Date of Patent: March 23, 2021Assignee: Continental Automotive Systems, Inc.Inventor: Hesam Akbarian
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Patent number: 10957851Abstract: A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a boron containing free layer (FL) is subjected to a plasma treatment with inert gas, and a natural oxidation (NOX) process to form B2O3 before overlying layers are deposited. A metal layer such as Mg is deposited on the FL as a first step in forming a Hk enhancing layer that increases FL perpendicular magnetic anisotropy, or as a first step in forming a tunnel barrier layer on the FL. One or more anneal steps are essential in assisting B2O3 segregation from the free layer and thereby increasing the FL magnetic moment. A post-oxidation plasma treatment may also be used to partially remove B2O3 proximate to the FL top surface before the metal layer is deposited. Both plasma treatments use low power (<50 Watts) to remove a maximum of 2 Angstroms FL thickness.Type: GrantFiled: December 27, 2019Date of Patent: March 23, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guenole Jan, Jodi Mari Iwata, Ru-Ying Tong, Huanlong Liu, Yuan-Jen Lee, Jian Zhu
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Patent number: 10957738Abstract: A semiconductor structure and fabrication method of forming a semiconductor structure. The structure is a MRAM element having a first conductive electrode embedded in a first interconnect dielectric material layer upon which a multi-layered magnetic tunnel junction (MTJ) memory element is formed in a magnetoresistive random access memory (MRAM) device area. The first conductive electrode includes a first end having a top surface of a first surface area and a second end having a bottom surface of a second surface area, the first surface area being smaller than the second surface area. The second end of the bottom electrode includes a barrier liner material including a metal fill material, and the first end of the bottom electrode is a pillar structure formed as a result of an etchback process in which the metal barrier liner is recessed relative to the metal fill material.Type: GrantFiled: April 3, 2019Date of Patent: March 23, 2021Assignee: International Business Machines CorporationInventors: Pouya Hashemi, Bruce B. Doris, Chandrasekharan Kothandaraman, Nathan P. Marchack
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Patent number: 10957848Abstract: Devices are described that include a multi-layered structure that comprises three layers. The first layer is a magnetic Heusler compound, the second layer (acting as a spacer layer) is non-magnetic at room temperature and comprises alternating layers of Ru and at least one other element E (preferably Al; or Ga or Al alloyed with Ga, Ge, Sn or combinations thereof), and the third layer is also a magnetic Heusler compound. The composition of the second layer is represented by Ru1?xEx, with x being in the range from 0.45 to 0.55. An MRAM element may be constructed by forming, in turn, a substrate, the multi-layered structure, a tunnel barrier, and an additional magnetic layer (whose magnetic moment is switchable).Type: GrantFiled: February 8, 2019Date of Patent: March 23, 2021Assignees: International Business Machines CorporationInventors: Panagiotis Charilaos Filippou, Chirag Garg, Yari Ferrante, Stuart S. P. Parkin, Jaewoo Jeong, Mahesh G. Samant
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Patent number: 10940593Abstract: The present invention provides a robot apparatus which can determine a contact state at a contact point without increasing the contact point, can be miniaturized, and also can decrease the cost. Contact points are provided in a hand device. Contact points are provided in a tool device, which come in contact with the contact points, respectively, when the tool device has been mounted on the hand device. A voltage detecting circuit is provided in the tool device, which detects a voltage between the contact points. The controlling circuit determines contact states between the contact points and the contact points, by using a value of the voltage which has been detected by the voltage detecting circuit.Type: GrantFiled: January 24, 2018Date of Patent: March 9, 2021Assignee: CANON KABUSHIKI KAISHAInventor: Akitaka Yoshizawa
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Patent number: 10944049Abstract: A layered thin film device, such as a MTJ (Magnetic Tunnel Junction) device can be customized in shape by sequentially forming its successive layers over a symmetrically curved electrode. By initially shaping the electrode to have a concave or convex surface, the sequentially formed layers conform to that shape and acquire it and are subject to stresses that cause various crystal defects to migrate away from the axis of symmetry, leaving the region immediately surrounding the axis of symmetry relatively defect free. The resulting stack can then be patterned to leave only the region that is relatively defect free.Type: GrantFiled: November 13, 2017Date of Patent: March 9, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jesmin Haq, Tom Zhong, Zhongjian Teng, Vinh Lam, Yi Yang
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Patent number: 10943951Abstract: In one example embodiment, a SOT-MRAM includes a storage unit having a Co?X?Pt? based free layer. The storage unit includes a bottom electrode and the Co?X?Pt? based free layer is disposed over the bottom electrode. Further, the storage unit includes a tunnel barrier layer over the Co?X?Pt? based free layer, and a fixed layer over the tunnel barrier layer. The Co?X?Pt? based free layer, tunnel barrier layer and fixed layer form a magnetic tunnel junction. The storage unit may also include a top electrode over the MTJ.Type: GrantFiled: April 3, 2019Date of Patent: March 9, 2021Assignee: National University of SingaporeInventors: Jingsheng Chen, Jinyu Deng, Liang Liu
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Patent number: 10942072Abstract: A sub-micrometer pressure sensor including a multilayered magnetic tunnel junction (MTJ) pillar containing a magnetostrictive material layer above or below a magnetic free layer of the multilayered MTJ pillar is provided. Advanced patterning allows for scaling of the multilayered MTJ pillar down to 25 nm or below which enables the formation of a large array of extremely high resolution pressure sensors. By varying the thickness of the magnetostrictive material layer, the sensitivity of the pressure sensor can be fine tuned. Unique magnetostrictive materials in the multilayered MTJ pillar will alter the device current with the input of external pressure. Furthermore, unique arrays with much smaller critical elements can be organized in differential sensing arrangements of the multilayered MTJ pillar with pressure sensing capability that can outperform current piezoelectric based pressure sensing arrays.Type: GrantFiled: November 20, 2018Date of Patent: March 9, 2021Assignee: International Business Machines CorporationInventors: Chandrasekharan Kothandaraman, Eric Raymond Evarts, Virat Vasav Mehta, Pouya Hashemi, Alexander Reznicek
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Patent number: 10944044Abstract: A memory structure is provided that avoids high resistance due to the galvanic effect. The high resistance is reduced and/or eliminated by providing a T-shaped bottom electrode structure of uniform construction (i.e., a single piece). The T-shaped bottom electrode structure includes a narrow base portion and a wider shelf portion. The shelf portion of the T-shaped bottom electrode structure has a planar topmost surface in which a MTJ pillar forms an interface with.Type: GrantFiled: August 7, 2019Date of Patent: March 9, 2021Assignee: International Business Machines CorporationInventors: Pouya Hashemi, Bruce B. Doris, Eugene J. O'Sullivan, Michael F. Lofaro
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Patent number: 10944048Abstract: A semiconductor device includes a substrate, an array of magnetic tunnel junctions (MTJs), an array of first dummy MTJs, and an array of second dummy MTJs. The substrate includes an array region defined thereon, and the array region includes at least an outermost corner. The array of MTJs is disposed in the array region. The array of the first dummy MTJs is disposed along the outermost corner of the array region. The array of the second dummy MTJs is disposed around the array region and the array of first dummy MTJs.Type: GrantFiled: August 28, 2019Date of Patent: March 9, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ya-Huei Tsai, Rai-Min Huang
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Patent number: 10944050Abstract: Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ seed layers of one or more layer of chromium (Cr), NiCr, NiFeCr, RuCr, IrCr, or CoCr, or combinations thereof. These seed layers are used in combination with one or more pinning layers, a first pinning layer in contact with the seed layer can contain a single layer of cobalt, or can contain cobalt in combination with bilayers of cobalt and platinum (Pt), iridium (Ir), nickel (Ni), or palladium (Pd), The second pinning layer can be the same composition and configuration as the first, or can be of a different composition or configuration. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.Type: GrantFiled: March 13, 2019Date of Patent: March 9, 2021Assignee: Applied Materials, Inc.Inventors: Lin Xue, Chi Hong Ching, Rongjun Wang, Mahendra Pakala
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Patent number: 10937478Abstract: An apparatus includes two or more magnetic tunnel junctions (MTJs), including a first MTJ having a first magnetic characteristic and a second MTJ having a second magnetic characteristic. The first magnetic characteristic is distinct from the second magnetic characteristic. The first magnetic characteristic is based on a first magnetic anisotropy and a first offset field on a first storage layer of the first MTJ. The second magnetic characteristic is based on a second magnetic anisotropy and a second offset field on a second storage layer of the second MTJ, The apparatus further includes a metallic separator coupling the first MTJ with the second MTJ, wherein the first MTJ and the second MTJ are arranged in series.Type: GrantFiled: July 9, 2019Date of Patent: March 2, 2021Assignee: SPIN MEMORY, INC.Inventors: Kadriye Deniz Bozdag, Marcin Gajek, Mourad El Baraji, Eric Michael Ryan
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Patent number: 10937719Abstract: A package structure comprising a die, a first molding compound encapsulating the die, an antenna structure and a reflector pattern disposed above the die is provided. Through vias penetrating through the first molding compound are disposed around the die. The reflector pattern is disposed on the die and the through vias. The antenna structure is disposed on the reflector pattern and electrically connected with the reflector pattern and the die. The antenna structure is wrapped by a second molding compound disposed on the reflector pattern.Type: GrantFiled: June 30, 2017Date of Patent: March 2, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Ping Chiang, Chao-Wen Shih, Min-Chien Hsiao, Nien-Fang Wu, Shou-Zen Chang, Yi-Che Chiang
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Patent number: 10937953Abstract: A device is disclosed. The device includes a tetragonal Heusler compound of the form Mn3-xCoxGe, wherein 0<x?1, wherein Co accounts for at least 0.4 atomic percent of the Heusler compound. The device also includes a substrate oriented in the direction (001) and of the form YMn1+d, wherein Y includes an element selected from the group consisting of Ir and Pt, and 0?d?4. The tetragonal Heusler compound and the substrate are in proximity with each other, thereby allowing spin-polarized current to pass from one through the other. In one aspect, the device also includes a multi-layered structure that is non-magnetic at room temperature. The structure includes alternating layers of Co and E. E includes at least one other element that includes Al. The composition of the structure is represented by Co1-yEy, with y being in the range from 0.45 to 0.55.Type: GrantFiled: January 28, 2019Date of Patent: March 2, 2021Assignees: Samsung Electronics Co., Ltd., INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jaewoo Jeong, Mahesh G. Samant, Stuart S. P. Parkin, Yari Ferrante
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Patent number: 10930840Abstract: A memristor may include an exchange-coupled composite (ECC) portion to provide three or more nonvolatile magneto-resistive states. The ECC portion may include a continuous layer and a granular layer magnetically exchange coupled to the continuous layer. A plurality of memristors may be used in a system to, for example, define a neural network.Type: GrantFiled: January 23, 2019Date of Patent: February 23, 2021Assignee: Seagate Technology LLCInventors: Cheng Wang, Pin-Wei Huang, Ganping Ju, Kuo-Hsing Hwang
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Patent number: 10930841Abstract: A magnetic tunnel junction with out-of-plane magnetisation includes a storage layer; a reference layer; a tunnel barrier layer, the two magnetisation states of the storage layer being separated by an energy barrier, the magnetic tunnel junction having a thermal stability factor dependent on the energy barrier and on the temperature of use of the magnetic tunnel junction. The storage layer has a thickness comprised between 0.5 times and 8 times a characteristic dimension of a planar section of the tunnel junction; the composition and the thickness of the storage layer are chosen such that the absolute value of the derivative of the thermal stability factor compared to a characteristic dimension of a planar section of the tunnel junction is less than 10 nm?1.Type: GrantFiled: February 22, 2019Date of Patent: February 23, 2021Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS), INSTITUT POLYTECHNIQUE DE GRENOBLEInventors: Nicolas Perrissin-Fabert, Bernard Dieny, Lucian Prejbeanu, Ricardo Sousa
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Patent number: 10923168Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.Type: GrantFiled: February 18, 2020Date of Patent: February 16, 2021Assignee: SK hynix Inc.Inventors: Jong-Koo Lim, Ku-Youl Jung, Jae-Hyoung Lee, Jeong-Myeong Kim, Tae-Young Lee
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Patent number: 10923531Abstract: A nonvolatile memory device according to an embodiment of the present disclosure includes: a first electrode and a second electrode facing each other; a first magnetic material layer and a second magnetic material layer provided between the first electrode and the second electrode; an insulator layer provided between the first magnetic material layer and the second magnetic material layer; and an oxidized magnetic material film provided around the first magnetic material layer.Type: GrantFiled: February 8, 2017Date of Patent: February 16, 2021Assignee: Sony CorporationInventor: Koichi Sejima
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Patent number: 10916480Abstract: A magnetic wall utilization type analog memory device includes a magnetization fixed layer having a magnetization oriented in a first direction, a non-magnetic layer provided on one side of the magnetization fixed layer, a magnetic wall driving layer provided on the magnetization fixed layer with the non-magnetic layer interposed therebetween, a first magnetization supplying part which is configured to supply magnetization oriented in the first direction to the magnetic wall driving layer and a second magnetization supplying part which is configured to supply magnetization oriented in a second direction reversed with respect to the first direction, wherein at least one of the first magnetization supplying part and the second magnetization supplying part is a spin-orbit torque wiring which comes into contact with the magnetic wall driving layer and extends in a direction intersecting the magnetic wall driving layer.Type: GrantFiled: December 26, 2017Date of Patent: February 9, 2021Assignee: TDK CORPORATIONInventors: Tomoyuki Sasaki, Tatsuo Shibata
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Patent number: 10916581Abstract: A multilayered magnetic free layer structure is provided that includes a first magnetic free layer and a second magnetic free layer separated by a non-magnetic layer in which the first magnetic free layer is composed of an ordered magnetic alloy. The ordered magnetic alloy provides a first magnetic free layer that has low moment, but is strongly magnetic. The use of such an ordered magnetic alloy first magnetic free layer in a multilayered magnetic free layer structure substantially reduces the switching current needed to reorient the magnetization of the two magnetic free layers.Type: GrantFiled: February 4, 2019Date of Patent: February 9, 2021Assignee: International Business Machines CorporationInventors: Daniel Worledge, Guohan Hu
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Patent number: 10910557Abstract: Methods and apparatus for forming a magnetic tunnel element are provided herein. A method of forming a magnetic tunnel element includes: depositing a magnetic layer atop a cobalt-chromium seed layer; and depositing a tunnel layer atop the magnetic layer to form a magnetic tunnel element, wherein the magnetic tunnel element has a TMR greater than 100. For example, a cobalt/platinum material or one or more layers thereof may be deposited directly atop a cobalt-chromium seed layer to produce improved devices.Type: GrantFiled: September 13, 2019Date of Patent: February 2, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Chi Ching, Renu Whig, Rongjun Wang
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Patent number: 10910555Abstract: The present invention is directed to a magnetic memory element including a magnetic free layer structure incorporating three magnetic free layers separated by two perpendicular enhancement layers (PELs) and having a variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a first magnetic reference layer formed adjacent to the insulating tunnel junction layer opposite the magnetic free layer structure; a second magnetic reference layer separated from the first magnetic reference layer by a third perpendicular enhancement layer; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The first and second magnetic reference layers have a first invariable magnetization direction substantially perpendicular to layer planes thereof.Type: GrantFiled: March 26, 2020Date of Patent: February 2, 2021Assignee: Avalanche Technology, Inc.Inventors: Zihui Wang, Xiaojie Hao, Longqian Hu, Yiming Huai
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Patent number: 10910434Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/?10%) and less than or equal to 60 Angstroms (+/?10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/?10%) or 30-50 atomic percent (+/?10%).Type: GrantFiled: May 8, 2020Date of Patent: February 2, 2021Assignee: Everspin Technologies, Inc.Inventors: Jijun Sun, Sanjeev Aggarwal, Han-Jong Chia, Jon M. Slaughter, Renu Whig
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Patent number: 10902987Abstract: The spin-orbit torque magnetization rotational element includes a spin-orbit torque wiring layer which extends in an X direction and a first ferromagnetic layer which is laminated on the spin-orbit torque wiring layer. The first ferromagnetic layer has shape anisotropy and has a major axis in the X direction. An easy axis of magnetization of the first ferromagnetic layer is inclined with respect to the X direction and a Y direction orthogonal to the X direction on a plane in which the spin-orbit torque wiring layer extends.Type: GrantFiled: December 20, 2018Date of Patent: January 26, 2021Assignee: TDK CORPORATIONInventors: Tomoyuki Sasaki, Yohei Shiokawa
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Patent number: 10903417Abstract: A method of forming a magnetic tunnel junction (MTJ) containing device is provided in which a patterned sacrificial material is present atop a MTJ pillar that is located on a bottom electrode. A passivation material liner and a dielectric material portion laterally surround the MTJ pillar and the patterned sacrificial material. The patterned sacrificial material is removed from above the MTJ pillar and replaced with a top electrode. A seam is present in the top electrode. The method mitigates the possibility of depositing resputtered conductive metal particles on a sidewall of the MTJ pillar. Thus, improved device performance, in terms of a reduction in failure mode, can be obtained.Type: GrantFiled: February 4, 2019Date of Patent: January 26, 2021Assignee: International Business Machines CorporationInventors: Pouya Hashemi, Alexander Reznicek, Nathan P. Marchack, Bruce B. Doris
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Patent number: 10892403Abstract: A bottom electrode structure for a magnetic tunnel junction (MTJ) containing device is provided. The bottom electrode structure includes a mesa portion that is laterally surrounded by a recessed region. The recessed region of the bottom electrode structure is laterally adjacent to a dielectric material, and a MTJ pillar is located on the mesa portion of the bottom electrode structure. Such a configuration shields the recessed region from impinging ions thus preventing deposition of resputtered conductive metal particles from the bottom electrode onto the MTJ pillar.Type: GrantFiled: January 29, 2019Date of Patent: January 12, 2021Assignee: International Business Machines CorporationInventors: Nathan P. Marchack, Bruce B. Doris, Pouya Hashemi
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Patent number: 10879451Abstract: Disclosed is a magnetic tunnel junction device whose fixed layer has a simplified structure and in which the number of stacked layers is reduced. The magnetic tunnel junction device comprises a free layer whose magnetization direction is variable, a fixed layer whose magnetization direction is fixed and that is formed as a single layer, and a dielectric layer stacked between the free layer and the fixed layer. One or more of the free layer and the fixed layer are an L11 type magnetic alloy layer, and the dielectric layer has a (111) texture.Type: GrantFiled: August 9, 2019Date of Patent: December 29, 2020Inventors: Hiroyoshi Itoh, Yoshiaki Sonobe
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Patent number: 10879454Abstract: A magnetic memory element for using in magnetic random access memory. The magnetic memory element includes a novel exchange coupling layer for use in an antiferromagnetic structure for magnetically pinning a magnetic reference layer of the memory element. The exchange coupling layer is located between a first magnetic layer (reference layer) and a second magnetic layer (keeper layer). The exchange coupling layer includes a layer of Ru located between first and second layers of Ir. The Ir layers can be in contact with each of the first and second magnetic layers to provide an interfacial magnetic anisotropy, as well as providing RKKY exchange field. The Ru layer, provides an increased RKKY exchange field as a result of the high RKKY exchange coupling of Ru.Type: GrantFiled: August 8, 2018Date of Patent: December 29, 2020Assignee: SPIN MEMORY, INC.Inventors: Bartlomiej Adam Kardasz, Cheng Wei Chiu, Jorge Vasquez, Mustafa Pinarbasi
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Patent number: 10872660Abstract: In one embodiment, systems, methods, and apparatus are described that can reduce the peak current through semiconductor memory devices such as RRAM devices. In one embodiment, transition metal dichalcogenide (TMD) materials can be used to in connection with both the transistors and the memory (for example, RRAM) devices. In one embodiment, two-dimensional (2D) materials, that is, materials that are on the order of a few angstroms thick can be used in connection with both the transistors and the memory (for example, RRAM) devices. In one embodiment, the TMD layer(s) and/or the 2D material(s) can act as a ballast to the RRAM device that can control the current flow through the RRAM device. In one embodiment, the systems, methods, and apparatus can serve to reduce the current as the voltage increases at a predetermined range, a property that can be referred to as negative differential resistance (NDR).Type: GrantFiled: December 30, 2016Date of Patent: December 22, 2020Assignee: Intel CorporationInventors: Abhishek A. Sharma, Ravi Pillarisetty, Van H. Le, Gilbert Dewey
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Patent number: 10871529Abstract: A magnetic tunnel junction (MTJ) based sensor device includes a MTJ element and processing circuitry. The MTJ element includes a free layer, a pinned layer, an elastic layer, and a tunnel barrier. The free layer is spaced apart from the pinned layer by the tunnel barrier and the elastic layer. The processing circuitry is configured to measure a resistance at the MTJ element and determine whether mechanical shock and vibration has occurred based on the resistance at the MTJ element.Type: GrantFiled: November 19, 2018Date of Patent: December 22, 2020Assignee: Honeywell International Inc.Inventors: Romney R. Katti, Edward F. Ambrose
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Patent number: 10868242Abstract: A first conductive layer is patterned and trimmed to form a sub 30 nm conductive via on a first bottom electrode. The conductive via is encapsulated with a first dielectric layer and planarized to expose a top surface of the conductive via. A second conductive layer is deposited over the first dielectric layer and the conductive via. The second conductive layer is patterned to form a sub 60 nm second conductive layer wherein the conductive via and second conductive layer together form a T-shaped second bottom electrode. MTJ stacks are deposited on the T-shaped second bottom electrode and on the first bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and planarized to expose a top surface of the MTJ stack on the T-shaped second bottom electrode. A top electrode contacts the MTJ stack on the T-shaped second bottom electrode plug.Type: GrantFiled: June 26, 2019Date of Patent: December 15, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi Yang, Dongna Shen, Yu-Jen Wang
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Patent number: 10868237Abstract: A method for etching a magnetic tunneling junction (MTJ) structure is described. A MTJ stack is deposited on a bottom electrode wherein the MTJ stack comprises at least a pinned layer, a barrier layer on the pinned layer, and a free layer on the barrier layer, A top electrode layer is deposited on the MTJ stack. A hard mask is deposited on the top electrode layer. The top electrode layer and hard mask are etched. Thereafter, the MTJ stack not covered by the hard mask is etched, stopping at or within the pinned layer. Thereafter, an encapsulation layer is deposited over the partially etched MTJ stack and etched away on horizontal surfaces leaving a self-aligned hard mask on sidewalls of the partially etched MTJ stack. Finally, the remaining MTJ stack not covered by hard mask and self-aligned hard mask is etched to complete the MTJ structure.Type: GrantFiled: August 27, 2018Date of Patent: December 15, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi Yang, Dongna Shen, Vignesh Sundar, Yu-Jen Wang
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Patent number: 10861523Abstract: A spin current magnetization rotational magnetic element in which magnetization can be rotated without applying an external magnetic field, power saving and a degree of integration can be enhanced. The spin current magnetization rotational magnetic element includes a spin-orbit torque wiring in a first direction; a first ferromagnetic layer in a second direction, a magnetization direction of the first ferromagnetic layer being configured to change; and a spin injection layer which is in contact with a surface of the spin-orbit torque wiring on a side opposite to the first ferromagnetic layer side and laminated in the second direction, in which the magnetization direction of the first ferromagnetic layer is a Z direction and the magnetization direction of the spin injection layer is an X direction in the first direction.Type: GrantFiled: July 9, 2019Date of Patent: December 8, 2020Assignee: TDK CORPORATIONInventor: Tomoyuki Sasaki
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Patent number: 10854252Abstract: According to one embodiment, a device includes an element including: a first stacked; a first nonmagnet on the first stacked; a second stacked on the first nonmagnet; a second nonmagnet on the second stacked; and a first magnet on the second nonmagnet. The second stacked including: a second magnet in contact with the second nonmagnet, including Fe and Co; a third nonmagnet at an opposite side of the second nonmagnet relative to the second magnet, including Mo or W; and a third magnet on the first nonmagnet, in contact with the third nonmagnet, including Fe and Co. An atomic ratio of Fe in the third magnet is lower than an atomic ratio of Fe in the second magnet.Type: GrantFiled: March 4, 2019Date of Patent: December 1, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Toshihiko Nagase, Daisuke Watanabe
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Patent number: 10852370Abstract: A device for directly electrically generating and detecting the current-generated spin polarization in topological insulators, comprising a first and fourth contact on a layer of Bi2Se3 and a second contact comprising a ferromagnet/oxide tunnel barrier contact as a detector, and a third contact comprising nonmagnetic metal as a reference contact, a current to the first and fourth contact to produce a net spin polarization, and the spin polarization manifesting as a voltage between the second (magnetic) and third (reference) contacts.Type: GrantFiled: October 23, 2018Date of Patent: December 1, 2020Assignee: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Connie H. Li, Olaf M. J. van 't Erve, Jeremy T. Robinson, Ying Liu, Lian Li, Berend T. Jonker
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Patent number: 10847576Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a magnetic layer, a first insulating layer covering the stacked structure and including a protrusion based on the stacked structure, a second insulating layer provided on the first insulating layer, and an electrode connected to the stacked structure. The first insulating layer has a first hole passing through the first insulating layer, the electrode is connected to the stacked structure at least through the first hole, the second insulating layer has a second hole inside of which a part of the electrode and the protrusion are provided, and the second hole includes a part whose area increases toward the stacked structure.Type: GrantFiled: March 14, 2019Date of Patent: November 24, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shuichi Tsubata, Yasuyuki Sonoda, Kazuhiro Tomioka, Takao Ochiai
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Patent number: 10839930Abstract: A magnetic domain wall type analog memory element includes: a magnetization fixed layer in which magnetization is oriented in a first direction; a non-magnetic layer provided in one surface of the magnetization fixed layer; a magnetic domain wall drive layer including a first area in which magnetization is oriented in the first direction, a second area in which magnetization is oriented in a second direction opposite to the first direction, and a magnetic domain wall formed as an interface between the areas and provided to sandwich the non-magnetic layer with respect to the magnetization fixed layer; and a current controller configured to cause a current to flow between the magnetization fixed layer and the second area at the time of reading.Type: GrantFiled: December 23, 2019Date of Patent: November 17, 2020Assignee: TDK CORPORATIONInventor: Tomoyuki Sasaki
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Patent number: 10840441Abstract: Techniques for MRAM patterning using a diamond-like carbon hardmask are provided. In one aspect, a method of forming an MRAM device includes: forming an MRAM stack on a substrate; depositing a metal hardmask layer on the MRAM stack; depositing a diamond-like carbon layer on the metal hardmask layer; forming a patterned resist on the diamond-like carbon layer; patterning the diamond-like carbon layer using the patterned resist to form a diamond-like carbon pillar; patterning the metal hardmask layer using the diamond-like carbon pillar to form a patterned metal hardmask; and patterning the MRAM stack into an MRAM pillar using the patterned metal hardmask to form the MRAM device. An MRAM device is also provided.Type: GrantFiled: September 14, 2018Date of Patent: November 17, 2020Assignee: International Business Machines CorporationInventors: Anthony Annunziata, Nathan P. Marchack, Eugene O'Sullivan, Chandrasekharan Kothandaraman
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Patent number: 10840298Abstract: A magnetic memory array having a source-plane electrically connected with an array of channel selectors in two-dimensions. The array of channel selectors can be arranged in rows and columns with both the rows and columns being electrically connected with a source-plane. A magnetic memory element such as a magnetic tunnel junction element can be electrically connected with each of the channel selectors. The source-plane can include a doped region formed in a surface of a semiconductor substrate and may also include an electrically conductive layer formed on the doped region. The use of such a planar, two-dimensional source-plane allows for greatly increased data density by eliminating the need to form separate source-line source lines for individual rows of channel selectors.Type: GrantFiled: June 28, 2019Date of Patent: November 17, 2020Assignee: SPIN MEMORY, INC.Inventors: Adrian E. Ong, Andrew J. Walker, Dafna Beery
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Patent number: 10832750Abstract: A perpendicular spin transfer torque MRAM memory cell includes a magnetic tunnel junction that has a free layer, a pinned layer and a tunnel barrier between the free layer and the pinned layer. The free layer has a switchable direction of magnetization perpendicular to the plane of the free layer. A cap layer is provided adjacent to the magnetic tunnel junction. The thickness of the cap layer is increased so that the cap layer acts as a heating layer, which results in a reduction of the current density during writing and increases the write margin. In some embodiments, a resistive heating layer is added to the memory cell, adjacent to the cap layer, in order to achieve the lower current density and increased write margin while also improving signal to noise ration during reading by eliminating shot noise.Type: GrantFiled: February 22, 2019Date of Patent: November 10, 2020Assignee: SanDisk Technologies LLCInventors: Goran Mihajlovic, Tiffany Santos, Jui-Lung Li
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Engineered barrier layer interface for high speed spin-transfer torque magnetic random access memory
Patent number: 10833254Abstract: A perpendicular magnetic tunnel junction may include a free layer, a reference layer, and a barrier layer. The barrier layer may be arranged between the free layer and the reference layer. The barrier layer may include a first interface and a second interface. The first interface may face the free layer, and a second interface may face the reference layer. The first interface may not physically correlate with the second interface.Type: GrantFiled: June 4, 2019Date of Patent: November 10, 2020Assignee: Qualcomm IncorporatedInventors: Chando Park, Jimmy Jianan Kan, Peiyuan Wang, Seung Hyuk Kang -
Patent number: 10833010Abstract: Techniques that facilitate integration of artificial intelligence devices are provided. In one example, a device includes a first dual-damascene layer, a second dual-damascene layer and an artificial intelligence memory device. The first dual-damascene layer comprises a first set of copper connections formed in first dielectric material. The second dual-damascene layer that comprises a second set of copper connections formed in second dielectric material. The artificial intelligence memory device is integrated between the first dual-damascene layer and the second dual-damascene layer. A through-level via (TLV) electrical connection associated with the artificial intelligence memory device provides an interconnection between the first set of copper connections and the second set of copper connections.Type: GrantFiled: October 31, 2018Date of Patent: November 10, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hsueh-Chung Chen, Lawrence A. Clevenger, Fee Li Lie, Effendi Leobandung
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Patent number: 10811593Abstract: Embodiments of the invention can be directed to controlling and/or engineering the size and/or volume of polar nanoregions (PNRs) of ferroelectric polycrystalline material systems. Some embodiments can achieved this via composition modifications to cause changes in the PNRs and/or local structure. Some embodiments can be used to control and/or engineer dielectric, piezoelectric, and/or electromechanical properties of polycrystalline materials. Controlling and/or engineering the PNRs may facilitate improvements to the dielectric, piezoelectric, and/or electromechanical properties of materials. Controlling and/or engineering the PNRs may further facilitate generating a piezoelectric material that may be useful for many different piezoelectric applications.Type: GrantFiled: April 3, 2018Date of Patent: October 20, 2020Assignee: The Penn State Research FoundationInventors: Fei Li, Dabin Lin, Shujun Zhang, Thomas R. Shrout, Long-Qing Chen