Abstract: An infrared-ray sensing device includes a support and a plurality of photodiodes disposed on the support. Each photodiode of the plurality includes a first mesa including a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type that is disposed between the first and second semiconductor layers, and a super-lattice region disposed on the support along a reference plane. The third semiconductor layer and the super-lattice region are provided in common for the photodiodes of the plurality. In the photodiodes, the first mesas and the second semiconductor layers are aligned along a first axis intersecting the reference plane so that each of the second semiconductor layers is provided in a position corresponding to the position of its first mesa. Each second semiconductor layer is disposed between the third semiconductor layer and the super-lattice region.

Abstract: A silicon photomultiplier includes a plurality of microcells providing a pulse output in response to an incident radiation, each microcell including circuitry configured to enable and disable the pulse output. Each microcell includes a cell disable switch. The control logic circuit controls the cell disable switch and a self-test circuit. A microcell's pulse output is disabled when the cell disable switch is in a first state. A method for self-test calibration of microcells includes providing a test enable signal to the microcells, integrating dark current for a predetermined time period, comparing the integrated dark current to a predetermined threshold level, and providing a signal if above the predetermined threshold level.

Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.

Abstract: Avalanche photodiodes (APDs) having at least one top stressor layer disposed on a germanium (Ge) absorption layer are described herein. The top stressor layer can increase the tensile strain of the Ge absorption layer, thus extending the absorption of APDs to longer wavelengths beyond 1550 nm. In one embodiment, the top stressor layer has a four-layer structure, including an amorphous silicon (Si) layer disposed on the Ge absorption layer; a first silicon dioxide (SiO2) layer disposed on the amorphous Si layer, a silicon nitride (SiN) layer disposed on the first SiO2 layer, and a second SiO2 layer disposed on the SiN layer. The Ge absorption layer can be further doped by p-type dopants. The doping concentration of p-type dopants is controlled such that a graded doping profile is formed within the Ge absorption layer to decrease the dark currents in APDs.

Abstract: A light detection device 1 has a semiconductor light detection element having a semiconductor substrate, and a mounting substrate arranged as opposed to the semiconductor light detection element. The semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in the semiconductor substrate, and electrodes electrically connected to the respective avalanche photodiodes and arranged on a second principal surface side of the semiconductor substrate. The mounting substrate includes a plurality of electrodes arranged corresponding to the respective electrodes on a third principal surface side, and quenching resistors electrically connected to the respective electrodes and arranged on the third principal surface side. The electrodes and the electrodes are connected through bump electrodes.

Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.

Abstract: The present invention relates to a solid state switch that may be used as in optically-triggered switch in a variety of applications. In particular, the switch may allow for the reduction of gigawatt systems to approximately shoebox-size dimension. The optically-triggered switches may be included in laser triggered systems or antenna systems.

Abstract: A metal-oxide-semiconductor field-effect transistor (MOSFET) with integrated passive structures and methods of manufacturing the same is disclosed. The method includes forming a stacked structure in an active region and at least one shallow trench isolation (STI) structure adjacent to the stacked structure. The method further includes forming a semiconductor layer directly in contact with the at least one STI structure and the stacked structure. The method further includes patterning the semiconductor layer and the stacked structure to form an active device in the active region and a passive structure of the semiconductor layer directly on the at least one STI structure.

Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.

Abstract: An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.

Abstract: A method for manufacturing a back-illuminated type solid-state imaging device by (a) providing a substrate having, on a front surface side thereof, a semiconductor film on a semiconductor substrate with an insulation film therebetween; (b) forming in the semiconductor substrate a charge accumulation portion of a photoelectric conversion element that constitutes a pixel; (c) forming in the semiconductor film at least some transistors that constitute the pixel; and (d) forming on a rear surface side of the semiconductor substrate a rear surface electrode to which a voltage can be applied.

Abstract: An inductor device and method of forming the inductor device are provided. In some embodiments the inductor device includes a post passivation interconnect (PPI) layer disposed and an under bump metallization (UBM) layer, each disposed over a substrate. The PPI layer forms a coil and dummy pads. The dummy pads are disposed around a substantial portion of the coil to shield the coil from electromagnetic interference. A first portion of the UBM layer is electrically coupled to the coil and configured to interface with an electrical coupling member.

Abstract: A concentrated photovoltaic cell comprises a semiconductor stack comprising an upper surface and a lower surface opposite to the upper surface, wherein the upper surface is operable to absorb a light which comprises a light intensity distribution on the upper surface; and an upper electrode formed on the upper surface of the semiconductor stack and comprising an electrode pattern approximately corresponding to the light intensity distribution, wherein the light intensity distribution comprises a high light-concentrated area having a first light intensity and a low light-concentrated area having a second light intensity, wherein the second light intensity is lower than the first light intensity.

Abstract: An integrated circuit includes a semiconductor substrate, at least one photodiode, which is formed on a surface of the semiconductor substrate, at least one trench, which extends from the surface of the semiconductor substrate into the semiconductor substrate and surrounds a region of the semiconductor substrate on which the photodiode Is arranged, and at least one cavity in the semiconductor substrate, which is located below the surface of the semiconductor substrate. The at least one trench and the at least one cavity form an electrical insulation structure between the region of the semiconductor substrate on which the photodiode is arranged and one or more adjacent regions of the semiconductor substrate.

Abstract: An integrated circuit (IC) sensor is described. The IC sensor includes a pixel array and IC components. The pixel array has a plurality of pixels, wherein each pixel includes an EMR absorption region including a detector material having a plurality of nanoparticles embedded in a matrix material and exhibiting a nano-plasmonic property. The IC components are arranged to provide amplification of a voltage signal from the EMR absorption region, and to select the voltage signal from the EMR absorption region.

Abstract: A device includes a first region, a multiplication region, a second region, and an absorption region. The first region is associated with a first terminal, and the second region is associated with a second terminal. The first region is separated from the second region by the multiplication region. The absorption region is disposed on the multiplication region and associated with a third terminal. A multiplication region electric field is independently controllable with respect to an absorption region electric field, based on the first terminal, the second terminal, and the third terminal.

Abstract: Solid state avalanche photodiode devices and methods of producing the same are described herein.

Abstract: A semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in a semiconductor substrate, quenching resistors connected in series to the respective avalanche photodiodes and arranged on a first principal surface side of the semiconductor substrate, and a plurality of through-hole electrodes electrically connected to the quenching resistors and formed so as to penetrate the semiconductor substrate from the first principal surface side to a second principal surface side. A mounting substrate includes a plurality of electrodes arranged corresponding to the respective through-hole electrodes on a third principal surface side. The through-hole electrodes and the electrodes are electrically connected through bump electrodes, and a side surface of the semiconductor substrate and a side surface of a glass substrate are flush with each other.

Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.

Abstract: A light detection device 1 has a semiconductor light detection element having a semiconductor substrate, and a mounting substrate arranged as opposed to the semiconductor light detection element. The semiconductor light detection element includes a plurality of avalanche photodiodes operating in Geiger mode and formed in the semiconductor substrate, and electrodes electrically connected to the respective avalanche photodiodes and arranged on a second principal surface side of the semiconductor substrate. The mounting substrate includes a plurality of electrodes arranged corresponding to the respective electrodes on a third principal surface side, and quenching resistors electrically connected to the respective electrodes and arranged on the third principal surface side. The electrodes and the electrodes are connected through bump electrodes.

Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.

Abstract: A photoconductive antenna is adapted to generate terahertz waves when irradiated by pulsed light. The photoconductive antenna includes first and second conductive layers, a semiconductor layer positioned between the first and second conductive layers, first and second electrodes, and a dielectric layer. The semiconductor layer is made of a semiconductor material having a carrier density that is lower than a carrier density of the semiconductor material of the first conductive layer or the second conducive layer. The first and second electrodes are electrically connected to the first and second conductive layers, respectively. The second electrode has an aperture through which the pulsed light passes. The dielectric layer is made of a dielectric material, and is in contact with a surface of the semiconductor layer having a normal direction extending orthogonal to a lamination direction of the first conductive layer, the semiconductor layer, and the second conductive layer.

Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.

Abstract: An avalanche photodiode includes a cathode region and an anode region. A lateral insulating region including a barrier region and an insulating region surrounds the anode region. The cathode region forms a planar optical guide within a core of the cathode region, the guide being configured to guide photons generated during avalanche. The barrier region has a thickness extending through the planar optical guide to surround the core and prevent propagation of the photons beyond the barrier region. The core forms an electrical-confinement region for minority carriers generated within the core.

Abstract: The electric behavior of a reverse-biased PN junction diode is modeled by measuring the value of voltage V present across the diode and the value of the corresponding current I running through this diode, the voltage V varying within a range of values including the value of diode breakdown voltage. A representation of a function ln ? ( I - I s ) according to voltage V is established from the measured values of current I and of voltage V, IS being the saturation current of the diode. A linear function representative of a substantially linear portion of the function, characterized by voltages V greater than breakdown voltage VBK in terms of absolute value, is determined. An avalanche multiplication factor MM is then calculated by MM = 1 + ? ( - slbv · V + bv bv ) , with parameter slbv equal to the ordinate at the origin of the linear function, and parameter slbv/bv equal to the slope of the linear function.

Abstract: A method of fabricating an avalanche photodiode pixel includes growing a second doped semiconductor layer on a first doped semiconductor layer having a first doping concentration. The second doped semiconductor layer is grown with a second doping concentration and is of an opposite majority charge carrier type as the first doped semiconductor layer. A doped contact region having a third doping concentration is formed in the second doped semiconductor layer between the doped contact region and the first doped semiconductor layer. The doped contact region is of a same majority charge carrier type as the second doped semiconductor layer. The third doping concentration is greater than the second doping concentration. A guard ring region is formed in the second doped semiconductor layer, is of an opposite majority charge carrier type as the second doped semiconductor layer, and extends through the second doped semiconductor layer surrounding the doped contact region.

Abstract: This invention relates to a method of fabricating a three-dimensional copper nanostructure, including manufacturing a specimen configured to include a SiO2 mask; performing multi-directional slanted plasma etching to form a three-dimensional etching structure layer on the specimen; performing plating so that a multi-directional slanted plasma etched portion of the specimen is filled with a metal; removing an over-plated portion and the SiO2 mask from the metal layer; and removing a portion of a surface of the specimen other than the metal which is the three-dimensional etching structure layer.

Abstract: An integrated circuit (IC) sensor is described. The IC sensor includes a pixel array and IC components. The pixel array has a plurality of pixels, wherein each pixel includes an EMR absorption region including a detector material having a plurality of nanoparticles embedded in a matrix material and exhibiting a nano-plasmonic property. The IC components are arranged to provide amplification of a voltage signal from the EMR absorption region, and to select the voltage signal from the EMR absorption region.

Abstract: A system, method, and computer program product are provided for affixing a post to a substrate pad. In use, a post is affixed to each of one or more pads of a substrate, where each post receives a ball of a package during an assembly process.

Abstract: A photodiode includes an anode (1202, 1302, 1402) and a cathode (1306, 1406) formed on a semiconductor substrate (402). A vertical electrode (702, 1314, 1414) is in operative electrical communication with a buried component (502, 1312, 1412) of the photodiode. In one implementation, the photodiode is an avalanche photodiode of a silicon photomultiplier. The substrate may also include integrated CMOS readout circuitry (1102).

Abstract: The GAMMA/RF compact, hybrid and integrated system for PET-SPECT/MR simultaneous imaging of the invention comprises a GAMMA/RF device that integrates an RF coil, of the type used in conventional MR systems, with GAMMA radiation detector modules of the type used in PET or SPECT systems, so that combined PET or SPECT and MR images are obtained.

Abstract: According to one aspect, there is provided an avalanche photodiode comprising a first semiconductor layer that absorbs photons of a first wavelength range and having a first energy bandgap; a second semiconductor layer that absorbs photons of a second wavelength range and having a second energy bandgap, the second energy bandgap being different from the first energy bandgap; and a control layer between the first semiconductor layer and the second semiconductor layer, the control layer having a third energy bandgap engineered to suppress carriers created from dark current.

Abstract: An avalanche photodiode detector is provided. The avalanche photodiode detector comprises an absorber region having an absorption layer for receiving incident photons and generating charged carriers; and a multiplier region having a multiplication layer; wherein the multiplier region is on a mesa structure separate from the absorber region and is coupled to the absorber region by a bridge for transferring charged carriers between the absorber region and multiplier region.

Abstract: Devices comprised of end-on waveguide-coupled photodetectors are described. In embodiments of the invention, the photodetectors are avalanche photodiodes coupled end-on to a waveguide. The waveguide includes an insulating trench proximate to the coupled photodetector. In embodiments of the invention, the avalanche photodiodes are silicon/germanium avalanche photodiodes.

Abstract: A device includes a first region, a multiplication region, a second region, and an absorption region. The first region is associated with a first terminal, and the second region is associated with a second terminal. The first region is separated from the second region by the multiplication region. The absorption region is disposed on the multiplication region and associated with a third terminal. A multiplication region electric field is independently controllable with respect to an absorption region electric field, based on the first terminal, the second terminal, and the third terminal.

Abstract: Avalanche diode-type semiconductor structure (1) intended to receive electromagnetic radiation in a given wavelength. The structure (1) comprises a semiconductor multiplication zone (310) including a majority carrier concentration, and delimitation means suitable for laterally delimiting the multiplication zone (310). The delimitation means comprise a semiconductor zone (410) surrounding the multiplication zone (310) and comprising a forbidden energy gap greater than the forbidden energy gap of the major part (320) of the multiplication zone (310), said zone (410) having a type of conductivity opposite that of the multiplication zone (310) with a majority carrier concentration at least 10 times greater than that of the multiplication zone (310). The invention also relates to a process for producing an avalanche photodiode-type semiconductor structure.

Abstract: A photodetector disclosed herein comprises an avalanche transistor having a reference junction structure in which temperature characteristics of a current amplification factor are about the same as those of an avalanche photodiode and which is reverse-biased, and a current injection junction structure which injects a reference current to the reference junction structure and which is forward-biased. Voltages to be applied to the avalanche photodiode and the reference junction structure are controlled so that the amplification factor of the reference current amplified in the reference junction structure is retained at a predetermined value, whereby the temperature characteristics of the photodetector utilizing an avalanche effect can be stabilized.

Abstract: An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an out

Abstract: This document refers to apparatus and methods for a device layer of a microelectromechanical system (MEMS) sensor having vias with reduced shunt capacitance. In an example, a device layer can include a substrate having a pair of trenches separated in a horizontal direction by a portion of the substrate, wherein each trench of the pair of trenches includes first and second vertical layers including dielectric, the first and second vertical layers separated by a third vertical layer including polysilicon.

Abstract: An inductor device and method of forming the inductor device are provided. In some embodiments the inductor device includes a post passivation interconnect (PPI) layer disposed and an under bump metallization (UBM) layer, each disposed over a substrate. The PPI layer forms a coil and dummy pads. The dummy pads are disposed around a substantial portion of the coil to shield the coil from electromagnetic interference. A first portion of the UBM layer is electrically coupled to the coil and configured to interface with an electrical coupling member.

Abstract: A silicon photomultiplier detector cell may include a photodiode region and a readout circuit region formed on a same substrate. The photodiode region may include a first semiconductor layer exposed on a surface of the silicon photomultiplier detector cell and doped with first type impurities; a second semiconductor layer doped with second type impurities; and/or a first epitaxial layer between the first semiconductor layer and the second semiconductor layer. The first epitaxial layer may contact the first semiconductor layer and the second semiconductor layer. The first epitaxial layer may be doped with the first type impurities at a concentration lower than a concentration of the first type impurities of the first semiconductor layer.

Abstract: An avalanche photodiode can include: an avalanche region having one or more layers prepared from GaAs; an N? absorption layer extending across the avalanche region; an N-type layer above at least a center portion of the N? absorption layer; and optionally a lower conductivity layer laterally from the N-type layer to a surface of the avalanche region and above a perimeter portion of the N? absorption layer, the lower conductivity layer having lower conductivity compared to the N-type layer. The avalanche photodiode can include a window layer above the N-type layer and lower conductivity layer, and an anode contact above the window layer. The avalanche photodiode can include an N+ barrier layer below the N? absorption layer, an N+ conduction layer below the N+ barrier layer, a substrate below the N+ conduction layer, and a cathode contact coupled with the N+ conduction layer.

Abstract: An avalanche photodiode with a defect-assisted silicon absorption region. An example includes a substrate; a layer of silicon on the substrate, the layer of silicon including a positively-doped region, a negatively-doped region, and an absorption region between the positively-doped and negatively-doped regions, the absorption region including defects in its crystal structure; and contacts in electrical communication with the positively-doped and negatively-doped regions to receive a bias potential.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of photoelectric conversion elements arranged on the semiconductor substrate to collectively form an image sensor, a plurality of trenches each formed between the photoelectric conversion elements adjacent to each other, and a plurality of impurity diffusion layers each provided at a bottom of the trench at a position deeper than a p-n junction of the photoelectric conversion element.

Abstract: The invention relates to an avalanche photodiode-type semiconductor structure (1) intended to receive electromagnetic radiation in a given wavelength. The structure comprises a first semiconductor zone (210) with a first type of conductivity with a first longitudinal face (201), said first zone (210) being made of mercury-cadmium telluride of the CdxHg1-xTe type with a cadmium proportion x that is varied. The structure (1) also comprises at least one second semiconductor zone (310) in contact with the first zone (210), and a third semiconductor zone (410) in contact with the second zone (310). The first zone (210) comprises a doping element, such as arsenic, of which the concentration is varied alternately in a direction substantially perpendicular to the first longitudinal face (201) between a so-called low concentration and a so-called high concentration. The invention also relates to a process for producing a structure (1) according to the invention.

Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.

Abstract: A first semiconductor layer serves as a first implanted layer of a first conductivity type. A second semiconductor layer of a second conductivity type is provided under the first semiconductor layer. The second conductivity type is opposite to the first conductivity type. The second semiconductor layer is buried in an epitaxial layer grown above a substrate. The second semiconductor layer becomes fully depleted when an appropriate bias voltage is applied to the device.

Abstract: Photonic devices monolithically integrated with CMOS are disclosed, including sub-100 nm CMOS, with active layers comprising acceleration regions, light emission and absorption layers, and optional energy filtering regions. Light emission or absorption is controlled by an applied voltage to deposited films on a pre-defined CMOS active area of a substrate, such as bulk Si, bulk Ge, Thick-Film SOI, Thin-Film SOI, Thin-Film GOI.

Abstract: Semiconductor avalanche photo transistors and methods of manufacturing the same, operable for internal amplification of a photo signal and for use in detection of weak light signals, gamma rays and nuclear particles. The multi-pixel avalanche photo transistor devices can comprise a semiconductor layer, a plurality of semiconductor areas (pixels) forming a p-n-junction with the semiconductor layer, a common conductive grid separated from the semiconductor layer by a dielectric layer and individual micro-resistors connected said semiconductor areas with the common conductive grid. Systems and methods described can be operable to decrease optical crosstalk at high signal amplification and the special capacity of the multi-pixel avalanche photo transistor, as well as improve speed its photo response.

Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) avalanche photodiode are provided. In one aspect, the Ge—Si avalanche photodiode utilizes a silicon buffer layer to reduce the energy of holes drifting into absorption layer where the absorption material has lower ionization threshold, thereby suppressing multiplication noise and increasing the gain-bandwidth product of the avalanche photodiode. In another aspect, the Ge—Si avalanche photodiode utilizes an edge electric field buffer layer region to reduce the electric field along the sidewall of multiplication layer, where high electric field is applied for avalanche, thereby reducing probability of sidewall breakdown and enhancing reliability of the avalanche photodiode.