Containing Dopant Adapted For Photoionization Patents (Class 257/439)
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Patent number: 7781856Abstract: In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.Type: GrantFiled: February 4, 2009Date of Patent: August 24, 2010Assignee: President and Fellows of Harvard CollegeInventors: Eric Mazur, James E. Carey, III
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Patent number: 7777287Abstract: An analytical system-on-a-chip can be used as an analytical imaging device, for example, for detecting the presence of a chemical compound. A layer of analytical material is formed on a transparent layer overlying a solid state image sensor. The analytical material can react in known ways with at least one reactant to block light or to allow light to pass through to the array. The underlying sensor array, in turn, can process the presence, absence or amount of light into a digitized signal output. The system-on-a-chip may also include software that can detect and analyze the output signals of the device.Type: GrantFiled: July 12, 2006Date of Patent: August 17, 2010Assignee: Micron Technology, Inc.Inventor: Terry Gilton
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Patent number: 7741646Abstract: A liquid crystal display panel and a fabricating method thereof comprising an image sensing capability, image scanning, and touch inputting. In the liquid crystal display device, a gate line and a data line are formed to intersect each other on a substrate to define a pixel area in which a pixel electrode is positioned. A first thin film transistor is positioned at an intersection area of the gate line and the data line. A sensor thin film transistor senses light having image information and supplied with a first driving voltage from the data line. A driving voltage supply line is positioned in parallel to the gate line to supply a second driving voltage to the sensor thin film transistor.Type: GrantFiled: June 13, 2006Date of Patent: June 22, 2010Assignee: LG Display Co., Ltd.Inventors: Hee Kwang Kang, Kyo Seop Choo
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Patent number: 7696592Abstract: A solid state imaging apparatus includes a plurality of photoelectric conversion sections formed in an imaging area of a silicon substrate, and an embedded layer embedded in an isolation trench formed in at least one part of the silicon substrate located around the photoelectric conversion sections. The embedded layer is made of an isolation material having a thermal expansion coefficient larger than silicon oxide and equal to or smaller than silicon.Type: GrantFiled: June 28, 2005Date of Patent: April 13, 2010Assignee: Panasonic CorporationInventors: Mitsuyoshi Mori, Daisuke Ueda
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Patent number: 7679662Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.Type: GrantFiled: November 9, 2006Date of Patent: March 16, 2010Assignee: Sony CorporationInventors: Sadamu Suizu, Masaaki Takayama
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Patent number: 7679158Abstract: A thermal deformation preventing layer is located between a recording photoconductive layer, which contains a-Se as a principal constituent, and a crystallization preventing layer, which is constituted of an a-Se layer containing at least one kind of element selected from the group consisting of As, Sb, and Bi. The thermal deformation preventing layer is constituted of an a-Se layer containing at least one kind of specific substance selected from the group consisting of a metal fluoride, a metal oxide, SiOx, and GeOx, where x represents a number satisfying 0.5?x?1.5.Type: GrantFiled: May 15, 2008Date of Patent: March 16, 2010Assignee: FUJIFILM CorporationInventor: Shinji Imai
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Patent number: 7667287Abstract: Provided are a thin film transistor (TFT) capable of increasing ON current and decreasing OFF current values, a TFT substrate having the polysilicon TFT, a method of fabricating the polysilicon TFT, and a method of fabricating a TFT substrate having the polysilicon TFT. The polysilicon TFT substrate includes a gate line and a data line defining a pixel region, a pixel electrode formed in the pixel region, and a TFT including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode connected to the pixel electrode, and a polysilicon active layer forming a channel between the source and drain electrodes. The polysilicon active layer includes a channel region on which the gate electrode is superposed, source and drain regions connected to the source and drain electrode, respectively, and at least two lightly doped drain (LDD) regions y formed between the source region and the channel region and between the drain region and the channel region.Type: GrantFiled: February 8, 2006Date of Patent: February 23, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Chun Gi You
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Publication number: 20090308450Abstract: Solar cells in accordance with the present invention have reduced ohmic losses. These cells include photo-receptive regions that are doped less densely than adjacent selective emitter regions. The photo-receptive regions contain multiple four-sided pyramids that decrease the amount of light lost to the solar cell by reflection. The smaller doping density in the photo-receptive regions results in less blue light that is lost by electron-hole recombination. The higher doping density in the selective emitter region allows for better contacts with the metallic grid coupled to the multiple emitter regions. Preferably, the selective emitter and photo-receptive regions are both implanted using a narrow ion beam containing the dopants.Type: ApplicationFiled: June 11, 2009Publication date: December 17, 2009Applicant: SOLAR IMPLANT TECHNOLOGIES INC.Inventors: Babak Adibi, Edward S. Murrer
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Patent number: 7586123Abstract: A thin film transistor array substrate and a fabricating method thereof are disclosed. The thin film transistor array substrate protects a thin film transistor without a protective film and accordingly reduces the manufacturing cost. In the thin film transistor array substrate, a gate electrode is connected to a gate line. A source electrode is connected to a data line crossing the gate line to define a pixel area. A drain electrode is opposed to the source electrode with a channel therebetween. A semiconductor layer is in the channel. A pixel electrode in the pixel area contacts the drain electrode over substantially the entire overlapping area between the two. A channel protective film is provided on-the semiconductor layer corresponding to the channel to protect the semiconductor layer.Type: GrantFiled: June 10, 2005Date of Patent: September 8, 2009Assignee: LG. Display Co., Ltd.Inventors: Young Seok Choi, Byung Yong Ahn, Ki Sul Cho, Hong Woo Yu
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Publication number: 20090152663Abstract: A perforated monocrystalline silicon plate assembly is provided for forming and transferring of monocrystalline silicon thin film solar cells. The assembly comprises a perforated monocrystalline silicon plate with a plurality of through holes and obstructive holes. The assembly is allowed to grow a first p-type epitaxial layer with an inverted pyramid surface on the surface of the silicon plate, which is then selectively converted into a porous silicon layer with an inverted pyramid surface. The assembly is further allowed to grow a second p-type epitaxial layer with an inverted pyramid surface on the surface of the porous silicon layer, which is then used to fabricate a monocrystalline silicon thin film solar cell with an inverted pyramid surface.Type: ApplicationFiled: December 18, 2007Publication date: June 18, 2009Inventor: Xiang Zheng Tu
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Publication number: 20090084440Abstract: A semiconductor photovoltaic device comprises a semiconductor substrate having a first surface and a second surface, the first surface and the second surface being opposed to each other, a plurality of trenches extending into the semiconductor substrate from the first surface, the first surface being a substantially planar surface, a dopant region in the semiconductor substrate near the first surface and the plurality of trenches, a first conductive layer over the semiconductor substrate, and a second conductive layer on the second surface of the semiconductor substrate.Type: ApplicationFiled: October 1, 2007Publication date: April 2, 2009Applicant: INTEGRATED DIGITAL TECHNOLOGIES, INC.Inventors: Brite Jui-Hsien WANG, Naejye HWANG, Zingway PEI
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Patent number: 7501671Abstract: The present invention is characterized in that a semiconductor film containing a rare gas element is formed on a crystalline semiconductor film obtained by using a catalytic element via a barrier layer, and the catalytic element is moved from the crystalline semiconductor film to the semiconductor film containing a rare gas element by a heat treatment. Furthermore, a first impurity region and a second impurity region formed in a semiconductor layer of a first n-channel TFT are provided outside a gate electrode. A third impurity region formed in a semiconductor layer of a second n-channel TFT is provided so as to be partially overlapped with a gate electrode. A third impurity region is provided outside a gate electrode. A fourth impurity region formed in a semiconductor layer of a p-channel TFT is provided so as to be partially overlapped with a gate electrode. A fifth impurity region is provided outside a gate electrode.Type: GrantFiled: March 28, 2007Date of Patent: March 10, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takashi Hamada, Satoshi Murakami, Shunpei Yamazaki, Osamu Nakamura, Masayuki Kajiwara, Junichi Koezuka, Toru Takayama
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Publication number: 20090021717Abstract: A radiation detector, a method of manufacturing a radiation detector, and a lithographic apparatus comprising a radiation detector. The radiation detector has a radiation sensitive surface. The radiation sensitive surface is sensitive to radiation wavelengths between 10-200 nm and charged particles. The radiation detector has a silicon substrate, a dopant layer, a first electrode, and a second electrode. The silicon substrate is provided in a surface area at a first surface side with doping profile of a certain conduction type. The dopant layer is provided on the first surface side of the silicon substrate. The dopant layer has a first layer of dopant material and a second layer. The second layer is a diffusion layer in contact with the surface area at the first surface side of the silicon substrate. The first electrode is connected to dopant layer. The second electrode is connected to the silicon substrate.Type: ApplicationFiled: June 24, 2008Publication date: January 22, 2009Applicant: ASML Netherlands B.V.Inventors: Stoyan Nihtianov, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus, Joshepus, Maria Kemper, Marc Antonius, Maria Haast, Gerardus Wilhelmus, Petrus, Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas, Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus, Maria Scholtes
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Patent number: 7408190Abstract: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.Type: GrantFiled: July 5, 2005Date of Patent: August 5, 2008Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Wen-Kuang Tsao, Hung-I Hsu
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Patent number: 7368797Abstract: In a back-surface electrode type photoelectric conversion element having electrodes and semiconductor layers for collecting carriers disposed only on a back surface side of a semiconductor substrate, a semiconductor thin film that is larger in band gap than the semiconductor substrate and that contains an element causing a conductivity identical to or different from a conductivity of the semiconductor substrate is provided on a light-receiving surface side of the semiconductor substrate, and a diffusion layer is formed on a surface of the semiconductor substrate.Type: GrantFiled: May 24, 2005Date of Patent: May 6, 2008Assignee: Toyota Jidosha Kabushiki KaishaInventors: Tomonori Nagashima, Kenichi Okumura
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Patent number: 7358584Abstract: An imaging sensor includes a signal processing section, a photo-current generating and collecting section, and a separating region between the signal processing section and the photo-current generating and collecting section. The photo-current generating and collecting section includes a photodiode well having a first type of conductivity, and a contact associated with the photodiode well. A region surrounds the photodiode well, and is adjacent the separating region and has a second type of conductivity.Type: GrantFiled: June 9, 2005Date of Patent: April 15, 2008Assignee: STMicroelectronics Ltd.Inventor: Jeffrey Raynor
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Patent number: 7355259Abstract: Disclosed is a photodiode array which includes a plurality of p-i-n photodiodes arrayed on a semi-insulative semiconductor substrate, each photodiode including an n-type semiconductor layer grown on the substrate, an i-type semiconductor layer grown on the n-type semiconductor layer, a p-type semiconductor layer grown on the i-type semiconductor layer, an n-type electrode provided on the n-type semiconductor layer in a region exposed by partially removing the p-type semiconductor layer and the i-type semiconductor layer, and a p-type electrode provided on the p-type semiconductor layer. A trench is provided between the two adjacent photodiodes by partially removing the p-type semiconductor layer, the i-type semiconductor layer, and the n-type semiconductor layer. Consequently, the size and pitch of the photodiodes can be decreased and crosstalk between the photodiodes can be reduced. Also disclosed is an optical receiver device including the photodiode array.Type: GrantFiled: August 18, 2005Date of Patent: April 8, 2008Assignee: Sumitomo Electric Industries, Ltd.Inventors: Akira Yamaguchi, Yoshiki Kuhara
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Publication number: 20080042229Abstract: An image sensor is provided incorporating a first conductive type semiconductor substrate including an active area defined by a device isolation layer; a second conductive type first ion implant area formed as multiple regions in the active area; a second conductive type second ion implant area connecting the multiple regions of the second conductive type first ion implant area; and a first conductive type ion implant area formed on the second conductive type second ion implant area. The multiple regions of the second conductive type first ion implant area can be formed deeply in the substrate. The second conductive type second ion implant can be formed in the substrate at an upper region of the first ion implant area, a middle region of the first ion implant area, or a lower region of the first ion implant area.Type: ApplicationFiled: July 25, 2007Publication date: February 21, 2008Inventor: Keun Hyuk Lim
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Patent number: 7332782Abstract: A dye-sensitized solar cell with high conversion efficiency is provided. The dye-sensitized solar cell according to the present invention has, between an electrode (2) formed on a surface of a transparent substrate (1) and a counter electrode (6), a light-absorbing layer (3) containing light-absorbing particles carrying dye and an electrolyte layer (5), characterized in that the light-absorbing layer (3) containing light-scattering particles (4) different in size from the light-absorbing particles. In such a dye-sensitized solar cell according to the present invention, the energy of light, which passes through a light-absorbing layer in a conventional cell structure, can be strongly absorbed by the dye in the light-absorbing layer of the present invention. This will increase the conversion efficiency and output current of the dye-sensitized solar cell.Type: GrantFiled: May 20, 2005Date of Patent: February 19, 2008Assignee: Sony CorporationInventor: Takashi Tomita
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Patent number: 7253432Abstract: A photodetector and method of detecting far infrared optical signals. In one embodiment of the present invention, the photodetctor has a plurality of N barriers, N being an integer greater than 1, each barrier being a layer of a material made from a first and a second group III elements and a first group V element and characterized by a bandgap. The photodetector further has a plurality of N?1 emitters, each emitter being a layer of material made from a third group III element and a second group V element and characterized by a bandgap different from that of the barriers and having at least one free carrier responsive to optical signals, wherein each emitter is located between two barriers so as to form a heterojunction at each interface between an emitter and a barrier.Type: GrantFiled: October 16, 2001Date of Patent: August 7, 2007Assignee: Georgia State University Research Foundation, Inc.Inventors: A.G. Unil Perera, Steven George Matsik
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Patent number: 7244998Abstract: The present invention is a semiconductor module (20) in which, for example, twenty-five semiconductor devices (10) with a pnotoelectric conversion function are arranged in the form of a five row by five column matrix via an electrically conductive mechanism including of six connecting leads (21 to 26). The semiconductor devices (10) in each column are connected in series, and the semiconductor devices (10) in each row are connected in parallel. Positive and negative terminals, which are embedded in a light transmitting member (28) made of a transparent synthetic resin and which protrude to the outside, are also provided. The semiconductor device (10) comprises a diffusion layer, a pn junction, and one flat surface on the surface of a spherical p-type semiconductor crystal, for example.Type: GrantFiled: August 13, 2001Date of Patent: July 17, 2007Inventor: Josuke Nakata
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Patent number: 7176543Abstract: A thin film semiconductor device such as a photovoltaic device is fabricated on a lightweight substrate material which is affixed to a layer of material which is in turn supported by a carrier. Following the fabrication of the device, the carrier is removed such as by an etching process, leaving the layer of material adhered to the substrate. The adhered layer provides a balancing force to the back side of the substrate which minimizes or eliminates the tendency of the semiconductor device supported on the opposite side of the substrate to cause the substrate to curl. Also disclosed are devices and structures made by this method.Type: GrantFiled: January 25, 2006Date of Patent: February 13, 2007Assignee: United Solar Ovonic Corp.Inventor: Kevin Beernink
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Patent number: 7151305Abstract: In a photoelectric conversion device including a first-conductivity type first semiconductor region located in a pixel region, a second-conductivity type second semiconductor region provided in the first semiconductor region, and a wiring for electrically connecting the second semiconductor region to a circuit element located outside the pixel region, a shield is provided on the light-incident side of the wiring, via an insulator in such a way that it covers at least part of the wiring and also the shield includes a conductor whose potential stands fixed. This photoelectric conversion device may hardly be affected with low-frequency radiated noises as typified by power-source noise.Type: GrantFiled: March 25, 2005Date of Patent: December 19, 2006Assignee: Canon Kabushiki KaishaInventors: Hiraku Kozuka, Takahiro Kaihotsu
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Patent number: 7145189Abstract: A pixel cell having a substrate, photo-conversion device, and at least one dielectric layer over the photo-conversion device. The at least one dielectric layer includes one or more rare earth elements for amplifying the number of photons capable of being converted to charge by the photo-conversion device.Type: GrantFiled: August 12, 2004Date of Patent: December 5, 2006Assignee: Micron Technology, Inc.Inventor: Chandra Mouli
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Patent number: 7078741Abstract: The present invention includes a photodiode having a first p-type semiconductor layer and an n-type semiconductor layer coupled by a second p-type semiconductor layer. The second p-type semiconductor layer has graded doping along the path of the carriers. In particular, the doping is concentration graded from a high value near the anode to a lower p concentration towards the cathode. By grading the doping in this way, an increase in absorption is achieved, improving the responsivity of the device. Although this doping increases the capacitance relative to an intrinsic semiconductor of the same thickness, the pseudo electric field that is created by the graded doping gives the electrons a very high velocity which more than compensates for this increased capacitance.Type: GrantFiled: February 3, 2003Date of Patent: July 18, 2006Assignee: Picometrix, Inc.Inventors: Cheng C. Ko, Barry Levine
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Patent number: 7057262Abstract: An optical device having a high reflector tunable stress coating includes a micro-electromechanical system (MEMS) platform, a mirror disposed on the MEMS platform, and a multiple layer coating disposed on the mirror. The multiple layer coating includes a layer of silver (Ag), a layer of silicon dioxide (SiO2) deposited on the layer of Ag, a layer of intrinsic silicon (Si) deposited on the layer of SiO2, and a layer of silicon oxynitride (SiOxNy) deposited on the layer of Si. The concentration of nitrogen is increased and/or decreased to tune the stress (e.g., tensile, none, compressive).Type: GrantFiled: February 18, 2004Date of Patent: June 6, 2006Assignee: Intel CorporationInventor: Michael Goldstein
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Patent number: 7023035Abstract: A thin film transistor (TFT) array substrate including a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes and a repairing circuit is provided. The scan lines and the data lines are disposed over the substrate, therefore a plurality of pixel areas are defined. Each thin film transistor is disposed in each pixel area respectively and driven by the corresponding scan line and data line. Each pixel electrode is disposed in each pixel area respectively and electrically connected to the corresponding thin film transistor. A repairing method for TFT array substrate is also provided. The method includes connecting the repairing circuit and the defect scan line besides the break to repair and convert the line defect into two-point defect, single defect, or totally repair the line defect.Type: GrantFiled: June 23, 2004Date of Patent: April 4, 2006Assignee: Au Optronics CorporationInventor: Han-Chung Lai
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Patent number: 6969899Abstract: An image sensor device and fabrication method thereof. An image sensing array is formed in a substrate, wherein the image sensing array comprises a plurality of photosensors with spaces therebetween. A first dielectric layer with a first refractive index is formed overlying the spaces but not the photosensors. A conformal second dielectric layer with a second refractive index is formed on a sidewall of the first dielectric layer. A third dielectric layer with a third refractive index is formed overlying the photosensors but not the spaces. The third refractive index is greater than the second refractive index. A light guide constructed by the second and third dielectric layers is formed overlying each photosensor, thereby preventing incident light from striking other photosensors.Type: GrantFiled: December 8, 2003Date of Patent: November 29, 2005Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Dun-Nian Yaung, Chung-Yi Yu
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Patent number: 6933585Abstract: The invention concerns a color image sensor that can be used to make a miniature camera, and a corresponding method for making this sensor. The image sensor comprises a transparent substrate (40) on the upper part of which are superimposed, successively, a mosaic of color filters (18), a very thin silicon layer (30) comprising photosensitive zones, and a stack of conductive layers (14) and insulating layers (16) defining image detection circuits enabling the collection of the electrical charges generated by the illumination of the photosensitive zones through the transparent substrate. The manufacturing method consists in producing the photosensitive circuits on a silicon wafer, transferring said wafer on to a temporary substrate, thinning the wafer down to a thickness of about three to 30 micrometers, depositing color filters on the surface of the remaining silicon layer and transferring the structure to a permanent transparent substrate and eliminating the temporary substrate.Type: GrantFiled: August 30, 2002Date of Patent: August 23, 2005Assignee: Atmel Grenoble S.A.Inventors: Louis Brissot, Eric Pourquier
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Patent number: 6847058Abstract: ON resistance and leakage current of a vertical power MOSFET are to be diminished. In a vertical high breakdown voltage MOSFET with unit MOSFETs (cells) arranged longitudinally and transversely over a main surface of a semiconductor substrate, the cells are made quadrangular in shape, and in each of the cells, source regions whose inner end portions are exposed to the interior of a quadrangular source contact hole are arranged separately and correspondingly to each side of the quadrangle. Each source region is trapezoidal in shape, and a lower side of the trapezoid is positioned below a gate electrode (gate insulating film), while an upper side portion of the trapezoid is exposed to the interior of the source contact hole. The four source regions are separated from one another by diagonal regions of the quadrangle.Type: GrantFiled: August 15, 2003Date of Patent: January 25, 2005Assignee: Renesas Technology Corp.Inventors: Katuo Ishizaka, Tetsuo Iijima
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Patent number: 6835992Abstract: A monolthically integrated VCSEL and photodetector, and a method of manufacturing same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds the layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where the photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons back into the photodetector not initially absorbed. The transmit and receive pairs are packaged in a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier.Type: GrantFiled: January 18, 2000Date of Patent: December 28, 2004Assignee: Optical Communication Products, Inc.Inventors: Stanley E. Swirhun, Jeffrey W. Scott
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Publication number: 20040251508Abstract: A dye-sensitized solar cell with high conversion efficiency is provided. The dye-sensitized solar cell according to the present invention has, between an electrode (2) formed on a surface of a transparent substrate (1) and a counter electrode (6), a light-absorbing layer (3) containing light-absorbing particles carrying dye and an electrolyte layer (5), characterized in that the light-absorbing layer (3) containing light-scattering particles (4) different in size from the light-absorbing particles. In such a dye-sensitized solar cell according to the present invention, the energy of light, which passes through a light-absorbing layer in a conventional cell structure, can be strongly absorbed by the dye in the light-absorbing layer of the present invention. This will increase the conversion efficiency and output current of the dye-sensitized solar cell.Type: ApplicationFiled: July 22, 2004Publication date: December 16, 2004Inventor: Takashi Tomita
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Patent number: 6825516Abstract: A CMOS imager having an epitaxial layer formed below pixel sensor cells is disclosed. An epitaxial layer is formed between a semiconductor substrate and a photosensitive region to improve the cross-talk between pixel cells. The thickness of the epitaxial layer is optimized so that the collection of signal carriers by the photosensitive region is maximized.Type: GrantFiled: January 15, 2003Date of Patent: November 30, 2004Assignee: Micron Technology, Inc.Inventor: Howard E. Rhodes
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Patent number: 6787818Abstract: A diffused junction semiconductor (12) for detecting light (48) at a predetermined wavelength is provided including a base (30) and an epitaxial structure (32) electrically coupled to the base (30). The epitaxial structure (32) forms a p-n junction (38) in the base (30). The epitaxial structure (32) includes at least one diffusion layer (50) electrically coupled to the base (30). At least one of the diffusion layers (50) contributes impurities in at least a portion of the base (30) to form the p-n junction (38) during growth of the epitaxial structure (32). A method for performing the same is also provided.Type: GrantFiled: June 14, 2002Date of Patent: September 7, 2004Assignee: The Boeing CompanyInventors: Charles B. Morrison, Rengarajan Sudharsanan, Moran Haddad, Dimitri Krut, Joseph C. Boisvert, Richard R. King, Nasser H. Karam
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Patent number: 6664623Abstract: A regenerative photoelectrochemical (RPEC) device comprising two substrates, wherein: one or both substrates are transparent and are coated with transparent electrical conductor (TEC) layer; one or more layers of porous wide band gap semiconductor is/are applied to selected area of said TEC layer and sensitised with dye; electrolyte is placed between said two substrates; hole(s) made in one or both said substrates to enable external electrical connection(s) to said RPEC device.Type: GrantFiled: February 4, 2002Date of Patent: December 16, 2003Assignee: Sustainable Technologies International PTY Ltd.Inventors: George Phani, Jason Andrew Hopkins, David Vittorio, Igor Lvovich Skryabin
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Patent number: 6635942Abstract: A semiconductor component (50), in particular a solar cell, which has at least one semiconductor base material (40) consisting of a mono or a polycrystalline structure. The semiconductor base material (40) consists at least in part of pyrite with the chemical composition FeS2 and which is cleaned for the purpose of achieving a defined degree of purity. Maximum benefit is drawn from the semiconductor base material (40) when it is produced from at least one layer of pyrite (51), at least one layer of boron (52) and at least one layer of phosphorous (53). An optimum type is derived from this semiconductor component when it is used as a solar cell.Type: GrantFiled: June 11, 1999Date of Patent: October 21, 2003Inventor: Nunzio La Vecchia
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Publication number: 20030107099Abstract: A semiconductor component (50), in particular a solar cell, which has at least one semiconductor base material (40) consisting of a mono or a polycrystalline structure. The semiconductor base material (40) consists at least in part of pyrite with the chemical composition FeS2 and which is cleaned for the purpose of achieving a defined degree of purity. Maximum benefit is drawn from the semiconductor base material (40) when it is produced from at least one layer of pyrite (51), at least one layer of boron (52) and at least one layer of phosphorous (53). An optimum type is derived from this semiconductor component when it is used as a solar cell.Type: ApplicationFiled: June 11, 1999Publication date: June 12, 2003Inventor: NUNZIO LA VECCHIA
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Patent number: 6570083Abstract: A photovoltaic generator including at least one photovoltaic cell, and a transparent matrix placed with at least one optically active material with an absorption wavelength &lgr;a and a reemission wavelength &lgr;r, the optically active material selected such that &lgr;a corresponds to a range of the photovoltaic cell with a lower sensitivity than &lgr;r, the matrix having an input surface and an opposite surface and comprises a reflecting coating an a dichroic filter on the input surface that substantially reflects wavelengths longer than about 950 nm and is substantially transparent for wavelengths less than about 950 nm, and on the opposite surface the matrix has a reflecting coating that reflects wavelengths greater than about 400 nm, and wherein the photovoltaic cell is included in the matrix.Type: GrantFiled: October 1, 2001Date of Patent: May 27, 2003Assignee: Biocure S.A.R.L.Inventors: Philippe Gravisse, Gilles Destremau, Marc Schiffmann
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Publication number: 20030052382Abstract: Systems and methods are described for compositions, apparatus and/or electronic devices. A composition, includes a composition layer defining a first surface and a second surface, the composition layer including a collection layer that is located closer to the first surface than to the second surface. An apparatus, includes a semiconductor absorber layer defining a first surface and a second surface; and an electrode layer coupled to the first surface of the semiconductor absorber layer, wherein the semiconductor absorber layer includes a collection layer that is located closer to the first surface than to the second surface.Type: ApplicationFiled: September 20, 2001Publication date: March 20, 2003Inventor: Billy J. Stanbery
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Patent number: 6448614Abstract: A circuit-incorporating photosensitive device comprising: an SOI wafer including a first silicon substrate, a second silicon substrate, and an oxide film; a photodiode formed in a first region of the SOI wafer; and a signal processing circuit formed in a second region of the SOI wafer, wherein the photodiode includes a photosensitive layer formed of an SiGe layer.Type: GrantFiled: May 25, 2001Date of Patent: September 10, 2002Assignee: Sharp Kabushiki KaishaInventors: Masaru Kubo, Toshihiko Fukushima, Zenpei Tani
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Patent number: 6429499Abstract: Disclosed is a semiconductor structure and manufacturing process for making an integrated FET and photodetector optical receiver on a semiconductor substrate. A FET is formed by forming at least one p region in a p-well of the substrate and forming at least one n region in the p-well of the substrate. A p-i-n photodetector is formed in the substrate by forming at least one p region in an absorption region of the substrate when forming the at least one p region in the p well of the FET and forming at least one n region in the absorption region of the substrate when forming the at least one n region in the p-well of the FET.Type: GrantFiled: May 18, 2000Date of Patent: August 6, 2002Assignee: International Business Machines CorporationInventors: Randolph B. Heineke, William K. Hogan, Scott Allen Olson, Clint Lee Schow
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Patent number: 6353238Abstract: A novel use of a solid state light detector with a low impedance substrate is described. Light that enters the substrate after traversing the antireflective layer creates an electron-hole pair. The electrons are collected in a crystalline epitaxial layer that spans the space charge region, or depletion layer. A high electric field accelerates free electrons inside the depletion region. The electrons collide with the lattice to free more holes and electrons resulting from the presence of a n-p junction, or diode. The diode is formed by placing the crystalline layer which has positive doping in close proximity with the electrodes which have negative doping. The continual generation of charge carriers results in avalanche multiplication with a large multiplication coefficient. During the avalanche process, electrons can be collected enabling light detection. A resistive layer is used to quench, or stop, the avalanche process.Type: GrantFiled: April 23, 2001Date of Patent: March 5, 2002Assignee: Board of Regents, The University of Texas SystemInventors: Peter P. Antich, Edward N. Tsyganov
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Patent number: 6346716Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.Type: GrantFiled: December 19, 1997Date of Patent: February 12, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Publication number: 20010022368Abstract: A novel use of a solid state light detector with a low impedance substrate is described. Light that enters the substrate after traversing the antireflective layer creates an electron-hole pair. The electrons are collected in a crystalline epitaxial layer that spans the space charge region, or depletion layer. A high electric field accelerates free electrons inside the depletion region. The electrons collide with the lattice to free more holes and electrons resulting from the presence of a n-p junction, or diode. The diode is formed by placing the crystalline layer which has positive doping in close proximity with the electrodes which have negative doping. The continual generation of charge carriers results in avalanche multiplication with a large multiplication coefficient. During the avalanche process, electrons can be collected enabling light detection. A resistive layer is used to quench, or stop, the avalanche process.Type: ApplicationFiled: April 23, 2001Publication date: September 20, 2001Applicant: Board of Regents, The University of Texas SystemInventors: Peter P. Antich, Edward N. Tsyganov
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Patent number: 6274806Abstract: A platinum complex represented by the formula PtL1/L2 or PtLX1/LX2 wherein L1 and L each represent a ligand selected from the group consisting of 2,2′-bipyridine compounds having at least one anionic group and 1,10-phenanthroline compounds having at least one anionic group, L2 represents a dithiolate selected from those represented by the formulas (a) through (d) shown in the specification, and X1 and X2 each represent a thiolate selected from those represented by the following formulas (e) and (f) shown in the specification. A dye-sensitized electrode includes a substrate having an electrically conductive surface, an oxide semiconductor film formed on the conductive surface, and the above platinum complex supported on the film. A solar cell includes the above electrode, a counter electrode, and an electrolyte disposed therebetween.Type: GrantFiled: March 27, 2000Date of Patent: August 14, 2001Assignee: Agency of Industrial Science and TechnologyInventors: Hideki Sugihara, Kohjiro Hara, Kazuhiro Sayama, Hironori Arakawa, Ashraful Islam, Lok Pratap Singh
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Patent number: 6246098Abstract: An apparatus for reducing the reflection of photons off the surface of a semiconductor device under test. In one embodiment, the present invention includes a semiconductor device comprising an integrated circuit formed on the top side of a semiconductor substrate. An anti-reflective coating is disposed over the back side of the semiconductor substrate for reducing the reflection of photons at the silicon/air interface.Type: GrantFiled: December 31, 1996Date of Patent: June 12, 2001Assignee: Intel CorporationInventor: Mario J. Paniccia
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Patent number: 6222209Abstract: A novel use of a solid state light detector with a low impedance substrate is described. Light that enters the substrate after traversing the antireflective layer creates an electron-hole pair. The electrons are collected in a crystalline epitaxial layer that spans the space charge region, or depletion layer. A high electric field accelerates free electrons inside the depletion region. The electrons collide with the lattice to free more holes and electrons resulting from the presence of an n-p junction, or diode. The diode is formed by placing the crystalline layer which has positive doping in close proximity with the electrodes which have negative doping. The continual generation of charge carriers results in avalanche multiplication with a large multiplication coefficient. During the avalanche process, electrons can be collected enabling light detection. A resistive layer is used to quench, or stop, the avalanche process.Type: GrantFiled: November 30, 1998Date of Patent: April 24, 2001Assignee: Board of Regents, The University of Texas SystemInventors: Peter P. Antich, Edward N. Tsyganov
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Patent number: 6146957Abstract: Since the PN junction of a photodiode is formed of a silicon substrate having a low impurity concentration and an epitaxial layer, the width of the depletion layer in the PN junction is formed wider, the parasitic capacitance by the junction capacitance is lowered, and the diffusion length of the silicon substrate is formed longer. Besides, a buried layer containing a high impurity concentration is formed by a high energy ion implantation method in such a depth that the buried layer cannot be depleted by a reverse voltage applied to the PN junction, which is served as a region to lead out the anode, which accordingly results in a low parasitic resistance at the anode. Thereby, the invention provides a semiconductor device including a photodetector and a method of manufacturing the same that achieves a high photoelectric conversion sensitivity and an excellent frequency characteristic at the same time.Type: GrantFiled: March 31, 1998Date of Patent: November 14, 2000Assignee: Sony CorporationInventor: Youichi Yamasaki
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Patent number: 6147391Abstract: A method of processing semiconductor films and layers, utilizing heterojunctions, to create a photodetector. Novel combinations of materials, such as silicon and indium gallium arsenide (InGaAs) are combined using wafer fusion techniques to create heterojunctions that cannot be created by any other growth methods. Devices responsive to different regions of the optical spectrum or that have higher efficiencies are created.Type: GrantFiled: March 19, 1999Date of Patent: November 14, 2000Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, Aaron R. Hawkins
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Patent number: 5757025Abstract: An infrared photodetector using .delta.-doped semiconductors capable of reducing the requirement to form a quantum well structure of high quality, reducing the need of a cooling device due to the operation at the room temperature, and controlling the wavelength of infrared ray detected by controlling the .delta.-doped concentration. The infrared photodetector includes a semiconductor substrate, an active layer formed over the semiconductor substrate, .delta.-doped layers formed in the active layer, the .delta.-doped layer having a doping concentration controlled for controlling a wavelength of infrared ray detected, a current injection layer formed over the active layer, a cap layer formed over the current injection layer, and an electrode formed on the cap layer.Type: GrantFiled: August 22, 1995Date of Patent: May 26, 1998Assignee: Goldstar Electron Co., Ltd.Inventor: Do Yeol Ahn