Abstract: A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.

Abstract: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one active cell further includes a trenched source contact opened between the trenches wherein the trenched source contact opened through a source region into a body region for electrically connecting the source region to a source metal disposed on top of an insulation layer wherein a trench bottom surface of the trenched source contact further covered with a conductive material to function as an integrated Schottky barrier diode in said active cell. A shielding structure is disposed at the bottom and insulated from the trenched gate to provide shielding effect for both the trenched gate and the Schottky diode.

Abstract: Provided are a high-quality CMOS image sensor and a photo diode, which can be fabricated in sub-90 nm regime using nanoscale CMOS technology. The photo diode includes: a p-type well; an internal n-type region formed under a surface of the p-type well; and a surface p-type region including a highly doped p-type SiGeC epitaxial layer or a polysilicon layer deposited on a top surface of the p-type well over the internal n-type region. The image sensor includes: a photo diode including an internal n-type region and a surface p-type region; a transfer transistor for transmitting photo-charges generated in the photo diode to a floating diffusion node; and a driving transistor for amplifying a variation in an electric potential of the floating diffusion node due to the photo-charges. The image sensor further includes a floating metal layer for functioning as the floating diffusion node and applying an electric potential from a drain of the transfer transistor to a gate of the driving transistor.

Abstract: Embodiments relate to an image sensor and a method for manufacturing an image sensor. According to embodiments, a transistor structure may be manufactured on a semiconductor substrate, and an insulating layer covering the transistor structure may be formed. The insulating layer may be patterned to form a first via that may expose the semiconductor substrate, and a silicon layer may be formed on the first via and the insulating layer. The silicon layer and the insulating layer may be patterned to form a second via exposing the transistor structure, and the second via may be filled with metal to form a connecting line electrically connected with the transistor structure. Conductive impurities may be implanted into the silicon layer and may form a light receiving portion connected with the connecting line.

Abstract: An output terminal of a photoelectric conversion element included in the photoelectric conversion device is connected to a drain terminal and a gate terminal of a MOS transistor which is diode-connected, and a voltage Vout generated at the gate terminal of the MOS transistor is detected in accordance with a current Ip which is generated at the photoelectric conversion element. The voltage Vout generated at the gate terminal of the MOS transistor can be directly detected, so that the range of output can be widened than a method in which an output voltage is converted into a current by connecting a load resistor, and so on.

Abstract: Double mold opto-coupler and method for manufacture. A first subassembly is formed that includes a light detector. The first subassembly is molded with a first mold material to form a molded first subassembly. A light source is attached to the molded first sub-assembly to form a second sub-assembly. The second sub-assembly is molded with a second mold material to form a final assembly with predetermined dimensions.

Abstract: The invention relates to the fabrication of optical microsystems for miniature cameras or miniature matrix displays. It is proposed that N dot matrix arrays and associated circuits should be collectively fabricated, on the front of a semiconductor wafer, to produce N identical chips, with on the side of each array, external connection lands; a plate, used to collectively form N identical optical image-forming structures, each optical image-forming structure covering a respective chip and being designed to form an overall image corresponding with the whole of the matrix array of the respective chip, is fabricated collectively and placed in close contact with the front of the semiconductor wafer; through the thickness of the wafer, conductive vias extending to the contact lands are opened, and, only after these various operations, the wafer is divided into N individual optical microsystems comprising an electronic chip covered by an optical structure.

Abstract: There is disclosed an imaging system comprising: a first integrated circuit including a photodiode array comprising a plurality of integrating photodiode elements formed in an array of rows and columns, the integrated circuit providing a plurality of output signals corresponding to an output of each photodiode; and a second integrated circuit for receiving as inputs the plurality of output signals from the first integrated circuit and including a plurality of multiplexers corresponding to the number of columns in the array, the outputs signals from a respective column forming inputs to a respective multiplexer, each multiplexer for selectively connecting one of the output signals to a multiplexer output, wherein each multiplexer is selectively switched between the plurality of output signals by a plurality of control lines, the number of control lines corresponding to the number of rows in the array.

Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.

Abstract: A wafer bonded composite structure is provided for matching a coefficient of thermal expansion of a first semiconductor chip to a coefficient of thermal expansion of a second semiconductor chip in order to provide a thermally matched hybridized semiconductor chip assembly. The wafer bonded composite structure includes a first semiconductor chip having a top and a bottom surface. The first semiconductor chip has a coefficient of thermal expansion which is less than the coefficient of thermal expansion of the second semiconductor chip. Preferably, the first semiconductor chip is an readout integrated circuit (ROIC) and the second semiconductor chip is an infrared detector chip. Further, the wafer bonded composite structure also includes a substrate wafer bonded to a bottom surface of the first semiconductor chip to form the wafer bonded composite structure itself.

Abstract: A sensor is implemented in an integrated circuit. The sensor includes one or more sensor pads that are provided at or near a surface of the integrated circuit. One or more integrated circuit components such as a sense amplifier are provided in the integrated circuit die adjacent the sensor pads. One or more other components are provided in the integrated circuit die adjacent the sensor pads.

Abstract: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity of the lower electrode.

Abstract: An image sensor using a back-illuminated photodiode and a manufacturing method thereof are provided. According to the present invention, since a surface of the back-illuminated photodiode can be stably treated, the back-illuminated photodiode can be formed to have a low dark current, a constant sensitivity of blue light for all photodiodes, and high sensitivity. In addition, it is possible to manufacture an image sensor with high density by employing a three dimensional structure in which a photodiode and a logic circuit are separately formed on different substrates.

Abstract: Image sensor devices and methods for fabricating the same are provided. An exemplary embodiment of an image sensor device comprises a support substrate. A passivation structure is formed over the support substrate. An interconnect structure is formed over the passivation structure. A first semiconductor layer is formed over the interconnect structure, having a first and second surfaces, wherein the first and second surfaces are opposing surfaces. At least one light-sensing device is formed over/in the first semiconductor layer from a first surface thereof. A color filter layer is formed over the first semiconductor layer from a second surface thereof. At least one micro lens is formed over the color filter layer.

Abstract: A sensor component and a panel used for the production thereof is disclosed. The sensor component has, in addition to a sensor chip with a sensor region, a rear side and passive components. These are embedded jointly in a plastics composition, in such a way that their respective electrodes can be wired from an overall top side of a plastic plate.

Abstract: A thermal deformation preventing layer is located between a recording photoconductive layer, which contains a-Se as a principal constituent, and a crystallization preventing layer, which is constituted of an a-Se layer containing at least one kind of element selected from the group consisting of As, Sb, and Bi. The thermal deformation preventing layer is constituted of an a-Se layer containing at least one kind of specific substance selected from the group consisting of a metal fluoride, a metal oxide, SiOx, and GeOx, where x represents a number satisfying 0.5?x?1.5.

Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.

Abstract: Provided is an image sensor. The image sensor can include a first substrate comprising a pixel portion in which a readout circuitry is provided and a peripheral portion in which a peripheral circuitry is provided. An interlayer dielectric including lines can be formed on the first substrate to connect with the readout circuitry and the peripheral circuitry. A crystalline semiconductor layer can be provided on a portion of the interlayer dielectric corresponding to the pixel portion through a bonding process. The crystalline semiconductor layer can include a first photodiode and second photodiode. The first and second photodiodes can be defined by device isolation trenches in the crystalline semiconductor layer. A device isolation layer can be formed on the crystalline semiconductor layer comprising the device isolation trenches. An upper electrode layer passes through the device isolation layer to connect with a portion of the first photodiode.

Abstract: Provided are an image sensor and a method of forming the image sensor. The image sensor has a base multi-layered reflection layer interposed between a photodiode and an interlayer insulating layer. The photodiode has a first surface adjacent to the interlayer insulating layer and a second surface opposite the first surface. Here, external light is incident on the second surface of the photodiode. Also, the image sensor includes a sidewall multi-layered reflection layer that encloses the photodiode.

Abstract: An image sensor having pixels that include two patterned semiconductor layers. The top patterned semiconductor layer contains the photoelectric elements of pixels having substantially 100% fill-factor. The bottom patterned semiconductor layer contains transistors for detecting, resetting, amplifying and transmitting signals charges received from the photoelectric elements. The top and bottom patterned semiconductor layers may be separated from each other by an interlayer insulating layer that may include metal interconnections for conducting signals between devices formed in the patterned semiconductor layers and from external devices.

Abstract: A method for manufacturing an optical element having a surface-emitting type semiconductor laser and a photodetector element that detects light emitted from the surface-emitting type semiconductor laser, the method including the steps of: (a) laminating, above a substrate, semiconductor layers for forming a first mirror, an active layer, a second mirror, a photoabsorption layer, an etching stopper layer and a contact layer; (b) patterning the semiconductor layers to form at least a photoabsorption layer, an etching stopper layer and a contact layer; (c) forming an electrode above the contact layer; and (d) etching a portion of the contact layer until an upper surface of the etching stopper layer is exposed.

Abstract: A CCD solid state imaging module comprises a CCD area sensor, a substrate bias voltage setting device formed on said CCD area sensor for outputting a voltage, and a substrate bias voltage outputting device formed on a chip other than said CCD area sensor for outputting a substrate bias voltage of said CCD area sensor by selecting one voltage level from a plurality of voltages based on the voltage output by said substrate bias voltage setting device. A solid state imaging module suitable for a CCD area sensor having multiple driving modes can be provided.

Abstract: The present invention relates to an LED package including photo diode. The LED package includes a silicon substrate, and a photo diode is formed in an upper part thereof. Also, an insulation layer is formed on the silicon substrate excluding at least a light-receiving area of the photodiode. In the LED package, an LED terminal is formed on the insulation layer to be connected to the photo diode. First and second LED connecting pads are formed on the insulation layer, and arranged on both sides of the photo diode. In addition, an LED chip is mounted on the silicon substrate, and connected to the first and second LED connecting pads.

Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a semiconductor substrate, a metal line layer, a first conduction type conducting layer, a first pixel isolation layer, an intrinsic layer, and second conduction type conducting layer. The semiconductor substrate includes a circuit region. The metal line layer including a plurality of metal lines and an interlayer insulating layer is formed on the semiconductor substrate. The first conductive layer having patterns separated from each other by the pixel isolation layer is formed on the metal lines. The first pixel isolation layer is formed between the separated patterns of the first conduction type conducting layer. The intrinsic layer is formed on the first conductive layer and the first pixel isolation layer. The second conduction type conducting layer is formed on the intrinsic layer.

Abstract: A thin film transistor (TFT) substrate includes a transparent substrate, a plurality of TFTs and a photosensitive capacitor formed on the transparent substrate. A capacitance of the photosensitive capacitor is variable on the condition of environment brightness. A method for manufacturing the TFT substrate and an LCD using the TFT substrate are also provided.

Abstract: A photoelectric converter includes a plurality of substrates, which are located adjacent to each other and on which a plurality of photoelectric conversion devices are two-dimensionally arranged, and either scan circuits or detection circuits that are arranged on two opposing sides of the photoelectric converter, whereby scanning directions either from the scan circuits or from the detection circuits, which are arranged on the two opposing sides, are capable of being set so as to be performed in like directions.

Abstract: The invention relates to tunable wavelength-selective optical filters for letting light of a narrow optical spectrum band, centered around an adjustable wavelength, to pass through and to stop wavelengths lying outside this band. More particularly, the invention relates to a process for the collective fabrication of optical filtering components, consisting in producing a plurality of optical filtering components on a transparent substrate. The process further comprises covering the plurality of components with a transparent collective cover, in optically testing each component individually, and in separating the various components from one another. The invention also relates to a wafer of components, comprising a transparent substrate on which a plurality of optical filtering components has been produced, a transparent cover (8) collectively covering the components. The wafer further includes means for individually testing each component.

Abstract: A semiconductor image sensor module and a method for manufacturing thereof as well as a camera and a method for manufacturing thereof are provided in which a semiconductor image sensor chip and an image signal processing chip are connected with a minimum parasitic resistance and parasitic capacity and efficient heat dissipation of the image signal processing chip and shielding of light are simultaneously obtained.

Abstract: A structure for implementation of back-illuminated CMOS or CCD imagers. An epitaxial silicon layer is connected with a passivation layer, acting as a junction anode. The epitaxial silicon layer converts light passing through the passivation layer and collected by the imaging structure to photoelectrons. A semiconductor well is also provided, located opposite the passivation layer with respect to the epitaxial silicon layer, acting as a junction cathode. Prior to detection, light does not pass through a dielectric separating interconnection metal layers.

Abstract: A photosensor array includes data and scan lines (124, 148), circuitry of each data line/scan line pair formed in a backplane (110) on a substrate (102). On a first electrode scan line (148) a switching element (112) responds to a scan signal, connecting a first terminal (106) to a second terminal (108). A front plane (120) has sensing elements (122) indicating a measure of a received stimulus and including a charge collection electrode (130). An insulating layer (140) disposed between the backplane (110) and the front plane (120) contains at least a first via (136) connecting the first terminal (108) of the switching element (112) in the backplane (110) to a charge collection electrode (130) of the sensing element (122) in the front plane (120). A second via (126) connects between the second terminal (108) of the switching element (112) and the data line (124).

Abstract: An optically coupled resonator includes a resonator body having at least one resonator sidewall and a laterally offset photodiode formed in a semiconductor substrate adjacent to the resonator body. The resonator is driven by an electric field generated between the laterally offset photodiode and the resonator body when an incident light strikes the photodiode. A device including an optically coupled resonator and a method of operating an optically coupled resonator are also disclosed.

Abstract: A gate wire including a gate line and a gate electrode is formed on a substrate and a gate insulating layer is formed on the substrate. A semiconductor pattern and an etching assistant pattern are formed on the gate insulating layer and a source/drain conductor pattern and an etching assistant layer are formed on the semiconductor pattern and the etching assistant pattern. A data wire including a data line and source and drain electrodes separated from each other is formed by removing the etching assistant layer and partly removing the source/drain conductor pattern. A pixel electrode connected to the drain electrodes is formed.

Abstract: An image sensor according to embodiments may include a first substrate having photodiode cells, a second substrate having a logic circuit, and connection electrodes that may electrically connect the photodiode cells with the logic circuit. In embodiments, more area may be available on the first substrate for photodiode cells and light loss may be reduced.

Abstract: In an image sensor in which a vertical length from a photoelectric conversion element to an uppermost micro-lens is minimal, and a method of manufacturing the same, the image sensor includes a substrate, a plurality of photoelectric conversion elements, and first to n-level (where n is an integer greater than or equal to 2) metal wires. In the substrate, a sensor region and a peripheral circuit region are defined. The plurality of photoelectric conversion elements are formed in or on the substrate within the sensor region. The first to n-level metal wires are sequentially formed on the substrate. The n-level metal wires within the sensor region are of a thickness that is less than the n-level metal wires within the peripheral circuit region.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: To improve a sensor resetting method and thereby implement a high rate at which a moving image is read, the invention provides an image pickup apparatus and a radiation image pickup apparatus including: a plurality of pixels arranged on a substrate in row and column directions, each pixel having a conversion element and a transfer switching element; a drive wiring connected to a plurality of the transfer switching elements in the row direction; and a conversion element wiring connected to a plurality of the conversion elements in the row direction, wherein a reset switching element is disposed between the conversion element wiring and a reset wiring for supplying a reset voltage for resetting the conversion element, and a bias switching element is disposed between the conversion element wiring and a bias wiring for supplying a bias voltage for operating the conversion element.

Abstract: Disclosed herein is a solid-state imaging device including: a semiconductor substrate; a sensor of impurity diffusion layer formed on the surface layer of said semiconductor substrate; a negative charge accumulation layer formed on said sensor from an insulating material containing a first metallic substance; and an interfacial layer formed between said sensor and said negative charge accumulation layer from an insulating material containing a second metallic substance having greater electronegativity than said first metallic substance.

Abstract: A MOS or CMOS based active pixel sensor designed for operation with zero or close to zero potential across the pixel photodiodes to minimize or eliminate dark current. In this preferred embodiment, the voltage potential across the pixel photodiode structures is maintained constant and close to zero, preferably less than 1.0 volts. This preferred embodiment enables the photodiode to be operated at a constant bias condition during the charge detection cycle. In preferred embodiments the pixel photodiodes are produced with a continuous pin or nip photodiode layer laid down over pixel electrodes of the sensor. In other preferred embodiments the pixel photodiode structures are produced beside and physically isolated from the regions where CMOS circuits are formed. In some of these preferred embodiments the isolated pixel photodiode structures are comprised of crystalline germanium deposited in cavities in a silicon substrate. This embodiment can be adapted especially for imaging at short wave infrared frequencies.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.

Abstract: An optical wireless local area network using line of sight optical links. The base station and terminal stations are provided with optical transceivers which include a transmitter array and detector array. The transmitter array consists of an array of resonant cavity light emitting diodes integrated using flip-chip technology with a CMOS driver circuit. The driver circuit includes constant bias, current peaking and charge extraction. The driver circuitry is compact and can be confined within a region underlying the corresponding light source. The detector array consists of an array of photo diodes, provided with sense circuitry consisting of a pre-amplifier and post-amplifier. The diodes and sense circuitry are also integrated using a flip-chip technique. The light emitter and the detector may include adaptive optical elements to steer and/or focus the light beams.

Abstract: To improve a sensor resetting method and thereby implement a high rate at which a moving image is read, the invention provides an image pickup apparatus and a radiation image pickup apparatus including: a plurality of pixels arranged on a substrate in row and column directions, each pixel having a conversion element and a transfer switching element; a drive wiring connected to a plurality of the transfer switching elements in the row direction; and a conversion element wiring connected to a plurality of the conversion elements in the row direction, wherein a reset switching element is disposed between the conversion element wiring and a reset wiring for supplying a reset voltage for resetting the conversion element, and a bias switching element is disposed between the conversion element wiring and a bias wiring for supplying a bias voltage for operating the conversion element.

Abstract: It is provided a contacting method when a plurality of films to be peeled are laminating. Reduction of total layout area, miniaturization of a module, weight reduction, thinning, narrowing a frame of a display device, or the like can be realized by sequentially laminating a plurality of films to be peeled which are once separately formed over a plastic film or the like. Moreover, reliable contact having high degree of freedom is realized by forming each layer having a connection face of a conductive material and by patterning with the use of a photomask having the same pattern.

Abstract: A photosensor includes a plurality of photosensitive regions including a first photosensitive region connected to a first voltage reference, and at least one additional photosensitive region. A signal collector is connected to the first photosensitive region. At least one switching device is for switching the at least one additional photosensitive region between the first voltage reference and a second voltage reference that is less than the first voltage reference, and for reversibly connecting the at least one additional photosensitive region to the signal collector so that the photosensor is variably responsive to different light levels.

Abstract: In a radiation image pickup device including: a sensor element for converting radiation into an electrical signal; and a thin film transistor connected to the sensor element, an electrode of the sensor element connected to the thin film transistor is disposed above the thin film transistor, and that the thin film transistor has a top gate type structure in which a semiconductor layer, a gate insulating layer, and a gate electrode layer are laminated in this order on a substrate, so that a channel portion of the thin film transistor is protected by a gate electrode, thereby providing stable TFT characteristics without undesirable turning ON any of the TFT elements due to the back gate effect by the fluctuation in electric potentials corresponding to outputs from the sensor electrodes, and thereby greatly improving image quality.

Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based electronic device including an element including at least a portion of the monocrystalline silicon layer.

Abstract: A primary object of the present invention is to provide a photoelectric conversion apparatus with less leak current in a floating diffusion region. In order to obtain the above object, a photoelectric conversion apparatus according to the present invention includes a photodiode for converting light into a signal charge, a first semiconductor region having a first conductivity type, a floating diffusion region formed from a second semiconductor region having a second conductivity type for converting the signal charge generated by the photodiode into a signal voltage, the second semiconductor region being formed in the first semiconductor region, and an electrode formed above the first semiconductor region through an insulating film and having an effect of increasing a concentration of majority carriers in the first semiconductor region, in which the electrode is not formed above a depletion region formed from the second semiconductor region.

Abstract: A MOS or CMOS based active pixel sensor designed for operation with zero or close to zero potential across the pixel photodiodes to minimize or eliminate dark current. In preferred embodiments the pixel photodiodes are produced with a continuous pin or nip photodiode layer laid down over pixel electrodes of the sensor. In this preferred embodiment, the voltage potential across the pixel photodiode structures is maintained constant and close to zero, preferably less than 1.0 volts. This preferred embodiment enables the photodiode to be operated at a constant bias condition during the charge detection cycle. Setting this constant bias condition close to zero (near “short circuit” condition) assures that dark current is substantially zero.

Abstract: The invention provides an LCD panel with main slits corresponding to alignment protrusions. The gate lines are shielded by the electrode portion and do not overlap the main slits. Because the gate line and the major slits do not overlap, the liquid crystal molecule arrangement of the liquid crystal layer is not affected by the operating voltage of the gate line.

Abstract: A method of fabricating light-sensing devices including photodiodes monolithically integrated with CMOS devices. Several types of photodiode devices (PIN, HIP) are expitaxially grown in one single step on active areas implanted in a common semiconductor substrate, the active areas having defined polarities. The expitaxially grown layers for the photodiode devices may be either undoped or in-situ doped with profiles suitable for their respective operation. With appropriate choice of substrate materials, device layers and heterojunction engineering and process architecture, it is possible to fabricate silicon-based and germanium-based multi-spectral sensors that can deliver pixel density and cost of fabrication comparable to the state of the art CCDs and CMOS image sensors. The method can be implemented with epitaxially deposited films on the following substrates: Silicon Bulk, Thick-Film and Thin-Film Silicon-On-Insulator (SOI), Germanium Bulk, Thick-Film and Thin-Film Geranium-On-Insulator (GeOI).

Abstract: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity of the lower electrode.