Geometric Configuration Of Junction (e.g., Fingers) Patents (Class 257/465)
  • Patent number: 11183610
    Abstract: The present disclosure discloses a photoelectric detector, a preparation method thereof, a display panel and a display device. The photoelectric detector includes a base, and a thin film transistor (TFT) and a photosensitive PIN device on the base, wherein the PIN device includes an I-type region that does not overlap with an orthographic projection of the TFT on the base; a first etching barrier layer covering a top surface of the I-type region; a first heavily doped region in contact with a side surface on a side, proximate to the TFT, of the I-type region; and a second heavily doped region in contact with a side surface on a side, away from the TFT, of the I-type region, the doping types of the first heavily doped region and the second heavily doped region being different from each other.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: November 23, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chao Li, Jianhua Du, Feng Guan, Yupeng Gao, Zhaohui Qiang, Zhi Wang, Yang Lyu, Chao Luo
  • Patent number: 10325886
    Abstract: A light emitting element includes a semiconductor including an active layer, and a planar shape of the light emitting elements including a concave polygon. The planar shape of the concave polygon has interior angles including at least one acute angle.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: June 18, 2019
    Assignee: NICHIA CORPORATION
    Inventor: Yukitoshi Marutani
  • Patent number: 10254213
    Abstract: A particle analysis apparatus for flow cytometry, which contains a flow cell having a flow channel for flowing a sample solution containing particles to be analyzed, a light source device for emitting an irradiation light, an optical system for irradiating the irradiation light on an irradiation segment in the flow channel, and a light receiving device for detecting the light obtained thereby. A light source of the light source device is LED, and an electrode formed on a light extraction surface thereof mainly contains a plurality of electric conductor lines arranged in parallel to each other.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: April 9, 2019
    Assignee: HORIBA, LTD.
    Inventors: Motoaki Hamada, Tatsuo Igushi
  • Patent number: 9257463
    Abstract: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsien Tseng, Shou-Gwo Wuu, Chia-Chan Chen, Kuo-Yu Wu, Dao-Hong Yang, Ming-Hao Chung
  • Patent number: 9184204
    Abstract: A multi-spectrum photosensitive device comprises two, three, or four composite sensing pixels arranged in layers up and down in a base layer of P-type or N-type silicon by means of single-sided processing or double-sided processing, each composite sensing pixels can sense respectively spectrum orthogonal or complementary to each other in visible light or visible and infrared light. The basic sensing pixels on different layers of the composite sensing pixels can be designed to sense different colors or spectrums, so that a multi-spectrum photosensitive chip can be achieved by repeatedly arranging the macro units consisting of more than one composite sensing pixel. The present disclosure also includes a new multi-layer sensing pixel, and examples of which used in a single-sided double-layer, or a double-sided double-layer, or a double-sided three-layer, or a double-sided four-layer, or a single-sided mixed double-layer, or a double-sided mixed with double-layer or a multi-layer multi-spectrum sensing device.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: November 10, 2015
    Assignee: BOLY MEDIA COMMUNICATIONS (SHENZHEN) CO., LTD.
    Inventor: Xiaoping Hu
  • Patent number: 9025139
    Abstract: A first photoelectric conversion element, which detects light and converts the light into photoelectrons has: one first MOS diode having a first electrode formed on a semiconductor base body with an insulator therebetween; and a plurality of second MOS diodes, each of which has a second electrode formed on the semiconductor base body with the insulator therebetween. The first electrode of the first MOS diode has, when viewed from the upper surface, a comb-like shape wherein a plurality of branch portions are branched from one electrode portion. Each second electrode of each of the second MOS diodes is, when viewed from the upper surface, separated from the first electrode, and is disposed to nest between the branch portions of the first electrode.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: May 5, 2015
    Assignee: Honda Motor Co., Ltd.
    Inventors: Tomoyuki Kamiyama, Keisuke Korekado
  • Publication number: 20150103349
    Abstract: A photodetector includes a semiconductor substrate having an irradiation zone configured to generate charge carriers having opposite charge carrier types in response to an irradiation of the semiconductor substrate. The photodetector further includes an inversion zone generator configured to operate in at least two operating states to generate different inversion zones within the substrate, wherein a first inversion zone generated in a first operating state differs from a second inversion zone generated in a second operating state, and wherein the first inversion zone and the second inversion zone have different extensions in the semiconductor substrate. A corresponding method for manufacturing a photodetector and a method for determining a spectral characteristic of an irradiation are also described.
    Type: Application
    Filed: December 18, 2014
    Publication date: April 16, 2015
    Inventor: Thoralf Kautzsch
  • Patent number: 8975717
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: March 10, 2015
    Assignee: SunPower Corporation
    Inventor: David D. Smith
  • Patent number: 8969470
    Abstract: A quantum dot-polymer nanocomposite for optical chemical and biological sensing is formed by stably incorporating functionalized quantum dots into a pH sensitive hydrogel polymer network. At least one monomer of the pH sensitive hydrogel has functional groups selectively chosen to correspond to functionalized groups on the quantum dots to enable conjugation between the hydrogel polymer network and the functionalized quantum dots. The resulting quantum dot-polymer nanocomposite is placed in a solution having a known pH and addition of a chemical composition or biological agent of interest generates a change in pH of that solution. The nanocomposite expands or contracts responsive to the pH change. The pH change is optically detected by measuring the intensity level of fluorescence from the quantum dots when the nanocomposite is subjected to an excitation light source.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: March 3, 2015
    Assignee: The Mitre Corporation
    Inventor: Sichu Li
  • Publication number: 20150037048
    Abstract: A low voltage photodetector structure including a semiconductor device layer, which may be Ge, is disposed over a substrate semiconductor, which may be Si, for example within a portion of a waveguide extending laterally within a photonic integrated circuit (PIC) chip. In exemplary embodiments where the device layer is formed over an insulator layer, the insulator layer is removed to expose a surface of the semiconductor device layer and a passivation material formed as a replacement for the insulator layer within high field regions. In further embodiments, controlled avalanche gain is achieved by spacing electrodes in a metal-semiconductor-metal (MSM) architecture, or complementary doped regions in a p-i-n architecture, to provide a field strength sufficient for impact ionization over a distance not significantly more than an order of magnitude greater than the distance that a carrier must travel so as to acquire sufficient energy for impact ionization.
    Type: Application
    Filed: August 2, 2013
    Publication date: February 5, 2015
    Inventors: Yun-Chung Na, Han-Din Liu, Yimin Kang, Shu-Lu Chen
  • Patent number: 8928107
    Abstract: Provided are light detection devices and methods of manufacturing the same. The light detection device includes a first conductive pattern on a surface of a substrate, an insulating pattern on the substrate and having an opening exposing at least a portion of the first conductive pattern, a light absorbing layer filling the opening of the insulating pattern and having a top surface disposed at a level substantially higher than a top surface of the insulating pattern, a second conductive pattern on the light absorbing layer, and connecting terminals electrically connected to the first and second conductive patterns, respectively.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: January 6, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon Kim, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
  • Patent number: 8921900
    Abstract: A solid-state imaging device includes a photoelectric conversion unit that has a charge accumulation region and is configured to accumulate a charge that is generated in accordance with incident light in the charge accumulation region, and a transfer unit configured to transfer the charge accumulated in the charge accumulation region from the charge accumulation region. A potential distribution having a plurality of steps is formed in the charge accumulation region, and the further away from the transfer unit a step of the plurality of steps is, the greater the magnitude of the step is.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: December 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Satoko Iida, Ginjiro Toyoguchi, Shin Kikuchi
  • Patent number: 8890219
    Abstract: An image sensor device is provided, including at least one transistor lying on a semiconductor-on-insulator substrate that includes a semi-conducting layer, in which a channel area of the transistor is disposed in a portion thereof, and an insulating layer separating the semi-conducting layer from a semi-conducting support layer, wherein the semi-conducting layer and the insulating layer extend beyond the channel area, and extend under at least a portion of source/drain regions of the transistor, wherein the semi-conducting support layer includes at least one photosensitive area including at least one P-doped region and at least one N-doped region forming a junction, the photosensitive area being disposed facing the transistor on a side of the channel area thereof and opposite a side of a gate electrode thereof, and wherein the insulating layer is configured to provide a capacitive coupling between the photosensitive area and the semi-conducting layer.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: November 18, 2014
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Laurent Grenouillet, Maud Vinet
  • Patent number: 8860164
    Abstract: A light receiving element includes a core configured to propagate a signal light, a first semiconductor layer having a first conductivity type, the first semiconductor layer being configured to receive the signal light from the core along a first direction in which the core extends, an absorbing layer configured to absorb the signal light received by the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: October 14, 2014
    Assignee: Fujitsu Limited
    Inventor: Kazumasa Takabayashi
  • Publication number: 20140264711
    Abstract: Light sensors are described that include a trench structure integrated therein. In an implementation, the light sensor includes a substrate having a dopant material of a first conductivity type and multiple trenches disposed therein. The light sensor also includes a diffusion region formed proximate to the multiple trenches. The diffusion region includes a dopant material of a second conductivity type. A depletion region is created at the interface of the dopant material of the first conductivity type and the dopant material of the second conductivity type. The depletion region is configured to attract charge carriers to the depletion region, at least substantially a majority of the charge carriers generated due to light incident upon the substrate.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 18, 2014
    Applicant: Maxim Integrated Products, Inc.
    Inventors: Nicole D. Kerness, Christopher F. Edwards, Khanh Tran, Joy T. Jones, Pirooz Parvarandeh
  • Publication number: 20140232917
    Abstract: A pixel 10 includes a photodiode PD which is provided between a first barrier region 21 forming a first potential barrier B1 and a second barrier region 27 forming a second potential barrier B2, a first floating diffusion region F1 which is provided adjacent to the first barrier region 21, and to which a first electric charge generated in the photodiode PD is transferred, and a second floating diffusion region F2 which is provided adjacent to the second barrier region 27, and into which a second electric charge generated in the photoelectric conversion region PD flows, and in which a part of the flowing-in second electric charge is accumulated. The second potential barrier B2 is lower than the first potential barrier B1.
    Type: Application
    Filed: July 25, 2012
    Publication date: August 21, 2014
    Inventors: Shoji Kawahito, Isamu Takai
  • Patent number: 8772894
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: July 8, 2014
    Assignee: SunPower Corporation
    Inventor: David D. Smith
  • Patent number: 8766393
    Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods: (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions; (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor; (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: July 1, 2014
    Assignee: Infrared Newco, Inc.
    Inventors: Conor S. Rafferty, Clifford A. King
  • Patent number: 8698263
    Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: April 15, 2014
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Zhenqiang Ma, Max G. Lagally, Hao-Chih Yuan
  • Publication number: 20140077325
    Abstract: A photodiodes may be formed on a substrate such as an imager substrate. The photodiode may include first and second layers in the substrate that form a p-n junction. The first layer may have a first doping type such as p-type doping, whereas the second layer may have a second, opposite doping type such as n-type doping. A counter-doping implant region may be provided that only partially overlaps with the second layer of the photodiode. The counter-doping implant region may have an opposite doping type to the second layer and may have a dopant concentration that is less than the dopant concentration of the second layer. The counter-doping implant region may extend into a third layer of the substrate that may have the same doping type of the second layer but at a lower concentration than the counter-doping implant region.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 20, 2014
    Applicant: Aptina Imaging Corporation
    Inventors: Xianmin Yi, Paul Perez
  • Patent number: 8674401
    Abstract: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer and/or p+ deep diffused layer. Consequently, the present invention delivers high device performances, such as low crosstalk, low radiation damage, high speed, low leakage dark current, and high speed, using a thin active layer.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: March 18, 2014
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8633513
    Abstract: Structures and method for reducing junction leakage in semiconductor devices. The die can include a substrate having a cut edge, a first region of first conductivity type within the substrate and a region of a second conductivity type within the substrate and in contact with the first region forming a junction. At least one semiconductor device is on the substrate. A second region of the first conductivity type is between the plurality of semiconductor devices and the cut edge within the region of the second conductivity type, and extending to the junction. The second region of the first conductivity type can isolate the at least one semiconductor device from leakage pathways created by saw damage at the junction along the cut edge.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: January 21, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Daniel Doyle, Jeffrey Gleason
  • Patent number: 8592934
    Abstract: On the front side of an n-type semiconductor substrate 5, p-type regions 7 are two-dimensionally arranged in an array. A high-concentration n-type region 9 and a p-type region 11 are disposed between the p-type regions 7 adjacent each other. The high-concentration n-type region 9 is formed by diffusing an n-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 as seen from the front side. The p-type region 11 is formed by diffusing a p-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 and high-concentration n-type region 9 as seen from the front side. Formed on the front side of the n-type semiconductor substrate 5 are an electrode 15 electrically connected to the p-type region 7 and an electrode 19 electrically connected to the high-concentration n-type region 9 and the p-type region 11.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: November 26, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Tatsumi Yamanaka
  • Publication number: 20130284269
    Abstract: Improved silicon solar cells, silicon image sensors and like photosensitive devices are made to include strained silicon at or sufficiently near the junctions or other active regions of the devices to provide increased sensitivity to longer wavelength light. Strained silicon has a lower band gap than conventional silicon. One method of making a solar cell that contains tensile strained silicon etches a set of parallel trenches into a silicon wafer and induces tensile strain in the silicon fins between the trenches. The method may induce tensile strain in the silicon fins by filling the trenches with compressively strained silicon nitride or silicon oxide. A deposited layer of compressively strained silicon nitride adheres to the walls of the trenches and generates biaxial tensile strain in the plane of adjacent silicon fins.
    Type: Application
    Filed: April 25, 2013
    Publication date: October 31, 2013
    Inventor: Paul A. Clifton
  • Patent number: 8536587
    Abstract: A method, structure, system of aligning a substrate to a photomask. The method includes: directing incident light through a pattern of clear regions transparent to the incident light in an opaque-to-the-incident-light region of a photomask, through a lens and onto a photodiode formed in a substrate, the photodiodes electrically connected to a light emitting diode formed in the substrate, the light emitting diode emitting light of different wavelength than a wavelength of the incident lights; measuring an intensity of emitted light from light emitting diode; and adjusting alignment of the photomask to the substrate based on the measured intensity of emitted light.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: September 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Axel Aguado Granados, Benjamin Aaron Fox, Nathaniel James Gibbs, Andrew Benson Maki, John Edward Sheets, II, Trevor Joseph Timpane
  • Patent number: 8476730
    Abstract: An embodiment of a Geiger-mode avalanche photodiode, having: a body made of semiconductor material of a first type of conductivity, provided with a first surface and a second surface and forming a cathode region; and an anode region of a second type of conductivity, extending inside the body on top of the cathode region and facing the first surface. The photodiode moreover has: a buried region of the second type of conductivity, extending inside the body and surrounding an internal region of the body, which extends underneath the anode region and includes the internal region and defines a vertical quenching resistor; a sinker region extending through the body starting from the first surface and in direct contact with the buried region; and a contact region made of conductive material, overlying the first surface and in direct contact with the sinker region.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: July 2, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Delfo Nunziato Sanfilippo, Massimo Cataldo Mazzillo, Piero Giorgio Fallica
  • Patent number: 8426722
    Abstract: Photovoltaic structures for the conversion of solar irradiance into electrical free energy. In a particular implementation, a photovoltaic cell includes a granular semiconductor and oxide layer with nanometer-size absorber semiconductor grains surrounded by a matrix of oxide. The semiconductor and oxide layer is disposed between electron and hole conducting layers. In some implementations, multiple semiconductor and oxide layers can be deposited.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: April 23, 2013
    Assignee: Zetta Research and Development LLC—AQT Series
    Inventors: Mariana R. Munteanu, Erol Girt
  • Patent number: 8409912
    Abstract: In one embodiment, active diffusion junctions of a solar cell are formed by diffusing dopants from dopant sources selectively deposited on the back side of a wafer. The dopant sources may be selectively deposited using a printing method, for example. Multiple dopant sources may be employed to form active diffusion regions of varying doping levels. For example, three or four active diffusion regions may be fabricated to optimize the silicon/dielectric, silicon/metal, or both interfaces of a solar cell. The front side of the wafer may be textured prior to forming the dopant sources using a texturing process that minimizes removal of wafer material. Openings to allow metal gridlines to be connected to the active diffusion junctions may be formed using a self-aligned contact opening etch process to minimize the effects of misalignments.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: April 2, 2013
    Assignee: SunPower Corporation
    Inventors: Denis de Ceuster, Peter John Cousins, Richard M. Swanson, Jane E. Manning
  • Patent number: 8373060
    Abstract: Photovoltaic structures for the conversion of solar irradiance into electrical free energy. In particular implementations, the novel photovoltaic structures can be fabricated using low cost and scalable processes, such as magnetron sputtering. In a particular implementation, a photovoltaic cell includes a photoactive conversion layer comprising one or more granular semiconductor and oxide layers with nanometer-size semiconductor grains surrounded by a matrix of oxide. The semiconductor and oxide layer can be a disposed between electrode layers. In some implementations, multiple semiconductor and oxide layers can be deposited. These so-called semiconductor and oxide layers absorb sun light and convert solar irradiance into electrical free energy.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: February 12, 2013
    Assignee: Zetta Research and Development LLC—AQT Series
    Inventors: Mariana R. Munteanu, Erol Girt
  • Patent number: 8361869
    Abstract: The present application discloses a method for manufacturing a gate-all-around field effect transistor, comprising the steps of: forming a suspended fin in a semiconductor substrate; forming a gate stack around the fin; and forming source/drain regions in the fin on both sides of the gate stack, wherein an isolation dielectric layer is formed in a portion of the semiconductor substrate which is adjacent to bottom of both the fin and the gate stack. The present invention relates to a method for manufacturing a gate-all-around device on a bulk silicon substrate, which suppress a self-heating effect and a floating-body effect of the SOI substrate, and lower a manufacture cost. The inventive method is a conventional top-down process with respect to a reference plane, which can be implemented as a simple manufacture process, and is easy to be integrated into and compatible with a planar CMOS process. The inventive method suppresses a short channel effect and promotes miniaturization of MOSFETs.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: January 29, 2013
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Huajie Zhou, Yi Song, Qiuxia Xu
  • Patent number: 8320037
    Abstract: An electro-optic device is provided. The electro-optic device includes a junction layer disposed between a first conductivity type semiconductor layer and a second conductivity type semiconductor layer to which a reverse vias voltage is applied. The first conductivity type semiconductor layer and the second conductivity type semiconductor layer have an about 2 to 4-time doping concentration difference therebetween, thus making it possible to provide the electro-optic device optimized for high speed, low power consumption and high integration.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: November 27, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jeong Woo Park, Jongbum You, Gyungock Kim
  • Patent number: 8264013
    Abstract: A device separation insulating film and a device separation semiconductor layer are provided for a device separation section for separating adjacent devices from each other, end portions of the device separation insulating film and end portions of the device separation semiconductor layer are provided to overlap each other in order to surround two sides of an outer-periphery of the voltage conversion section and also to surround a channel section of the charge transfer device and the light receiving devices and an end portion of the device separation insulating film facing an end face of the light receiving device is arranged inwardly below a control electrode with respect to an end face of the control electrode on the light receiving device side.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 11, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomohiko Kawamura
  • Patent number: 8258595
    Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a substrate, a bonding silicon, an interlayer dielectric, a first contact plug, a second contact plug, a second metal interconnection, and a color filter layer and a microlens. The substrate comprises a first metal interconnection. The bonding silicon is formed on the substrate, and comprises a plurality of impurity regions. The interlayer dielectric is formed on the bonding silicon. The first contact plug penetrates the bonding silicon and is electrically connected to the first metal interconnection. The second contact plug penetrates the interlayer dielectric and is connected to a surface of the bonding silicon. The second metal interconnection is formed on the interlayer dielectric, and is connected to the second contact plug. The color filter layer and a microlens are formed over the second metal interconnection.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: September 4, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Seoung Hyun Kim
  • Patent number: 8259207
    Abstract: A CCD image sensor includes a photo-diode region segmented by an element separation region; and a CCD register connected with the photo-diode region through a transfer gate. The photo-diode region includes a plurality of tapered portions, and each of the plurality of tapered portions is formed to become wider in a direction of the transfer gate.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: September 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Noboru Takatsuka, Akira Uemura
  • Patent number: 8207010
    Abstract: It is an object to form a high-quality crystalline semiconductor layer directly over a large-sized substrate with high productivity without reducing the deposition rate and to provide a photoelectric conversion device in which the crystalline semiconductor layer is used as a photoelectric conversion layer. A photoelectric conversion layer formed of a semi-amorphous semiconductor is formed over a substrate as follows: a reaction gas is introduced into a treatment chamber where the substrate is placed; and a microwave is introduced into the treatment chamber through a slit provided for a waveguide that is disposed in approximately parallel to and opposed to the substrate, thereby generating plasma. By forming a photoelectric conversion layer using such a semi-amorphous semiconductor, a rate of deterioration in characteristics by light deterioration is decreased from one-fifth to one-tenth, and thus a photoelectric conversion device that has almost no problems for practical use can be obtained.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: June 26, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 8158880
    Abstract: Photovoltaic structures for the conversion of solar irradiance into electrical free energy. In a particular implementation, a photovoltaic cell includes a granular semiconductor and oxide layer with nanometer-size absorber semiconductor grains surrounded by a matrix of oxide. The semiconductor and oxide layer may be disposed between electron and hole conducting layers. In some implementations, multiple semiconductor and oxide layers can be deposited.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: April 17, 2012
    Assignee: AQT Solar, Inc.
    Inventors: Erol Girt, Mariana Rodica Munteanu
  • Patent number: 8143687
    Abstract: A broadband radiation detector includes a first layer having a first type of electrical conductivity type. A second layer has a second type of electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region. A third layer has the second type of electrical conductivity type and an energy bandgap responsive to radiation in a second spectral region comprising longer wavelengths than the wavelengths of the first spectral region. The broadband radiation detector further includes a plurality of internal regions. Each internal region may be disposed at least partially within the third layer and each internal region may include a refractive index that is different from a refractive index of the third layer. The plurality of internal regions may be arranged according to a regularly repeating pattern.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: March 27, 2012
    Assignee: Raytheon Company
    Inventors: Justin G. A. Wehner, Scott M. Johnson
  • Patent number: 8134217
    Abstract: Bypass diodes for solar cells are described. In one embodiment, a bypass diode for a solar cell includes a substrate of the solar cell. A first conductive region is disposed above the substrate, the first conductive region of a first conductivity type. A second conductive region is disposed on the first conductive region, the second conductive region of a second conductivity type opposite the first conductivity type.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: March 13, 2012
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, Taeseok Kim, David D. Smith, Peter J. Cousins
  • Patent number: 8120079
    Abstract: A method of fabricating multi-spectral photo-sensors including photo-diodes incorporating stacked epitaxial superlattices monolithically integrated with CMOS devices on a common semiconductor substrate.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: February 21, 2012
    Assignee: Quantum Semiconductor LLC
    Inventor: Carlos J. R. P. Augusto
  • Patent number: 8115232
    Abstract: The present invention provides of a three-dimensional bicontinuous heterostructure, a method of producing same, and the application of this structure towards the realization of photodetecting and photovoltaic devices working in the visible and the near-infrared. The three-dimensional bicontinuous heterostructure includes two interpenetrating layers which are spatially continuous, they are include only protrusions or peninsulas, and no islands. The method of producing the three-dimensional bicontinuous heterostructure relies on forming an essentially planar continuous bottom layer of a first material; forming a layer of this first material on top of the bottom layer which is textured to produce protrusions for subsequent interpenetration with a second material, coating this second material onto this structure; and forming a final coating with the second material that ensures that only the second material is contacted by subsequent layer.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: February 14, 2012
    Assignee: InVisage Technologies, Inc.
    Inventors: Edward Sargent, Steve McDonald, Shiguo Zhang, Larissa Levina, Gerasimos Konstantatos, Paul Cyr
  • Patent number: 8102017
    Abstract: An image sensor may comprise circuitry, a first lower electrode, a photodiode, an upper electrode, a second lower electrode, and an upper interconnection. The circuitry may comprise a first lower interconnection and a second lower interconnection over a dielectric of a substrate. The first lower electrode, the photodiode, and the upper electrode may be sequentially formed over the first lower interconnection. The second lower electrode may comprise a passivation layer over the second lower interconnection. The upper interconnection may be formed over the second lower electrode and electrically connected to the upper electrode.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: January 24, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki Jun Yun
  • Patent number: 8053853
    Abstract: An image sensor device includes a semiconductor substrate having a light-sensing region, and a first and second electrode embedded within the substrate. The first and second electrode forms an array of slits, the array of slits is configured to allow a wavelength of light to pass through to the light-sensing region. A method for making an image sensor device includes providing a semiconductor substrate, forming a plurality of pixels on the semiconductor substrate, and forming a plurality of slits embedded within each of the plurality of pixels. The plurality of slits is configured to allow a wavelength of light to pass through to each of the plurality of pixels.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: November 8, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiunn-Yih Chyan, Gwo-Yuh Shiau, Chia-Shiung Tsai
  • Patent number: 8044483
    Abstract: A photo detector having an electrically conductive thin film and a light-receiving unit. A coupling periodic structure is provided on a surface of the film and converts incidence light to surface plasmon. The coupling periodic structure has an opening that penetrates the obverse and reverse surfaces of the thin film. The light-receiving unit is provided at one end of the opening in the surface that is opposite to the surface on which the coupling periodic structure is provided. The opening is shaped like a slit and is broader than half (½) the wavelength of the surface plasmon in a direction that intersects at right angles with a polarization direction of the incidence light and is narrower than half (½) the wavelength of the surface plasmon in a direction parallel to the polarization direction.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: October 25, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Furuyama
  • Patent number: 8035186
    Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods. (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field. Electrical contacts are made to all doped regions, and bias is applied so that a reverse bias is maintained across all junctions.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: October 11, 2011
    Assignee: Infrared Newco, Inc.
    Inventors: Conor S. Rafferty, Clifford A. King
  • Patent number: 8035171
    Abstract: A pixel of a complementary metal oxide semiconductor (CMOS) image sensor includes a plurality of photodiodes for sensing light to thereby generate photoelectric charges in different regions; a plurality of transfer transistors for transferring photoelectric charges of corresponding photodiodes in response to a first control signal; a floating diffusion region for receiving photoelectric charges transferred by the plurality of transfer transistors; a rest transistor connected between a power supply voltage and the floating diffusion region for resetting the floating diffusion region by controlling a voltage loaded on the floating diffusion region in response to a second control signal; a drive transistor connected between the power supply voltage and the floating diffusion region to serve as a source follower buffer amplifier; and a select transistor connected between the drive transistor and a pixel output terminal for performing an addressing operation in response to a third control signal.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 11, 2011
    Assignee: Intellectual Ventures II LLC
    Inventor: Nan-Yi Lee
  • Patent number: 8017859
    Abstract: Photovoltaic coatings and methods of making photovoltaic coatings are provided. The photovoltaic coating contains a semiconductor layer containing semiconductor elements such as silicon particles between bottom metal-semiconductor compounds and upper metal-semiconductor compounds. The upper metal-semiconductor compounds can exist at uppermost boundary portions between semiconductor elements and not substantially over uppermost surfaces of the semiconductor elements. The method can involve forming a semiconductor layer comprising semiconductor elements such as silicon particles over a conductive layer; forming first metal-semiconductor compounds at a bottom surface of the semiconductor layer; and forming second metal-semiconductor compounds at uppermost boundary portions between the semiconductor elements.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: September 13, 2011
    Assignee: Spansion LLC
    Inventor: Jerzy Gazda
  • Patent number: 8003883
    Abstract: A photovoltaic device that includes a substrate and a nanowall structure disposed on the substrate surface. The device also includes at least one layer conformally deposited over the nanowall structure. The conformal layer(s) is at least a portion of a photoactive junction. A method for making a photovoltaic device includes generating a nanowall structure on a substrate surface and conformally depositing at least one layer over the nanowall structure thereby forming at least one photoactive junction. A solar panel includes at least one photovoltaic device based on a nanowall structure. The solar panel isolates such devices from its surrounding atmospheric environment and permits the generation of electrical power. Optoelectronic device may also incorporate a photovoltaic device based on a nanowall structure.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: August 23, 2011
    Assignee: General Electric Company
    Inventors: Bastiaan Arie Korevaar, Loucas Tsakalakos, Joleyn Balch
  • Patent number: 7999259
    Abstract: A display includes: a substrate having a pixel region and a sensor region in which photo-sensor parts are formed; an illuminating section operative to illuminate the substrate from one surface side of the substrate; a thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and operative to receive light incident from the other surface side of the substrate; and a metallic film formed on the one surface side of the substrate so as to face the thin film photodiode through an insulator film, operative to restrain light generated from the illuminating section from being directly incident on the thin film photodiode from the one surface side, and fixed to a predetermined potential, wherein in the thin film photodiode, the width of the P-type semiconductor region and the width of the N-type semiconductor region are different from each other.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: August 16, 2011
    Assignee: Sony Corporation
    Inventors: Masanobu Ikeda, Ryoichi Ito, Daisuke Takama, Kenta Seki, Natsuki Otani
  • Patent number: 7977568
    Abstract: A photovoltaic device includes a substrate having at least two surfaces and a multilayered film disposed on at least a portion of at least one surface of the substrate. Elongated nanostructures are disposed on the multilayered film. The device incorporates a top layer of the multilayered film contacting the elongated nanostructures that is a tunnel junction. The device has at least one layer deposited over the elongated nanostructures defining a portion of a photoactive junction. A solar panel includes at least one photovoltaic device. The solar panel isolates each such devices from its surrounding atmospheric environment and permits the generation of electrical power.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: July 12, 2011
    Assignee: General Electric Company
    Inventors: Bastiaan Arie Korevaar, Loucas Tsakalakos
  • Patent number: 7910394
    Abstract: A method for forming a photodiode cathode in an integrated circuit imager includes defining and implanting a photodiode cathode region with a photodiode cathode implant dose of a dopant species and defining and implanting an edge region of the photodiode cathode region with a photodiode cathode edge implant dose of a dopant species to form a region of higher impurity concentration than the photodiode cathode impurity concentration.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: March 22, 2011
    Assignee: Foveon, Inc.
    Inventor: Maxim Ershov