Abstract: There is a problem that an area of a principal current cell is reduced by an area of a bonding pad wiring layer for a sub-cell. A source electrode 9b of a current detection cell 22 is electrically connected to a bonding pad wiring layer 12 formed on an interlayer insulating film 10 via a wiring layer contact 11. The bonding pad wiring layer 12 is formed with respect to a source electrode 9a of a principal current cell 21 so as to cover a part of the source electrode 9a via the interlayer insulating film 10. As a result, the source electrode 9b is miniaturized, and a size of the source electrode 9b is made substantially equal to a size of the current detection cell 22. Therefore, the current detection cell 22 and the principal current cell 21 are disposed close to each other.

Abstract: A sensor is provided for generating an output signal for detecting a limit level of a medium, a filling level of the medium, and/or for differentiating between different media, the sensor including: a processor to process a measurement signal generated using the sensor; and a reference unit to generate a reference signal, the processor is further configured to perform temperature compensation using the reference signal, the processor and the reference unit each having a signal conversion unit to provide temperature-dependent signal conversion, the signal conversion units being thermally coupled to one another, and the temperature compensation includes compensating for temperature dependency of the signal conversion unit of the processor using a thermal coupling.

Abstract: A power semiconductor module includes an insulating substrate, conductor patterns and a power semiconductor element. The conductor patterns are formed on both surfaces of the insulating substrate. The power semiconductor element is mounted on the conductor patterns. The conductor patterns include an anode terminal connection portion and a cathode terminal connection portion. A circuit is formed such that a current that flows between the anode terminal connection portion and the cathode terminal connection portion via the power semiconductor element flows on the both surfaces of the insulating substrate.

Abstract: An information handling system peripheral camera is built by inserting a subassembly into a cylindrical housing and enclosing the subassembly with a bezel at the front and cover at the rear. The cylindrical housing is extruded with aluminum to have seams formed along the length of the interior. The seams provide alignment of the subassembly and are machined at the front and rear to form threads that accept screws to couple the bezel and rear cover to the cylindrical housing. To hide the screws, a back plate couples over the rear cover and an opaque treatment is applied to a circumference of a cover glass placed over the bezel.

Abstract: An n-phonic energy detection (“NED”) system includes two antenna structures separated by a distance and configured to be placed adjacent one of a pair of human ears. Each of the two antenna structures includes antenna elements. The NED system also includes speakers configured to be placed adjacent one of the pair of human ears. The NED system also includes radio frequency (“RF”) detectors configured to detect RF energy emitted from a source and received by the two antenna structures, and an amplifier that amplifies signals from the RF detectors and outputs the amplified signals to a computer and to the speakers corresponding to the antenna structure to be placed adjacent the same one of the pair of human ears.

Abstract: A semiconductor device includes at least one member that is partially sealed by a sealing material and has a part of thereof being exposed from the sealing material, a reversible temperature indicating material, and an irreversible temperature indicating material. Each of the reversible temperature indicating material and the irreversible temperature indicating material is provided on a surface of any one of the at least one member.

Abstract: An infrared sensor comprises a base substrate including a recess, a bolometer infrared ray receiver, and a Peltier device. The bolometer infrared ray receiver comprises a resistance variable layer, a bolometer first beam, and a bolometer second beam. The Peltier device comprises a Peltier first beam formed of a p-type semiconductor material and a Peltier second beam formed of an n-type semiconductor material. The Peltier device is in contact with a back surface of the bolometer infrared ray receiver. One end of each of the bolometer first beam, the bolometer second beam, the Peltier first beam, and the Peltier second beam is connected to the base substrate. The bolometer infrared ray receiver and the Peltier device are suspended above the base substrate. Each of the bolometer first beam, the bolometer second beam, the Peltier first beam, and the Peltier second beam has a phononic crystal structure including a plurality of through holes arranged regularly.

Abstract: The performance of a microelectromechanical systems (MEMS) device may be subject to unwanted thermal gradients or nonuniform temperatures. The thermal gradients may be approximated based on voltage measurements taken through bond wires coupled to bond points located on the MEMS device. Thermal gradient measurement may be improved depending on the arrangement of bond wires and/or the material of the bond wires. Sense circuitry that is coupled to the MEMS device may determine corrective actions, such as updating the operation of the MEMS device, that compensate for the adverse effects from the thermal gradients.

Abstract: A system on an integrated circuit (IC) chip includes an input terminal and a return terminal. A heater coupled between the input terminal and the return terminal. A thermopile is spaced apart from the heater by a galvanic isolation region. A switch device includes a control input coupled to an output of the thermopile. The switch device is coupled to at least one output terminal of the IC chip.

Abstract: A sensor for sensing a gaseous analyte comprising semiconductor phononic nanowire structure and a micro-platform. The sensor comprises a thermal element sensitive to temperature and involving variously chemi-resistive, absorptive and phase change effects. Sensor readout includes monitoring the temperature of the micro-platform.

Abstract: The present invention relates to a semiconductor device and it is an object of the present invention to provide a semiconductor device that makes it easy to change a specification on driving of a power semiconductor element or control of a protection operation thereof. The semiconductor device includes a power semiconductor element, a main electrode terminal of the power semiconductor element, a sensor section that emits a signal corresponding to a physical state of the power semiconductor element, a sensor signal terminal connected to the sensor section, a drive terminal that supplies power to drive the power semiconductor element and a case that accommodates the power semiconductor element, the main electrode terminal, the sensor section, the sensor signal terminal and the drive terminal, and the sensor signal terminal and the drive terminal are provided so as to be connectable from outside the case.

Abstract: A temperature-controlled electronic apparatus, comprises: a circuit board; a plurality of electronic components, mounted on the circuit board in an arrangement to form at least one electronic circuit; a temperature sensor, configured to measure a temperature of the at least one electronic circuit; and a heat-generating component, configured to be controlled by a temperature control circuit, the temperature control circuit being configured to control an amount of heat generated by the heat-generating component in response to the temperature measured by the temperature sensor. The plurality of electronic components are arranged on the circuit board to lie on one of one or more paths, each path of the one or more paths being defined by a respective circle having a radius.

Abstract: Provided is a vehicle-mounted semiconductor device enabling a temperature increase of active elements to be restricted. A vehicle-mounted semiconductor device includes: a semiconductor substrate; a plurality of active elements formed on the semiconductor substrate; a plurality of trenches surrounding the plurality of active elements to insulate and separate the active elements; and a terminal connecting in parallel the plurality of active elements insulated and separated by different trenches among the plurality of trenches and connected to an outside.

Abstract: Highly reliable chip mounting is accomplished by using a substrate having such a shape that a stress exerted on a flip-chip-connected chip can be reduced, so that the stress exerted on the chip is reduced and separation of an interlayer insulating layer having a low dielectric constant (low-k) is minimized. Specifically, in a chip mounting structure, a chip including an interlayer insulating layer having a low dielectric constant (low-k) is flip-chip connected to a substrate via bumps is shown. In the chip mounting structure, the substrate has such a shape that a mechanical stress exerted on the interlayer insulating layer at corner portions of the chip due to a thermal stress is reduced, the thermal stress occurring due to a difference in coefficient of thermal expansion between the chip and the substrate.

Abstract: A system and method for capturing current information for a power converter is disclosed. The current monitoring system includes a control system operably connected to a circuit having a plurality of semiconductor switches that are controllable to convert an input power to an output power having a desired voltage and current. The control system includes a PWM signal generator to generate switching signals that control switching of the switches, gate drivers to facilitate switching of the switches, and desaturation circuits to provide overcurrent protection to the switches. The control system further includes a processor that receives voltage data from the desaturation circuits regarding a measured voltage across each of the switches, determines a current through each of the switches based on the voltage across each respective switch, and calculates an input current to the circuit or an output current of the circuit based on the determined currents through the switches.

Abstract: Devices, methods, and systems for facilitating heat transfer around an electronic component during thermal-cycle testing are presented. A system may include a core, a plurality of solid state heating/cooling devices, and a plurality of heat sinks. The core defines one or more cavities for receiving an electronic component. The system may include an air mover and a duct. In operation, the system may cool an electronic component to sub-ambient temperatures and heat it to above the boiling point of water. A method of thermal-cycle testing may include a core defining a cavity for receiving an electronic component, selectively inducing said heating/cooling devices to operate in a heating mode or a cooling mode, and measuring and recording conditions during the test.

Abstract: An IR sensor includes a suspended micro-platform having a support layer and a device layer disposed thereon. IR absorbers are disposed in or on the device layer. IR radiation received by the IR absorbers heats an on-platform junction of each of a plurality of series-connected thermoelectric devices operating in a Seebeck mode, the devices producing a voltage indicative of the received IR. Other thermoelectric devices are used to cool the platform, and a pressure sensing arrangement is used to detect loss of vacuum or pressure leaks.

Abstract: According to an exemplary embodiment, a dual compartment semiconductor package includes a conductive clip having first and second compartments. The first compartment is electrically and mechanically connected to a top surface of the first die. The second compartment electrically and mechanically connected to a top surface of a second die. The dual compartment semiconductor package also includes a groove formed between the first and second compartments, the groove preventing contact between the first and second dies. The dual compartment package electrically connects the top surface of the first die to the top surface of the second die. The first die can include an insulated-gate bipolar transistor (IGBT) and the second die can include a diode. A temperature sensor can be situated adjacent to, over, or within the groove for measuring a temperature of the dual compartment semiconductor package.

Abstract: According to one embodiment, an infrared imaging device includes a substrate, a detecting section, an interconnection, a contact plug and a support beam. The detecting section is provided above the substrate and includes an infrared absorbing section and a thermoelectric converting section. The interconnection is provided on an interconnection region of the substrate and is configured to read the electrical signal. The contact plug is extends from the interconnection toward a connecting layer provided in the interconnection region. The contact plug is electrically connected to the interconnection and the connecting layer. The support beam includes a support beam interconnection and supports the detecting section above the substrate. The support beam interconnection transmits the electrical signal from the thermoelectric converting section to the interconnection.

Abstract: According to an embodiment, a semiconductor device includes a semiconductor substrate and an amorphous semi-insulating layer on the semiconductor substrate.

Abstract: A resistive memory device capable of suppressing disturbance between cells and a fabrication method thereof are provided. The resistive memory device includes a word line formed, in a first direction, on a semiconductor substrate, lower access structures, each having a pillar shape, formed on the word line, a first insulating layer formed around an outer circumference of each of the lower access structures, a heat-absorption layer formed on a surface of each of the to heat-absorption layers, a variable resistive material formed on the lower access structures, and an upper electrode formed on each variable resistive material.

Abstract: According to an exemplary embodiment, a dual compartment semiconductor package includes a conductive clip having first and second compartments. The first compartment is electrically and mechanically connected to a top surface of the first die. The second compartment electrically and mechanically connected to a top surface of a second die. The dual compartment semiconductor package also includes a groove formed between the first and second compartments, the groove preventing contact between the first and second dies. The dual compartment package electrically connects the top surface of the first die to the top surface of the second die. The first die can include an insulated-gate bipolar transistor (IGBT) and the second die can include a diode. A temperature sensor can be situated adjacent to, over, or within the groove for measuring a temperature of the dual compartment semiconductor package.

Abstract: Embodiments of a thin-film heterostructure thermoelectric material and methods of fabrication thereof are disclosed. In general, the thermoelectric material is formed in a Group IIa and IV-VI materials system. The thermoelectric material includes an epitaxial heterostructure and exhibits high heat pumping and figure-of-merit performance in terms of Seebeck coefficient, electrical conductivity, and thermal conductivity over broad temperature ranges through appropriate engineering and judicious optimization of the epitaxial heterostructure.

Abstract: By forming thermocouples in a contact structure of a semiconductor device, respective extension lines of the thermocouples may be routed to any desired location within the die, without consuming valuable semiconductor area in the device layer. Thus, an appropriate network of measurement points of interest may be provided, while at the same time allowing the application of well-established process techniques and materials. Hence, temperature-dependent signals may be obtained from hot spots substantially without being affected by design constraints in the device layer.

Abstract: Provided is a high-power device having a thermocouple (thermoelectric couple) for measuring the temperature of a transistor constituting a high-power device. The high-power device includes a heating element, a thermocouple formed adjacent to the heating element, and a dielectric body formed between the heating element and the thermocouple.

Abstract: A CMOS thermoelectric refrigerator made of an NMOS transistor and PMOS transistor connected in series through a cold terminal is disclosed. Active areas of the NMOS and PMOS transistors are less than 300 nanometers wide, to reduce thermal conduction between the cold terminal and the IC substrate. Drain nodes of the NMOS and PMOS transistors are connected through hot terminals to a biasing circuit. The drain node of the NMOS transistor is biased positive with respect to the drain node of the PMOS transistor, to extract hot electrons and hot holes from the cold terminal. Biases on the drain nodes and gates of the NMOS and PMOS transistors may be adjusted to optimize the efficiency of the CMOS thermoelectric refrigerator or maximize the thermal power of the CMOS thermoelectric refrigerator. The cold terminal may be configured to cool a selected component in the IC, such as a transistor.

Abstract: An IGBT is disclosed which separated into two groups (first and second IGBT portions). First and second Zener diodes each composed of series-connected Zener diode parts are disposed so as to correspond to the groups respectively. Each of the first and second Zener diodes has an anode side connected to a corresponding one of first and second polysilicon gate wirings, and a cathode side connected to an emitter electrode. Temperature dependence of a forward voltage drop of each of first and second Zener diodes is used for reducing a gate voltage of a group rising in temperature to throttle a current flowing in the group and reduce the temperature of the group to thereby attain equalization of the temperature distribution in a surface of a chip. In this manner, it is possible to provide an MOS type semiconductor device in which equalization of the temperature distribution in a surface of a chip or among chips can be attained.

Abstract: A Field-Effect Transistor (FET) is provided that includes a first portion and a second portion separated from the first portion by a gap. The FET further includes at least one diode embedded within the gap between the first and second portions. A plurality of FETs also may be provided with adjacent FETs electrically isolated.

Abstract: A transistor has a cell array with two or more transistor cells, a temperature sensor, which is integrated in the cell array or is adjacent to the cell array, and an isolation structure. The isolation structure isolates the temperature sensor from the cell array, and has an isolation trench, which is arranged between the cell array and the temperature sensor. The distance between the temperature sensor and the active transistor cell that is closest to the temperature sensor corresponds approximately to the pitch between active transistor cells within the cell array.

Abstract: A semiconductor device equipped with a primary semiconductor element and a temperature detecting element for detecting a temperature of the primary semiconductor element. The device includes a first semiconductor layer of a first conductivity type that forms the primary semiconductor element. A second semiconductor region of a second conductivity type is provided in the first semiconductor layer. A third semiconductor region of the first conductivity type is provided in the second semiconductor region. The temperature detecting element is provided in the third semiconductor region and is separated from the first semiconductor layer by a PN junction.

Abstract: An imager temperature sensor and a current correction apparatus are provided which use dark pixel measurements from an imager chip during operation together with a fabrication process constant as well as a chip dependent constant to calculate chip temperature. The chip temperature may be used to generate a current correction signal. The correction signal is used to tune a current on the imager chip to correct for temperature variations.

Abstract: A power transistor is disclosed. In one embodiment, the power transistor has a cell array including a semiconductor body having a plurality of transistor cells with gate electrodes and with body and source electrode regions and at least one temperature sensing device integrated in the semiconductor body. The temperature sensing device is formed in a selected sense zone within the cell array, and the transistor cells lying in at least one zone of the cell array that is directly adjacent to the sense zone have an increased W/L ratio of their channel width (W) to their channel length (L) compared with the other transistor cells of the cell array.

Abstract: A temperature compensated voltage reference is created from an operational amplifier circuit having two substantially identical P-channel metal oxide semiconductor (P-MOS) transistors with each one having a different gate dopant. The different gate dopants result in different threshold voltages for each of the two otherwise substantially identical P-MOS transistors. The difference between these two threshold voltages is then used to create the voltage reference equal to the difference. The two P-MOS transistors are configured as a differential pair in the operational amplifier circuit and the output of the operational amplifier is used as the voltage reference. The transistor widths of two P-MOS transistors are adjusted to minimize voltage variation over a temperature range.

Abstract: A solid-state imaging device includes first pixels and second pixels. Each of the first pixels and the second pixels includes a p-type diffusion layer formed in a semiconductor substrate and an n-type diffusion layer formed on the p-type diffusion layer. A first p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the first pixels. A second p-type implantation layer having a lower impurity concentration than the first p-type implantation layer or no p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the second pixels.

Abstract: A field-effect transistor power device includes a source electrode, a drain electrode, a wide gap semiconductor including a channel region and a drift region, the channel region and the drift region forming a series current path between the source electrode and the drain electrode, a gate insulating film that covers the channel region, and a gate electrode formed on the gate insulating film. In the series current path which is electrically conducting when the field-effect transistor power device is in an ON state, any region other than the channel region has an ON resistance exhibiting a positive temperature dependence, and the channel region has an ON resistance exhibiting a negative temperature dependence. A ratio ?Ron/Ron(?30° C.) is 50% or less.

Abstract: A method includes bonding a first side of a metal shim to a silicon shim, removing metal from the metal shim to form a plurality of cleared metal lanes in accordance with a pattern, bonding a readout integrated circuit having a plurality of saw lanes in accordance with the pattern to a second side of the metal shim to form a wafer assembly wherein the plurality of saw lanes is aligned with the plurality of cleared metal lanes, and dicing the wafer assembly.

Abstract: Disclosed herein is an optical modulator module package using a flip-chip mounting technology, in which an optical modulator device is hermetically mounted using the flip-chip mounting technology. The optical modulator device is protected from an external environment, it is easy to transmit an electrical signal to the exterior, and optical characteristics of the optical modulator device are desirably maintained.

Abstract: A digital temperature sensing device uses temperature depending characteristic of contact resistance of a MOS transistor and a self-refresh driving device adjusts its self-refresh period depending on temperature using the digital temperature sensing device. The self-refresh driving device includes a first reference voltage generating unit for generating a reference voltage robust to temperature, the first reference voltage generating means being formed with a plurality of MOS transistors, the number of source contacts of the MOS transistors being adjusted such that variation of saturation current through source-drain is compensated for; a second reference voltage generating unit for generating a second reference voltage sensitive to temperature; a level comparator for comparing the first reference voltage with the second reference voltage; and an oscillator for generating a clock signals having differing period depending on the output signal of the level comparator.

Abstract: A semiconductor device is disclosed. In one embodiment the semiconductor device includes a semiconductor body of which is integrated a temperature sensor for measuring the temperature prevailing in the semiconductor body. The temperature sensor has a MOS transistor and a bipolar transistor. The MOS transistor is integrated into the semiconductor body nd configured such that the substhreshold current intensity of the MOS transistor is proportional to the temperature to be measured. The subthreshold current of the MOS transistor is amplified by the bipolar transistor.

Abstract: A semiconductor memory device comprises a temperature dependent voltage source for outputting a voltage at its output in dependence on a temperature measured in the semiconductor memory device. At least one memory cell is provided with at least one first transistor. The first transistor includes a first transistor body, which is connected to the output of said temperature dependent voltage source.

Abstract: The present invention provides a temperature sensor that has high sensitivity and operates in a wide range of temperatures and VDD levels. The temperature sensor may be tailored to the application according to the conditions of temperature and VDD. The temperature sensor comprises five PNP junctions in series. The temperature sensor includes a switch that is configured to block out a predetermined number of the junctions. For example, two junctions may be blocked out. Depending on the state of the switch, the temperature sensor either blocks out a predetermined number of the junctions or operates with all of the junctions active. Blocking out the number of active junctions reduces the sensitivity of the temperature sensor for applications at low temperature and low VDD. The switch may be controlled automatically, or the switch may be hardwired. When the switch is adjusted automatically, a circuit could adjust the switch in response to the temperature information and Vdd conditions.

Abstract: A semiconductor device in which electro-thermal conversion elements and switching devices for flowing currents through the elements are integrated on a first conductive type semiconductor substrate. The switching devices are insulated gate type field effect transistors having a second conductive type first semiconductor region on one principal surface of the semiconductor substrate; a first conductive type second semiconductor region for supplying a channel region and for adjoining the first semiconductor region; a second conductive type source region on the surface of the second semiconductor region; a second conductive type drain region on the surface of the first semiconductor region; and gate electrodes on the channel region with a gate insulator film between them. The second semiconductor region is formed by a semiconductor having an impurity concentration higher than that of the first semiconductor region, and is disposed between two adjacent drain regions, separating them in a traverse direction.

Abstract: A semiconductor device has a semiconductor wafer having sensing portions exposed on a surface thereof and an adhesive sheet attached to the semiconductor wafer as a protective cap to cover the sensing portions. The adhesive sheet is composed of a flat adhesive sheet and adhesive disposed generally on an entire surface of the adhesive sheet. Adhesion of the adhesive is selectively reduced by UV irradiation to have adhesion reduced regions, and the adhesion reduced regions face the sensing portions. The protective cap can be produced with high productivity, and securely protect the sensing portions when the semiconductor wafer is diced and is transported.

Abstract: A method and apparatus for temperature compensation of a resistive based Read-Only Memory device is disclosed. In accordance with the method of the invention, the input voltage supplied to ROM device is adjusted in response to changes in temperature to maintain the current through the ROM at a substantially constant level even as the resistivity of the temperature-dependent connection resistors changes. In one embodiment of the invention, the voltage across the reference resistor is determined by providing a constant current source to the reference resistor and this voltage level is applied to the input of the ROM device. The reference resistor is selected to have similar properties of conductivity as those of the data resistor, for example, a polysilicon. As the temperature increases, the resistivity of a polysilicon data resistor and resistor decrease in a similar manner and, accordingly, the voltage across the reference resistor also decreases.

Abstract: An electronic component includes a composite semiconductor substrate (110, 810) having a first side (111) opposite a second side (112), a semiconductor device (160, 170) at the first side of the composite semiconductor substrate, and a transducer (400, 600, 900) at the second side of the composite semiconductor substrate.

Abstract: A photodetector (and method for producing the same) includes a semiconductor substrate, a buried insulator formed on the substrate, a buried mirror formed on the buried insulator, a semiconductor-on-insulator (SOI) layer formed on the conductor, alternating n-type and p-type doped fingers formed in the semiconductor-on-insulator layer, and a backside contact to one of the p-type doped fingers and the n-type doped fingers.

Abstract: The present invention provides a semiconductor device including a silicon substrate; a heat insulating layer including a silicon oxide film; and a heat detecting portion, in which the heat insulating layer includes a closed cavity and/or a hole, an interior of the hole has a greater diameter than an opening of the hole, and at least a portion of the closed cavity or the hole is formed within the silicon oxide film. The invention also provides a method of manufacturing this semiconductor device.

Abstract: A semiconductor device has plural output circuits. Each of the plural output circuits has a semiconductor switching element and a heat protection circuit including a diode. When the heat protection circuit in a predetermined output circuit detects that heat emitted from the semiconductor switching element in the predetermined output circuit, the heat protection circuit turns off the semiconductor switching element in the predetermined output circuit. The plural output circuits are thermally isolated from each other by a trench and an insulation film. The trench and the insulation film prevent the heat from being transmitted from the predetermined output circuit to an adjacent output circuit. Therefore, even if the heat, by which the semiconductor switching element in the predetermined output circuit is turned off, is generated at the predetermined output circuit, the semiconductor switching element in the adjacent output circuit is not turned off by the heat.

Abstract: The present invention provides a semiconductor device including a silicon substrate; a heat insulating layer including a silicon oxide film; and a heat detecting portion, in which the heat insulating layer includes a closed cavity and/or a hole, an interior of the hole has a greater diameter than an opening of the hole, and at least a portion of the closed cavity or the hole is formed within the silicon oxide film. The invention also provides a method of manufacturing this semiconductor device.

Abstract: A method and apparatus for substantially canceling the effects of temperature on the electrical performance of Field Effect Transistor (FET) integrated circuits (IC's) by exploiting a subtle feature of an epitaxial resistor implemented in an FET process. Specifically, the invention takes advantage of two constituent epitaxial resistor components having resistances that vary monotonically in opposite directions as functions of temperature. The invention includes a method for selecting the geometry of such an epitaxial resistor to give it either temperature invariance or a specific, useful functional temperature dependence.