Abstract: A cryogenic radiation-hard dual-layer field oxide of reoxidized nitrided oxide (ONO) which provides radiation hardness for field-effect transistors and other semiconductor devices at cryogenic temperatures. The dual-layer field oxide includes a thin lower dielectric layer of reoxidized nitrided oxide and an upper deposited dielectric layer that remains charge neutral. The upper dielectric layer is preferably silicon nitride or a doped oxide, such as phospho silicate glass or boro phospho silicate glass. The lower dielectric layer can be made very thin since reoxidized nitrided oxide is a much better barrier layer to the diffusion of boron or phosphorous from the upper dielectric layer into the silicon substrate than silicon dioxide. A thin lower dielectric layer allows only a small amount of positive charge buildup, while the upper dielectric layer traps both holes and electrons and remains charge neutral.

Abstract: An integrated circuit comprises a semiconductor substrate, a plurality of islands formed at a principal surface of the substrate and isolated from one another by a PN junction, an interlayer insulating film formed to substantially cover the principal surface of the substrate, and a capacitor formed in a selected one of the islands and having a dielectric layer which is formed within an opening formed in the interlayer insulating film above the selected island. The dielectric layer is constituted of a multilayer film including a silicon oxide film and a silicon nitride film extending to cover the interlayer insulating film. A power supply line conductor is formed on the interlayer insulating film, and the silicon nitride film is completely removed from a portion of the interlayer insulating film directly under the power supply line conductor.

Abstract: A semiconductor device with an electrode wiring structure comprises at least one diffused region provided in a semiconductor substrate, a silicon oxide layer covering the substrate surface, a silicon nitride layer provided on the silicon oxide layer, a through-hole reaching the diffused region through the silicon oxide layer from an upper surface of the silicon nitride layer, a silicon semiconductor layer filled in the through-hole and serving as an electrode wiring layer, and an interconnection layer electrically connected to the diffused region through the silicon semiconductor layer. According to the structure, since the silicon oxide layer is covered with the silicon nitride layer, unwanted contaminations such as phosphorus, boron, etc., previously contained in the silicon oxide layer are not added to the silicon semiconductor layer during its growth process. Therefore, the electrode wiring layer of silicon semiconductor having controlled conductivity can be provided.

Abstract: The thin-film transistor for liquid crystal display according to the present invention has an inverted-staggered structure in which source and drain electrodes are formed above a gate electrode on a glass substrate, and comprises a nondoped amorphous silicon film as a channel region just above the gate electrode, and a borosilicate glass film formed on the amorphous silicon film. Preferably, the transistor further includes a silicon nitride film formed over the borosilicate glass film.

Abstract: A method for forming a planar insulating layer over the surface of a semiconductor workpiece 8 which includes at least one low region 13 is discussed herein. The first step is to form a layer of blocking material 14 on the surface of the workpiece 8. A first material region 20 is then formed in the low region 13 and an insulating layer 21 is formed over the surface of the workpiece 8 including the first material region 20. The workpiece 8 is then heated in the presence of an active ambient such that the insulation layer 21 reflows and also so that the first material 20 region reacts with the active ambient to create an internal stress in said insulation layer 21. Other systems and methods are also disclosed.

Abstract: A semiconductor device including a semiconductor substrate with a P-type well formed in the semiconductor substrate and a gate insulator layer formed on the semiconductor substrate. N-type diffusion regions are formed in the P-type well on both sides of the gate insulator layer. A gate electrode is formed on the gate insulator layer, where the gate electrode has top and side surfaces. The gate electrode and the N-type diffusion regions respectively form gate, source and drain of a N-channel MOS transistor. An insulating layer covers a portion of the N-type diffusion regions, the side surfaces of the gate electrode and at least a portion of the top surface of the gate electrode. The side wall layer which is made of an insulating material is formed on the insulating layer to provide a smooth coverage around the side of the gate electrode and aligns with an edge of said insulating layer which stops covering the N-type diffusion regions.

Abstract: An integrated circuit structure is presented that includes a substrate in which integrated circuit elements are constructed, a first interconnection metalization over the substrate interconnecting selected ones of the integrated circuit elements, and an oxide layer over the substrate and the first metal interconnection pattern. A glass layer over the oxide layer is substantially planar between portions that overlie the metalization and portions that do not over lie the metalization.

Abstract: A semiconductor device having a double-layer interconnection with contact portions between first and second metal films covered with at least a silicon nitride film is provided wherein an electromigration characteristic at the contact portions is improved. The improvement is achieved by defining a value obtained by multiplying a thickness of the silicon nitride film by a stress of the nitride film formed at the contact portions is not larger than 2/5 of a value obtained by multiplying a thickness of the silicon nitride film by a stress of the nitride film formed at non-contact portions. By this, the stress exerted on the second metal film is reduced to improve the electromigration life at the contact portions by about one order of magnitude. The first and second metal films are made of Al or Al-based alloys.