With Window Means Patents (Class 257/680)
  • Patent number: 10565427
    Abstract: A fingerprint sensor package includes a substrate, a fingerprint sensor chip, and a flexible printed circuit board (FPC). The substrate includes a first portion and a second portion. A line layer is disposed on the first portion. The fingerprint sensor chip is disposed on the substrate. The fingerprint sensor chip is electrically connected to the FPC by the line layer. The package is simple, reliable, and easy for manufacturing process, reducing materials and processing costs.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: February 18, 2020
    Assignee: SHUNSIN TECHNOLOGY (ZHONG SHAN) LIMITED
    Inventor: Jun Yang
  • Patent number: 10558779
    Abstract: A method of redistribution layer routing for 2.5D integrated circuit packages is proposed, which is executed by a computer, the method comprising using the computer to perform the following: performing a MMSIM (modulus-based matrix splitting iteration method) based routing to assign pre-assignment nets to tracks such that total vertical distance from each bump pair to the assigned track is minimized; and performing a MWMCBM (minimum weighted maximum cardinality bipartite matching) based routing for bumps connected to the assigned tracks according to matching result to complete redistribution layer routing for integrated circuit packages.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: February 11, 2020
    Assignee: AnaGlobe Technology, Inc.
    Inventors: Chun-Han Chiang, Fu-Yu Chuang, Yao-Wen Chang, Chih-Che Lin, Chun-Yi Yang
  • Patent number: 10539280
    Abstract: It is an object of the present invention to provide a small and simply-structured light-source device. A light-source device according to the present invention includes a laser light source section, a stem on which the laser light source section is mounted, a cap with an opening, the cap being bonded to the stem in such a manner that the cap covers the laser light source section, a lens holder joined to an outer surface of the cap in such a manner that the lens holder extends over the opening, and a collimating lens supported by the lens holder, the collimating lens collimating a light ray emitted from the laser light source section and then passing through the opening.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: January 21, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Seiji Nakano
  • Patent number: 10535617
    Abstract: A method and circuit for implementing transient electronic circuits for security applications, and a design structure on which the subject circuit resides are provided. Silver nanowire traces are fabricated forming a protection circuit in a soluble material. A frangible material is provided separating the soluble material from a solvent layer proximately located. During a tampering event the frangible material is ruptured releasing the solvent which contacts and dissolves the soluble material and disperses the silver nanowire traces creating an electrical open in the protection circuit. The electrical open enables enhanced tampering detection.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: January 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Eric J. Campbell, Sarah Czaplewski-Campbell, Timothy Tofil, Joseph Kuczynski
  • Patent number: 10519032
    Abstract: A method embodiment includes providing a MEMS wafer. A portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer. The carrier wafer is etched to expose the first membrane and a first surface of the second membrane to an ambient environment. A MEMS structure is formed in the MEMS wafer. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure and a second sealed cavity including a second surface of the second membrane for the pressure sensor device. The cap wafer comprises an interconnect structure. A through-via electrically connected to the interconnect structure is formed in the cap wafer.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Patent number: 10485404
    Abstract: An image sensor module includes a circuit board, image sensor, electronic component assembly, and cable assembly. The circuit board includes a center section located between two end sections. The end sections each extend away from the center section and define an interior area there between. The image sensor is secured to an outer face of the circuit board in the center section with sensor contact fingers being connected at the circuit board outer face in one or both end sections. The electronic component arrangement is mounted on an inner face of the circuit board in the center section. A number of wires of the cable assembly extend through an end gap between the circuit board end sections and are connected to the inner face of the circuit board so as to overlap with the sensor contact fingers along a module longitudinal axis.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: November 26, 2019
    Assignee: KARL STORZ Endovision, Inc.
    Inventors: Dashiell Birnkrant, Gerard Vadenais, Jordan He, Jason Curtis
  • Patent number: 10490487
    Abstract: An electronic device structure includes a leadframe with a die pad and a lead. A semiconductor die is mounted adjacent to the die pad. A clip having a clip tail section is attached to the lead. The clip further has a clip top section attached to the clip tail section, and the clip top section is attached to a die top side of the semiconductor die with a conductive material. The clip further has an opening disposed to extend through the clip top section. In one embodiment, after a reflow step the conductive material forms a conductive fillet at least partially covering sidewall surfaces of the opening, and has a height within the opening with respect to a bottom surface of the clip top section. The opening and the conductive fillet provide an improved approach to monitoring coverage of the conductive material between the clip top section and the die top side of the semiconductor die.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 26, 2019
    Assignee: Amkor Technology, Inc.
    Inventor: Marc Alan Mangrum
  • Patent number: 10477084
    Abstract: A manufacturing method for a camera module including a multilayer body in which an image sensor IC and a lens are arranged with an optical path provided in the multilayer body being disposed therebetween includes a first step and a second step. In the first step, the multilayer body is formed by stacking and combining flexible sheets. In the second step, a through hole is formed in flexible base material layers that constitute a portion of the multilayer body to form the optical path defined by the through hole.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: November 12, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Nobuo Ikemoto, Atsushi Kumano, Jerry Hsieh, Jun Sasaki
  • Patent number: 10468565
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The LED package are also directed to features or arrangements that allow for improved or tailored emission characteristic for LED packages according to the present invention. Some of these features or arrangements include, but are not limited to, higher ratio of light source size to submount size, the used of particular materials (e.g. different silicones) for the LED package layers, improved arrangement of a reflective layer, improved composition and arrangement of the phosphor layer, tailoring the shape of the encapsulant, and/or improving the bonds between the layers. There are only some of the improvements disclosed herein, with some of these resulting in LED packages the emit light with a higher luminous intensity over conventional LED packages.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 5, 2019
    Assignee: CREE, INC.
    Inventors: Arthur Pun, Jeremy Nevins, Jesse Reiherzer, Joseph Clark
  • Patent number: 10467450
    Abstract: A fan-out sensor package includes: a core member including a wiring layer including a plurality of layers and having a through-hole; an integrated circuit (IC) for a sensor disposed in the through-hole; an encapsulant encapsulating at least portions of the core member and the IC for a sensor; and a connection member disposed on the core member and the IC for a sensor and including a plurality of circuit layers, wherein the circuit layer includes sensing patterns detecting a change in capacitance.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: November 5, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ju Ho Kim, Eun Sil Kim, Sang Kyu Lee, Jong Man Kim, Seok Hwan Kim
  • Patent number: 10461239
    Abstract: A microscale sensor structure is provided that enables backside electrical connection to flush-mounted microscale sensors without through-wafer-vias (TWVs). A flush-mounted microscale sensor can be fabricated without TWVs by providing a sensor support substrate with openings for electrical connection access to the backside of a device layer. Backside electrical connection is made to the sensing element(s) of the device layer through the openings in the support substrate. Electrical isolation of the sensing element(s) from the support substrate is accomplished through use of an insulating support substrate and/or an insulating layer between the support substrate and the device layer.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 29, 2019
    Assignee: INTERDISCIPLINARY CONSULTING CORP.
    Inventor: David Alan Mills
  • Patent number: 10451863
    Abstract: Apparatuses and methods for an interposer for integration of multiple image sensors are disclosed herein. An example apparatus includes an interposer including laterally spaced first and second windows, and first and second image sensors disposed on the interposer over the first and second windows, respectively. The interposer including conductive conduits formed in or on to provide electrically conductive paths there through with the first and second image sensors coupled to the conductive conduits. The first and second image sensors laterally spaced by a gap, and an active area of the first and second image sensors to receive incident light through the respective first and second windows, where a perspective of the first image is different than a perspective of the second image sensor based at least in part on the gap.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: October 22, 2019
    Assignee: Verily Life Sciences LLC
    Inventors: Sam Kavusi, Brian M. Pepin
  • Patent number: 10451490
    Abstract: Provided is a sensor package that measures an internal temperature of a measurement object. A sensor package includes: a package including a bottomed tubular casing and plural leads substantially parallel to each other, each of the leads piercing the bottomed tubular casing; and a MEMS chip including at least one thermopile that measures a temperature difference in an identical direction. The MEMS chip is disposed in an inner bottom surface of the bottomed tubular casing of the package in a posture in which a measurement direction of the temperature difference measured with the thermopile is substantially orthogonal to a longitudinal direction of each lead.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: October 22, 2019
    Assignee: OMRON Corporation
    Inventors: Shinya Nakagawa, Masao Shimizu
  • Patent number: 10424702
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with curved and planar surfaces. The packages can comprise a submount with a one or a plurality of LEDs, and in those with a plurality of LEDs each of the LEDs can emit the same or different wavelengths of light than the others. A blanket conversion material layer can be included on at least some of the LEDs and the submount. The encapsulant can be on the submount, over at least some of the LEDs, with each of the planar surfaces being vertical and aligned with one of the edges of the submount. The packages can also comprise reflective layers to minimize losses due to light absorption, which in turn can increase the overall package emission efficiency.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: September 24, 2019
    Assignee: CREE, INC.
    Inventors: Jesse Reiherzer, Jeremy Nevins, Michael John Bergmann, Joseph Gates Clark
  • Patent number: 10389925
    Abstract: Provided are a camera module and a mobile terminal having the same. The camera module includes a first lens assembly, a second lens assembly disposed to be adjacent to the first lens assembly, a lens cover accommodating the first and second lens assemblies and having first and second through holes allowing light to be incident to the first and second lens assemblies, an actuator provided on one side of the first and second lens assemblies to drive the first and second lens assemblies, one image sensor disposed below the first and second lens assemblies and converting light signals incident through the first and second lens assemblies into first and second image signals, and a camera case having a through hole formed on a front side thereof and accommodating the lens cover to allow light to be incident to the first and second lens assemblies through the through hole.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: August 20, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Jongpil Kim, Byunghwa Lee
  • Patent number: 10381334
    Abstract: A semiconductor package includes a package substrate having an upper surface and a lower surface and including a plurality of substrate pads formed on the upper surface, a capacitor structure arranged on the upper surface of the package substrate and including a semiconductor substrate and at least one decoupling capacitor formed in the upper surface of the semiconductor substrate, a plurality of first semiconductor chips mounted on the package and supported by the capacitor structure, first conductive connection members electrically connecting chip pads of the first semiconductor chips to the substrate pads, and second conductive connection members electrically connecting capacitor pads of the decoupling capacitor to the substrate pad.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: August 13, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee-Won Kang, Jong-Joo Lee
  • Patent number: 10347550
    Abstract: The present disclosure provides a semiconductor device and a method of making the same for suppressing warpages of an article due to a difference of temperature strains during the process of making the semiconductor device. The semiconductor device of the present disclosure includes a substrate having a main surface and a recess recessed therefrom; a semiconductor element disposed in the recess; a wiring portion connected to the substrate and electrically connected to the semiconductor element; and a sealing resin filled in the recess. The substrate includes an electrical insulative synthetic resin. The recess has a bottom surface and a connecting surface connected to the bottom surface and the main surface. The connecting surface includes a first inclined surface connected to the bottom surface; a second inclined surface connected to the main surface; and an intermediate surface connected to the first inclined surface and the second inclined surface.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: July 9, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Isamu Nishimura
  • Patent number: 10308502
    Abstract: A semiconductor pressure sensor assembly for measuring a pressure of an exhaust gas which contains corrosive components, comprising: a first cavity, a pressure sensor comprising first bondpads for electrical interconnection, a CMOS chip comprising second bondpads for electrical interconnection with the pressure sensor, an interconnection module having electrically conductive paths connected via bonding wires to the pressure sensor and to the CMOS chip; the interconnection module being a substrate with corrosion-resistant metal tracks, wherein the CMOS chip and part of the interconnection module are encapsulated by a plastic package.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: June 4, 2019
    Assignee: MELEXIS TECHNOLOGIES NV
    Inventors: Laurent Otte, Jian Chen, Appolonius Jacobus Van Der Wiel
  • Patent number: 10297468
    Abstract: A semiconductor device is provided with a substrate made of a semiconductor material, an interconnect layer, at least one electronic element, and a sealing resin. The substrate has a main surface and a pair of lateral surfaces that are orthogonal to the main surface and face in opposite directions to each other. A recessed portion that is recessed from the main surface and has an opening portion that opens on at least one of the pair of lateral surfaces is formed in the substrate. The interconnect layer is formed on the substrate. The electronic element is an orientation sensor, for example, and is accommodated in the recessed portion of the substrate. The sealing resin covers the electronic element.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: May 21, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Yuichi Nakao, Yasuhiro Fuwa
  • Patent number: 10290672
    Abstract: An image sensor semiconductor package (package) includes a printed circuit board (PCB) having a first surface and a second surface opposite the first surface. A complementary metal-oxide semiconductor (CMOS) image sensor (CIS) die has a first surface with a photosensitive region and a second surface opposite the first surface of the CIS die. The second surface of the CIS die is coupled with the first surface of the PCB. A transparent cover is coupled over the photosensitive region of the CIS die. An image signal processor (ISP) is embedded within the PCB. One or more electrical couplers electrically couple the CIS die with the PCB. A plurality of electrical contacts on the second surface of the PCB are electrically coupled with the CIS die and with the ISP. The ISP is located between the plurality of electrical contacts of the second surface of the PCB and the CIS die.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: May 14, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Larry Kinsman, Yusheng Lin, Yu-Te Hsieh, Oswald Skeete, Weng-Jin Wu, Chi-Yao Kuo
  • Patent number: 10219383
    Abstract: A printed wiring board includes a laminate including resin insulating layers and conductor layers such that the resin insulating layers and the conductor layers are laminated alternately and that the laminate has a through hole opening to a first surface of the laminate and a component accommodating cavity that accommodates an electronic component and having an opening part formed on a second surface of the laminate on the opposite side with respect to the first surface. The through hole is formed through the laminate such that the through hole is extending to the component accommodating cavity, and the laminate has a resin coating formed on an inner wall surface of the through hole.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: February 26, 2019
    Assignee: IBIDEN CO. , LTD.
    Inventors: Katsutoshi Kitagawa, Takema Adachi
  • Patent number: 10199344
    Abstract: A MEMS sensor device package comprises a sensor assembly comprising a sensor device and a sensor circuit communicating coupled to the sensor device, The MEMS sensor device package further comprises an assembly package housing having a top member and a bottom member attached to the top member for encapsulating the sensor assembly. A passageway fluidly coupled the sensor device to attributes outside the package housing the passageway is embedded into the package housing, wherein the top member comprising a top wall and side walls, the side walls are attached to the bottom member, and the passageway is embedded into at least one of the side walls.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: February 5, 2019
    Assignees: Akustica, Inc., Robert Bosch GmbH
    Inventor: Mikko V A Suvanto
  • Patent number: 10187560
    Abstract: A notched-spacer camera module includes a chip-scale package, a lens plate, a spacer ring, and a glue ring. The chip-scale package has an image sensor and a top surface. The spacer ring includes a glue gate having a gate height and a spacer base, having a base height, between the glue gate and the lens plate. The glue ring is between the spacer ring and the top surface and has (i) an outer region between the top surface and a bottom surface of the spacer base, and (ii) an inner region, having an inner thickness, between the top surface and a bottom surface of the glue gate. The lens plate, the spacer ring, the glue ring, and the top surface form a sealed cavity having a cavity height equal to at least a sum of the inner thickness, the gate height, and the base height.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: January 22, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Teng-Sheng Chen, Chia-Yang Chang, Yi Qin
  • Patent number: 10177188
    Abstract: A semiconductor package including a substrate, a memory chip on the substrate, a mold layer on the substrate to cover a side surface of the memory chip, an image sensor chip on the memory chip and the mold layer, and a connection terminal between and electrically connecting the memory chip to the image sensor chip may be provided.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: January 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Un-Byoung Kang, Yungcheol Kong, Hyunsu Jun, Kyoungsei Choi
  • Patent number: 10175447
    Abstract: An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: January 8, 2019
    Assignee: Ningbo Sunny Opotech Co., Ltd.
    Inventors: Mingzhu Wang, Bojie Zhao, Takehiko Tanaka, Nan Guo, Zhenyu Chen, Heng Jiang, Zhongyu Luan, Fengsheng Xi, Feifan Chen, Liang Ding
  • Patent number: 10170508
    Abstract: An optical package structure is provided. The optical package structure includes a substrate, a frame layer, an optical unit, a bonding layer, a transparent plate and an encapsulation layer. The frame layer formed on the substrate surrounds a cavity where the optical unit is located. The bonding layer covers a portion of an upper edge of the frame layer and exposes the other portion of the upper edge of the frame layer. The transparent plate mounted on the bonding layer extends across the optical unit and extends beyond an outer edge of the bonding layer. The encapsulation layer covers a lateral edge of the transparent plate and the outer edge of the bonding layer.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: January 1, 2019
    Assignee: KINGPAK TECHNOLOGY INC.
    Inventors: Hsiu Wen Tu, Chung-Hsien Hsin, Jina-Ru Chen
  • Patent number: 10147853
    Abstract: Emitter packages are disclosed having a thixotropic agent or material, with the encapsulant exhibiting significant reduction of thixotropic agent scattering. The packages exhibit a corresponding reduction or elimination of encapsulant clouding and increased package emission efficiency. This allows for the thixotropic agents to be included in the encapsulant to alter certain properties (e.g. mechanical or thermal) while not significantly altering the optical properties of the encapsulant. One embodiment of a light emitting diode (LED) package according to the present invention comprises an LED chip with an encapsulant over the LED chip. The encapsulant has an encapsulant refractive index and also has a thixotropic material with a refractive index that is substantially the same as the encapsulant refractive index.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: December 4, 2018
    Assignee: CREE, INC.
    Inventors: Bernd Keller, Theodore Lowes
  • Patent number: 10126510
    Abstract: A detection device is provided with a holding body that holds a light-receiving module, an optical fiber pigtail, and a lens. The light-receiving module is provided with a light-receiving element and a stem that supports the light-receiving element. The lens collimates an input light from one end of an input fiber and guides a portion of the input light to the light-receiving element. The lens separates the input light into a transmitted light and a reflected light, guiding the transmitted light to the light-receiving element and guiding the reflected light to an output fiber. The light-receiving element has a center of a light-receiving surface thereof disposed in a position away from an axis of the stem.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: November 13, 2018
    Assignee: Santec Corporation
    Inventor: Yasuki Sakurai
  • Patent number: 10121043
    Abstract: A printed circuit board assembly (PCBA) and a method to assemble the PCBA are disclosed. The PCBA includes a printed circuit board (PCB), an image sensing chip and a protection layer. The PCB includes a first insulation layer, a second insulation layer, a first electrically conductive layer, a second electrically conductive layer, and a third electrically conductive layer. The image sensing chip has a number of bonding pads with a sensor portion facing down through the second opening. The PCBA can function as an image sensing module and make the module have the thinnest thickness.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: November 6, 2018
    Assignee: Sunasic Technologies, Inc.
    Inventors: Chi-Chou Lin, Zheng-Ping He
  • Patent number: 10103191
    Abstract: A semiconductor wafer has an image sensor area with a light transmissive wafer, such as glass, disposed over the semiconductor wafer. A portion of the semiconductor wafer is removed to thin the wafer. A semiconductor die is disposed over a surface of the semiconductor wafer opposite the light transmissive wafer. An encapsulant is deposited around the semiconductor die. A portion of the encapsulant is removed to planarize the encapsulant. A conductive via is formed through the semiconductor wafer and first encapsulant. An interconnect structure is formed over the encapsulant and semiconductor die. The interconnect structure includes multiple insulating layers and multiple conductive layers. The multiple insulating layers can be an encapsulant. The semiconductor wafer is singulated to form a multi-die semiconductor package, which integrates the image sensor semiconductor die with other types of semiconductor die to enhance the image performance within the multi-die package.
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: October 16, 2018
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Yu-Te Hsieh
  • Patent number: 10074756
    Abstract: A method for producing an optical component includes presenting a laminate and separating a second layer from a substrate. In presenting the laminate, the laminate includes the substrate, a first layer disposed on the substrate, the second layer disposed on the first layer, and a third layer disposed on the second layer. The first layer includes a portion that does not overlap with the second layer and the third layer. In separating the second layer from the substrate, the second layer is separated from the substrate by dissolving the first layer from the substrate with a liquid. The first layer and the third layer each contain a compound.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: September 11, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Mizuno
  • Patent number: 10062815
    Abstract: A light emitting device includes a carrier, a light emitting chip, and a covering part disposed on the carrier. The carrier includes a board, a guiding metal layer, and a sealing material. The board has a first surface, a second surface, and a through vent that is divided into a first partial hole and a second partial hole. The first partial hole extends from the first surface to the second partial hole, and the second partial hole extends from the second surface to the first partial hole. The guiding metal layer is formed on the second surface and in the second partial hole, and covers the sidewall of the second partial hole. The guiding metal layer extends from the second partial hole to the second surface, and does not cover the sidewall of the first partial hole and the first surface. The sealing material seals the second partial hole.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: August 28, 2018
    Assignee: UNISTARS CORPORATION
    Inventors: Hsin-Hsien Hsieh, Shang-Yi Wu
  • Patent number: 10063756
    Abstract: Provided are a camera module and a mobile terminal having the same. The camera module includes a first lens assembly, a second lens assembly disposed to be adjacent to the first lens assembly, a lens cover accommodating the first and second lens assemblies and having first and second through holes allowing light to be incident to the first and second lens assemblies, an actuator provided on one side of the first and second lens assemblies to drive the first and second lens assemblies, one image sensor disposed below the first and second lens assemblies and converting light signals incident through the first and second lens assemblies into first and second image signals, and a camera case having a through hole formed on a front side thereof and accommodating the lens cover to allow light to be incident to the first and second lens assemblies through the through hole.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 28, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Jongpil Kim, Byunghwa Lee
  • Patent number: 10060940
    Abstract: A sensor includes a sensor element configured to measure a physical variable. At least one elastic damping element is configured to damp external interfering vibrations. The at least one elastic damping element is configured to electrically and/or mechanically contact the sensor element.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: August 28, 2018
    Assignee: Robert Bosch GmbH
    Inventor: Michael Hofsaess
  • Patent number: 10062661
    Abstract: Apparatuses relating to a microelectronic package are disclosed. In one such apparatus, a substrate has first contacts on an upper surface thereof. A microelectronic die has a lower surface facing the upper surface of the substrate and having second contacts on an upper surface of the microelectronic die. Wire bonds have bases joined to the first contacts and have edge surfaces between the bases and corresponding end surfaces. A first portion of the wire bonds are interconnected between a first portion of the first contacts and the second contacts. The end surfaces of a second portion of the wire bonds are above the upper surface of the microelectronic die. A dielectric layer is above the upper surface of the substrate and between the wire bonds. The second portion of the wire bonds have uppermost portions thereof bent over to be parallel with an upper surface of the dielectric layer.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: August 28, 2018
    Assignee: Tessera, Inc.
    Inventors: Hiroaki Sato, Teck-Gyu Kang, Belgacem Haba, Philip R. Osborn, Wei-Shun Wang, Ellis Chau, Ilyas Mohammed, Norihito Masuda, Kazuo Sakuma, Kiyoaki Hashimoto, Kurosawa Inetaro, Tomoyuki Kikuchi
  • Patent number: 10043739
    Abstract: A semiconductor device includes a leadframe, a semiconductor chip mounted on the leadframe, and an encapsulation resin covering the leadframe and the semiconductor chip. The leadframe includes a terminal having a pillar shape. The terminal includes a first end surface, a second end surface facing away from the first end surface, and a side surface extending vertically between the first end surface and the second end surface. The side surface is stepped to form a step surface facing away from the second end surface and having an uneven surface part formed therein. A first portion of the terminal extending from the first end surface toward the second end surface and including the step surface is covered with the encapsulation resin. A second portion of the terminal extending from the first portion to the second end surface projects from the encapsulation resin.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: August 7, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Shintaro Hayashi
  • Patent number: 10007074
    Abstract: Described herein are photonic systems and devices including a optical interface unit disposed on a bottom side of a photonic integrated circuit (PIC) to receive light from an emitter of the PIC. A top side of the PIC includes a flip-chip interface for electrically coupling the PIC to an organic substrate via the top side. An alignment feature corresponding to the emitter is formed with the emitter to be offset by a predetermined distance value; because the emitter and the alignment feature are formed using a shared processing operation, the offset (i.e., predetermined distance value) may be precise and consistent across similarly produced PICs. The PIC comprises a processing feature to image the alignment feature from the bottom side (e.g., a hole). A heat spreader layer surrounds the optical interface unit and is disposed on the bottom side of the PIC to spread heat from the PIC.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: June 26, 2018
    Assignee: Aurrion, Inc.
    Inventors: Gregory Alan Fish, Brian R. Koch
  • Patent number: 9960197
    Abstract: Implementations of a molded image sensor chip scale package may include an image sensor having a first side and a second side. A first cavity wall and a second cavity wall may be coupled to the first side of the image sensor and extend therefrom. The first cavity wall and the second cavity wall may form a cavity over the image sensor. A transparent layer may be coupled to the first cavity wall and the second cavity wall. A redistribution layer (RDL) may be coupled to the second side of the image sensor. At least one interconnect may be directly coupled to the RDL. A mold material may encapsulate a portion of the RDL, a portion of the image sensor, and a side of each cavity wall, and a portion of the transparent layer.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: May 1, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Weng-Jin Wu
  • Patent number: 9933615
    Abstract: An electro-optic device includes an interconnection board provided with an internal terminal, and a chip mounted on the interconnection board, and the chip is provided with a mirror, a drive element, and a chip-side terminal electrically connected to the drive element. The interconnection board includes a first surface on which an internal terminal is disposed, a second surface located on an opposite side to the first surface, a third surface connecting the first surface and the second surface to each other, and a fourth surface located on an opposite side to the third surface. The interconnection board is provided with a metal member exposed on the first surface and the second surface, and through holes (a first through hole and a second through hole) extending from the third surface to the fourth surface and having contact with the metal member.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: April 3, 2018
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Suguru Uchiyama, Kosuke Takahashi
  • Patent number: 9897746
    Abstract: The present invention includes a liquid crystal panel, a light guide member, at least one laser diode (LD), and a heat sink. The light guide member is arranged on a back surface of the liquid crystal panel. The LD is arranged on at least one side surface of the light guide member. The heat sink is arranged to extend along a back surface of the light guide member and the side surface of the light guide member integrally and at least partially. The heat sink is arranged such that a part of the heat sink corresponding to the side surface of the light guide member houses at least a light-emitting surface of the LD.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: February 20, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Taiji Kondo, Hiroshi Nagatomo, Hideyuki Murai
  • Patent number: 9887327
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with curved and planar surfaces. The packages can comprise a submount with a one or a plurality of LEDs, and in those with a plurality of LEDs each of the LEDs can emit the same or different wavelengths of light than the others. A blanket conversion material layer can be included on at least some of the LEDs and the submount. The encapsulant can be on the submount, over at least some of the LEDs, with each of the planar surfaces being vertical and aligned with one of the edges of the submount. The encapsulant can also have a upper curved surface with a relatively large radius of curvature, with the combination of curved and planar surfaces resulting in efficient emission of light with a relatively narrow emission profile.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: February 6, 2018
    Assignee: CREE, INC.
    Inventors: Jesse Reiherzer, Andrew Signor, Joseph Gates Clark, Michael John Bergmann
  • Patent number: 9865780
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can also comprise a submount with one or more LEDs, and a blanket conversion material layer on the one or more LEDs and the submount. The encapsulant can be on the submount, over the LEDs, and light reflected within the encapsulant will reach the conversion material, where it will be absorbed and emitted omnidirectionally. This allows for reflected light to now escape from the encapsulant. This allows for efficient emission and a broader emission profile, for example when compared to conventional packages with hemispheric encapsulants or lenses. In certain embodiments, the LED package provides a higher chip area to LED package area ratio.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: January 9, 2018
    Assignee: CREE, INC.
    Inventors: Theodore Lowes, Eric Tarsa, Sten Heikman, Bernd Keller, Jesse Reiherzer, Hormoz Benjamin
  • Patent number: 9824951
    Abstract: A printed circuit module and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and a buried oxide (BOX) layer over the at least one device layer. A polymer layer is disposed over the BOX layer, wherein the polymer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 103 Ohm-cm.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: November 21, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, Julio C. Costa, Baker Scott
  • Patent number: 9818919
    Abstract: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can comprise a submount with a plurality of LEDs, which emit different colors of light, and a blanket conversion material layer on the LEDs and the submount. The encapsulant can be on the submount, over the LEDs, and light reflected within the encapsulant will reach the conversion material to be absorbed and emitted omnidirectionally. Reflected light can now escape the encapsulant, allowing for efficient emission and a broader emission profile, when compared to conventional packages with hemispheric encapsulants or lenses. The LED package can have a higher chip area to LED package area ratio. By using an encapsulant with planar surfaces, the LED package provides unique dimensional relationships between the features and LED package ratios, enabling more flexibility with different applications.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: November 14, 2017
    Assignee: CREE, INC.
    Inventors: Theodore Lowes, Eric J. Tarsa, Sten Heikman, Bernd Keller, Jesse Reiherzer, Hormoz Benjamin
  • Patent number: 9812420
    Abstract: A die interconnect system having a first die with a plurality of connection pads, and a ribbon lead extending from the first die, the ribbon lead having a plurality of metal cores with a core diameter, and a dielectric layer surrounding the metal core with a dielectric thickness, with at least a portion of dielectric being fused between adjacent metal cores along the length of the plurality of metal cores, and an outer metal layer attached to ground.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: November 7, 2017
    Assignee: ROSENBERGER HOCHFREQUENZTECHNIK GMBH & CO. KG
    Inventors: Sean S. Cahill, Eric A. Sanjuan
  • Patent number: 9784617
    Abstract: A tunable ultra-compact spectrometer and methods for spectrometry therefor can include a single pixel and a Fresnel zone plate having a focal length at a first temperature T1 and a first wavelength ?1, and a focal point. The pixel can be twenty micrometers square and can be placed at a distance from the pixel that equal to the focal length so that the focal point is at the pixel. The Fresnel zone plate can be made of a material that causes the same focal point at the pixel at T2, but at a different wavelength ?2 than wavelength ?1. A heat source can selectively add heat to the Fresnel zone plate to cause a second temperature T2. Exemplary materials for the Fresnel zone plate can be quartz for visible wavelengths, silicon for infrared wavelength, or other materials, according to the ?(s) of interest.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: October 10, 2017
    Assignee: United States of America, as Represented by the Secretary of the Navy
    Inventors: Joanna N. Ptasinski, Stephen D. Russell
  • Patent number: 9786575
    Abstract: A printed circuit module and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and a buried oxide (BOX) layer over the at least one device layer. A polymer layer is disposed over the BOX layer, wherein the polymer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 103 Ohm-cm.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 10, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, Julio C. Costa, Baker Scott
  • Patent number: 9776855
    Abstract: A semiconductor device has a base substrate having a plurality of metal traces and a plurality of base vias. An opening is formed through the base substrate. At least one die is attached to the first surface of the substrate and positioned over the opening. A cover substrate has a plurality of metal traces. A cavity in the cover substrate forms side wall sections around the cavity. The cover substrate is attached to the base substrate so the at least one die is positioned in the interior of the cavity. Ground planes in the base substrate are coupled to ground planes in the cover substrate to form an RF shield around the at least one die.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: October 3, 2017
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: David Bolognia, Bob Shih-Wei Kuo, Bud Troche
  • Patent number: 9780081
    Abstract: A chip package structure can include: a lead frame having a carrier substrate and a first lead around the carrier substrate; a first conductive post arranged on the first lead and electrically coupled with the first lead; a first chip having an active face and an inactive face opposite to the active face and attached to the carrier substrate, and electrode pads on the active face are provided with a first electrical connector; a first plastic package configured to fully encapsulate the first chip, and to partly encapsulate the lead frame, where the first plastic package includes a first surface and a second surface opposite to the first surface, where the first conductive post and the first electrical connector are exposed on the first surface, and where the first lead is exposed on the second surface, and a second lead being arranged on the first surface.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: October 3, 2017
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventor: Xiaochun Tan
  • Patent number: 9771258
    Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: September 26, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Buu Q. Diep, Adam M. Kennedy, Thomas Allan Kocian, Mark Lamb