With Window Means Patents (Class 257/680)
  • Patent number: 8901439
    Abstract: An integrated circuit package system includes a bottom lid, a base integrated circuit over the bottom lid, and a top lid with an integrated circuit window opening over the bottom lid.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: December 2, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventors: Chee Keong Chin, Yu Feng Feng, Guo Qiang Shen
  • Patent number: 8867869
    Abstract: The present disclosure relates to an optical module comprising a carrier substrate including first electrical connection terminals on a first surface and second electrical connection terminals on a second surface electrically connected to the first electrical connection terminals. The second electrical connection terminals are connectable to a circuit carrier. The optical module further comprises an optically transparent carrier including first electrical connection terminals, and an optical element electrically connected to the optically transparent carrier.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: October 21, 2014
    Assignee: Tyco Electronics Svenska Holdings AB
    Inventors: Odd Steijer, Magnus Andersson, Lars-Goete Svenson
  • Patent number: 8860196
    Abstract: A semiconductor package and a method of manufacturing the same, and more particularly, to a package of a power module semiconductor and a method of manufacturing the same. The semiconductor package includes a substrate including a plurality of conductive patterns spaced apart from one another; a plurality of semiconductor chips disposed on the conductive patterns; a connecting member for electrically connecting the conductive patterns to each other, for electrically connecting the semiconductor chips to each other, or for electrically connecting the conductive pattern and the semiconductor chip; and a sealing member for covering the substrate, the semiconductor chips, and the connecting member, wherein a lower surface of the substrate and an upper surface of the connecting member are exposed to the outside by the sealing member.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: October 14, 2014
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Joo-yang Eom, Joon-seo Son
  • Patent number: 8850698
    Abstract: A method is provided for the sealed assembly of an electronic housing containing one or more electronic components. The method includes: assembling the housing by bringing a support, to which the electronic components are fixed, in contact with a cover by means of a mixture-including a paste and nanoparticles in suspension in the paste. The size of the nanoparticles range from 10 to 30 nm. The housing is closed in a sealed manner by heating the housing to a temperature T of between 150° C. and 180° C. making it possible to sinter the metal nanoparticles, while subjecting the housing to a pressure greater than 2.5×105 Pa.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: October 7, 2014
    Assignee: Thales
    Inventors: Claude Drevon, Olivier Vendier, Walim Ben Naceur
  • Publication number: 20140291829
    Abstract: A micro-sensor device that includes a passivation-protected ASIC module and a micro-sensor module bonded to a patterned cap provides protection for signal conditioning circuitry while allowing one or more sensing elements in the micro-sensor module to be exposed to an ambient environment. According to a method of fabricating the micro-sensor device, the patterned cap can be bonded to the micro-sensor module using a planarizing adhesive that is chemically compatible with the sensing elements. In one embodiment, the adhesive material is the same material used for the dielectric active elements, for example, a photo-sensitive polyimide film.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 2, 2014
    Applicant: STMicroelectronics Pte Ltd.
    Inventors: Olivier Le Neel, Shian-Yeu Kam, Tien-Choy Loh, Ditto Adnan, Tze Wei Dennis Chew
  • Publication number: 20140264809
    Abstract: This disclosure provides systems, methods and apparatus for manufacturing display devices having electronic components mounted within a display device package. In one aspect, the electronic component connects to the exterior of the display device through pads that run below a seal that holds a substrate and a backplate of the display device together. In another aspect the electronic components also connect to an electromechanical device within the display device, as well as connecting to pads that are external to the display device.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 18, 2014
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventors: Ravindra V. Shenoy, Marc Maurice Mignard
  • Patent number: 8829496
    Abstract: A device comprising: a first substrate (1); a second substrate; at least one optoelectronic component (4) containing at least one organic material is arranged on the first substrate; the first substrate (1) and the second substrate (2) being arranged relative to one another in such a way that the optoelectronic component (4) is arranged between the first substrate (1) and the second substrate; a bonding material (3) is arranged between the first substrate (1) and the second substrate (2), said bonding material enclosing the optoelectronic component (4) in a frame type fashion and mechanically connecting the first and second substrates (1, 2) to one another; and wherein the bonding material (3) was softened by an exothermic chemical process of a reactive material (7) for mechanically connecting the substrates (1, 2).
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: September 9, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Marc Philippens, Tilman Schlenker
  • Patent number: 8816493
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 26, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Patent number: 8816485
    Abstract: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: August 26, 2014
    Assignee: Sumitomo Bakelite Co., Ltd.
    Inventors: Chris Apanius, Robert A. Shick, Hendra Ng, Andrew Bell, Wei Zhang, Phil Neal
  • Publication number: 20140225244
    Abstract: A method for creating a high density electronic module including the steps of coupling a die to an interposer for form a chipset, mounting the chipset to a substrate, coupling a wafer to the substrate so that the chipset is within a window formed in the wafer, filling the window with encapsulant to encapsulate the chipset, removing the substrate to create a reconstructed wafer, and providing an interconnection structure on the interposer to form the high density electronic module.
    Type: Application
    Filed: February 11, 2014
    Publication date: August 14, 2014
    Applicant: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Brian Smith, Maurice Karpman
  • Patent number: 8803136
    Abstract: A highly reliable light-emitting module including an organic EL element or a light-emitting device using a highly reliable light-emitting module including an organic EL element is provided. Alternatively, a method of manufacturing a highly reliable light-emitting module including an organic EL element, or a method of manufacturing a light-emitting device using a highly reliable light-emitting module including an organic EL element is provided. The light-emitting module has a structure in which a light-emitting element formed over a first substrate and a viscous material layer are sealed in a space between the first substrate and a second substrate which face each other, with a sealing material surrounding the light-emitting element. The viscous material layer is provided between the light-emitting element and the second substrate and includes a non-solid material and a drying agent which reacts with or adsorbs an impurity.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: August 12, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kaoru Hatano, Satoshi Seo, Akihiro Chida
  • Patent number: 8796709
    Abstract: A housing for radiation-emitting or radiation-receiving optoelectronic components such as LEDs and a method for producing the housing are provided. The housing has a base part and a head part that are joined by a glass layer. The top face of the base part defines an assembly region for an optoelectronic functional element and is also a heat sink for the optoelectronic functional element. The head part extends at least in sections over the peripheral extent of the assembly region, and above the assembly region it forms a passage area for the radiation emitted from or to be received by the optoelectronic functional element.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: August 5, 2014
    Assignee: Schott AG
    Inventors: Matthias Rindt, Josef Kiermeier, Thomas Zetterer, Robert Hettler, Shaifullah Bin Mohamed Kamari, Lea-Li Chew, Rohit Bhosale
  • Patent number: 8796801
    Abstract: An electronic switching component (1) with gallium arsenide-based field effect transistors has its own housing (2) with at least one transparent section (3). An electronic microwave circuit (10) has at least one electronic switching component (1) with gallium arsenide-based field effect transistors and its own housing (2) with at least one transparent section (3). The at least one electronic switching component (1) can be illuminated by means of at least one light source (6, 11).
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: August 5, 2014
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Wilhelm Kraemer
  • Publication number: 20140197528
    Abstract: An optical semiconductor apparatus includes a lid body bonded to an upper surface of a frame body, the lid body having an opening at a position vertically overlapping with an optical semiconductor device. The lid body has a first portion which is positioned to surround the opening and has an upper surface to which a light-transmissive member is bonded, a second portion which is positioned to surround the first portion, and a third portion which is positioned to surround the second portion and has a lower surface to which the frame body is bonded. The upper surface of the first portion is positioned lower than an upper surface of the third portion. The second portion has a thin-walled portion positioned to surround the first portion, the thin-walled portion having a thickness thinner than that of the first portion as well as thinner than that of the third portion.
    Type: Application
    Filed: August 17, 2012
    Publication date: July 17, 2014
    Applicant: Kyocera Corporation
    Inventor: Michikazu Nagata
  • Patent number: 8779535
    Abstract: Integrated devices and methods for packaging the same can include an external housing, an internal housing positioned within the external housing, and an external cavity formed between the external housing and the internal housing. An integrated device die can be positioned within the external cavity in fluid communication with an internal cavity formed by the internal lid. An air way can extend through the external cavity to the internal cavity, and can further extend from the internal cavity to the external cavity. The air way can provide fluid communication between the package exterior and the integrated device die, while reducing contamination of the integrated device die.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: July 15, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Thomas M. Goida, Jicheng Yang
  • Patent number: 8767170
    Abstract: A flow through Micro-Electromechanical Systems (MEMS) package and methods of operating a MEMS packaged using the same are provided. Generally, the package includes a cavity in which the MEMS is enclosed, an inlet through which a fluid is introduced to the cavity during operation of the MEMS and an outlet through which the fluid is removed during operation of the MEMS. In certain embodiments, the fluid includes an gas, such as nitrogen, and the inlet and outlet are adapted to provide a flow of gas of from 0.01 Standard Cubic Centimeters per Minute (sccm) to 10000 sccm during operation of the MEMS. The package and method are particularly useful in packaging spatial light modulators including a reflective surface and adapted to reflect and modulate a light beam incident thereon. Other embodiments are also provided.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: July 1, 2014
    Assignee: Silicon Light Machines Corporation
    Inventors: Kenichi Sano, Lars Eng, Alexander Payne, James Hunter
  • Patent number: 8759841
    Abstract: A light emitting device package includes a sub mount; a light emitting device on the sub mount, and configured to generate light of a first wavelength; a dielectric layer disposed on the sub mount; and a fluorescent layer on the dielectric layer, and configured to convert the light of the first wavelength into light of a second wavelength, wherein the dielectric layer includes a plurality of layers having at least two different refractive indices, that transmits the light of the first wavelength and reflects the light of the second wavelength.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: June 24, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Sung Min Hwang, Hyun Don Song, Woon Kyung Choi
  • Patent number: 8749055
    Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: June 10, 2014
    Assignee: DENSO CORPORATION
    Inventors: Tetsuto Yamagishi, Tohru Nomura, Norihisa Imaizumi, Yasutomi Asai
  • Patent number: 8742560
    Abstract: Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: June 3, 2014
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Jeffrey P. Gambino, Charles F. Musante
  • Patent number: 8742570
    Abstract: This disclosure provides systems, methods and apparatus for manufacturing display devices having electronic components mounted within a display device package. In one aspect, the electronic component connects to the exterior of the display device through pads that run below a seal that holds a substrate and a backplate of the display device together. In another aspect the electronic components also connect to an electromechanical device within the display device, as well as connecting to pads that are external to the display device.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: June 3, 2014
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Ravindra V. Shenoy, Marc Maurice Mignard, Manish Kothari, Clarence Chui
  • Patent number: 8736001
    Abstract: A fingerprint sensor may include a substrate, and a finger sensing IC on the substrate and including a finger sensing area on an upper surface thereof for sensing an adjacent finger. The fingerprint sensor may include an encapsulating material on the finger sensing IC and covering the finger sensing area, and a bezel adjacent the finger sensing area and on an uppermost surface of the encapsulating layer.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: May 27, 2014
    Assignee: Authentec, Inc.
    Inventors: Matthew Salatino, Anthony Iantosca
  • Patent number: 8708222
    Abstract: A method for producing a finishing layer containing a window (104) for a portable data storage medium, in particular a chip card, and the use of the method for producing a data storage medium. A transparent plastic-based support layer (28) is used and an opaque color layer (30) is applied on the support layer in a screen printing process, wherein the color layer (30) has a recess (32) having the dimensions of the window (104). A first layer (40) of a transparent primer is then screen printed onto the color layer and a design color layer (50) is then applied in an offset printing process onto the first layer. A second layer (60) of a transparent primer is applied in an offset printing process on top of the design color layer (50) and a transparent finish (70) is finally applied onto the second layer (60).
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: April 29, 2014
    Assignee: Giesecke & Devirent GmbH
    Inventors: Peter Huber, Klaus Kohl, Fabik Roman, Christina Schellenberger, Manuela Schropf
  • Patent number: 8710514
    Abstract: A light emitting die package is provided which includes a metal substrate having a first surface and a first conductive lead on the first surface. The first conductive lead is insulated from the substrate by an insulating film. The first conductive lead forms a mounting pad for mounting a light emitting device. The package includes a metal lead electrically connected to the first conductive lead and extending away from the first surface.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: April 29, 2014
    Assignee: Cree, Inc.
    Inventors: Peter Scott Andrews, Ban P. Loh
  • Patent number: 8704337
    Abstract: In one embodiment, a method for manufacturing a semiconductor device includes following steps. An aperture is formed in an interlayer insulating film formed on a semiconductor wafer apart from an integrated circuit portion by etching process. The interlayer insulating film has a dielectric constant smaller than a silicon oxide film (SiO2), and the width of the aperture is larger than a dicing region. A resin layer is embedded in the aperture. An adhesive layer is formed on the interlayer insulating film and the resin layer. The semiconductor wafer is attached to a glass substrate using the adhesive layer by Face Down method. The semiconductor wafer, the resin layer, and the adhesive layer on a dicing region are cut by blade dicing. The semiconductor wafer and the glass substrate adhered to the semiconductor wafer are cut into pieces by the blade dicing of the glass substrate under the dicing region.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: April 22, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Takano, Hideo Numata, Kazumasa Tanida
  • Patent number: 8698292
    Abstract: An environment-resistant module which provides both thermal and vibration isolation for a packaged micromachined or MEMS device is disclosed. A microplatform and a support structure for the microplatform provide the thermal and vibration isolation. The package is both hermetic and vacuum compatible and provides vertical feedthroughs for signal transfer. A micromachined or MEMS device transfer method is also disclosed that can handle a wide variety of individual micromachined or MEMS dies or wafers, in either a hybrid or integrated fashion. The module simultaneously provides both thermal and vibration isolation for the MEMS device using the microplatform and the support structure which may be fabricated from a thin glass wafer that is patterned to create crab-leg shaped suspension tethers or beams.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: April 15, 2014
    Assignee: The Regents of the University of Michigan
    Inventors: Khalil Najafi, Sang-Hyun Lee, Sang Woo Lee
  • Patent number: 8679872
    Abstract: There is provided a light emitting device package including: a substrate having a circuit pattern formed on at least one surface thereof and including an opening; a wavelength conversion layer formed by filling at least a portion of the opening with a wavelength conversion material; and at least one light emitting device disposed on a surface of the wavelength conversion layer and electrically connected to the circuit pattern.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: March 25, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol Jun Yoo, Young Hee Song, Seong Deok Hwang, Sang Hyun Lee
  • Patent number: 8680674
    Abstract: A semiconductor device comprises an integrated circuit (IC) die having a top side and a back side. The circuit substrate includes a heat source circuit, a heat sensitive circuit, a package substrate coupled to the top side of the circuit substrate, and a plurality of thermally conductive through-silicon vias (TSVs) formed from the back side of the circuit substrate to near but not through the top side of the circuit substrate.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: March 25, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael B. McShane, Kevin J. Hess, Perry H. Pelley, Tab A. Stephens
  • Publication number: 20140077280
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Application
    Filed: June 19, 2013
    Publication date: March 20, 2014
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Patent number: 8674462
    Abstract: A sensor package is disclosed. One embodiment provides a sensor device having a carrier, a semiconductor sensor mounted on the carrier and an active surface. Contact elements are electrically connecting the carrier with the semiconductor sensor. A protective layer made of an inorganic material covers at least the active surface and the contact elements.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: March 18, 2014
    Assignee: Infineon Technologies AG
    Inventors: Ralf Wombacher, Horst Theuss
  • Patent number: 8664683
    Abstract: A method for providing, on a carrier (40), an insulative spacer layer (26) which is patterned such that a cavity (27) is formed which enables connection of an optical semiconductor element (41) to the intended conductor structure (22) when placed inside the cavity (27). The cavity (27) is formed such that it, through its shape, extension and/or depth, accurately defines a location of an optical element (45; 61) in relation to the optical semiconductor element (41). Through the provision of such a patterned insulative spacer layer, compact and cost-efficient optical semiconductor devices can be mass-produced based on such a carrier without the need for prolonged development or acquisition of new and expensive manufacturing equipment.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: March 4, 2014
    Assignee: Koninklijke Philips N.V.
    Inventor: Gerardus Henricus Franciscus Willebrordus Steenbruggen
  • Patent number: 8652965
    Abstract: One object of the present invention is to provide a method for producing a thick film metal electrode that is able to form a positive-negative reverse type resist, which has a thickness of 7 ?m or more and excellent in-plane uniformity, on the circuit element formed on the silicon carbide substrate, and a method for producing a thick film resist, and the present invention provides a method for producing a thick film resist wherein a first positive-negative reverse type resist having a first viscosity is formed on an upper surface of a circuit element layer which is treated with HMDS, and a second positive-negative reverse type resist having a second viscosity, which is larger than the first viscosity, on the first positive-negative reverse type resist such that a total thickness of the first and second positive-negative reverse type resists constituting a thick film resist be 7 ?m or more.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: February 18, 2014
    Assignee: Showa Denko K.K.
    Inventor: Kenji Suzuki
  • Publication number: 20140042606
    Abstract: Low loss optical apertures are provided. A silicon intermediate layer sandwiched between a metal aperture layer and a dielectric layer has been found to offer a good combination of low optical loss combined with superior mechanical properties.
    Type: Application
    Filed: February 4, 2013
    Publication date: February 13, 2014
    Inventor: The Board of Trustees of the Leland Stanford Junior University
  • Patent number: 8637978
    Abstract: A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: January 28, 2014
    Assignee: SanDisk Technologies Inc.
    Inventors: Hem Takiar, Robert C. Miller, Warren Middlekauff, Michael W. Patterson, Shrikar Bhagath
  • Patent number: 8624383
    Abstract: The invention provides an integrated circuit package and method of fabrication thereof. The integrated circuit package comprises an integrated circuit chip having a photosensitive device thereon; a bonding pad formed on an upper surface of the integrated circuit chip and electrically connected to the photosensitive device; a barrier formed between the bonding pad and the photosensitive device; and a conductive layer formed on a sidewall of the integrated circuit chip and electrically connected to the bonding pad. The barrier layer blocks overflow of the adhesive layer into a region, on which the photosensitive device is formed, to improve yield for fabricating the integrated circuit package.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: January 7, 2014
    Inventors: Yu-Lin Yen, Chen-Mei Fan
  • Patent number: 8624371
    Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: January 7, 2014
    Assignee: Round Rock Research, LLC
    Inventors: Todd O. Bolken, Chad A. Cobbley
  • Patent number: 8604599
    Abstract: A semiconductor housing is provided that includes a metal support and a semiconductor body, a bottom side thereof being connected to the metal support. The semiconductor body has metal surfaces that are connected to pins by bond wires and a plastic compound, which completely surrounds the bond wires and partially surrounds the semiconductor body. The plastic compound has an opening on the top side of the semiconductor body, and a barrier is formed on the top side of the semiconductor body. The barrier has a top area and a base area spaced from the edges of the semiconductor body and an internal clearance of the barrier determines a size of the opening. Whereby, a portion of the plastic compound has a height greater than the barrier, and a fixing layer is formed between the base area of the barrier and the top side of the semiconductor body.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: December 10, 2013
    Assignee: Micronas GmbH
    Inventors: Tobias Kolleth, Pascal Stumpf, Christian Joos
  • Patent number: 8593561
    Abstract: A method and system for facilitating focusing of a camera module are disclosed. The camera module includes an image sensor, a lens cube, a barrel and an adjustable member. An adjustable member can be configured to fine-tune the focal length with respect to an image sensor, so that a lens cube with a shorter or longer focal length can be corrected and integrated into the camera module.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: November 26, 2013
    Assignees: Omnivision Technologies, Inc., Visera Technologies Company Limited
    Inventors: Li-Kai Lee, Yu-Kun Hsiao
  • Patent number: 8593817
    Abstract: A power semiconductor module is provided in which power semiconductor chips with an aluminum-based chip metallization and power semiconductor chips with a copper-based chip metallization are included in the same module, and operated at different barrier-layer temperatures during use.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: November 26, 2013
    Assignee: Infineon Technologies AG
    Inventors: Reinhold Bayerer, Thilo Stolze
  • Patent number: 8587107
    Abstract: A hermetically sealed integrated circuit package that includes a cavity housing a semiconductor die, whereby the cavity is pressurized during assembly and when formed. The invention prevents the stress on a package created when the package is subject to high temperatures at atmospheric pressure and then cooled from reducing the performance of the die at high voltages. By packaging a die at a high pressure, such as up to 50 PSIG, in an atmosphere with an inert gas, and providing a large pressure in the completed package, the dies are significantly less likely to arc at higher voltages, allowing the realization of single die packages operable up to at least 1200 volts. Moreover, the present invention is configured to employ brazed elements compatible with Silicon Carbide dies which can be processed at higher temperatures.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: November 19, 2013
    Assignee: Microsemi Corporation
    Inventor: Tracy Autry
  • Patent number: 8587106
    Abstract: A device includes a device wafer having a circuit component formed thereon and having vias formed therein and a cap wafer bonded to the device wafer. The cap wafer has a cavity therein. The cavity has a post formed therein, and the post is positioned to mechanically support the vias formed in the device wafer. The cavity has a volume, the volume substantially enclosing the circuit component formed on the device wafer. The cavity has a width and height such that an impedance of a transmission line is dependent upon the width and height of the cavity, or the impedance of a transmission line is dependent upon the width of a center conductor within the cavity.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: November 19, 2013
    Assignee: Massachusetts Institute of Technology
    Inventors: Carl O. Bozler, Jeremy Muldavin, Peter W. Wyatt, Craig L. Keast, Steven Rabe
  • Patent number: 8558364
    Abstract: An approach to activating a getter within a sealed vacuum cavity is disclosed. The approach uses inductive coupling from an external coil to a magnetically permeable material deposited in the vacuum cavity. The getter material is formed over this magnetically permeable material, and heated specifically thereby, leaving the rest of the device cavity and microdevice relatively cool. Using this inductive coupling technique, the getter material can be activated after encapsulation, and delicate structures and low temperature wafer bonding mechanisms may be used.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: October 15, 2013
    Assignee: Innovative Micro Technology
    Inventor: Jeffery F. Summers
  • Patent number: 8550639
    Abstract: A cover device is described for a micro-optomechanical component having a substrate which has a maximum surface whose surface area is equal to or greater than a single surface area of any other surface of the substrate, and having at least one window, made of a light-transmitting material, which is inclined with respect to the maximum surface of the substrate, the at least one window being situated within at least one continuous opening provided in the substrate. A manufacturing method for a cover device for a micro-optomechanical component is also described. Furthermore, a micro-optomechanical component and a manufacturing method for a micro-optomechanical component are described.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: October 8, 2013
    Assignee: Robert Bosch GmbH
    Inventor: Stefan Pinter
  • Patent number: 8552544
    Abstract: A package structure includes first and second substrates, a sealant and a filler. The first substrate has a surface including an active region and a bonding region. The first substrate has a component in the active region and a pad in bonding region. The pad is electrically connected to the component. The sealant is disposed on the surface surrounding the active region. The sealant has a breach at a side of the active region. The second substrate is bonded to the first substrate via the sealant. The second substrate has a first opening corresponding to the pad, and a second opening corresponding to the breach. The filler fills the second opening, covers the breach such that the first substrate, the second substrate, the sealant and the filler together form a sealed space for accommodating the component.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: October 8, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Ching-Hong Chuang
  • Patent number: 8541873
    Abstract: Packaged microelectronic elements are provided which include a dielectric element, a cavity, a plurality of chip contacts and a plurality of package contacts, and microelectronic elements having a plurality of bond pads connected to the chip contacts.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: September 24, 2013
    Assignee: Tessera, Inc.
    Inventors: Ilyas Mohammed, Belgacem Haba, Wael Zohni, Philip R. Osborn
  • Patent number: 8531018
    Abstract: A mechanically improved component comprising a chip in a cavity and a stress-reduced attachment is specified. A component comprises an opening in a housing, an opaque cover or a mechanically flexible line connector, which is attached to two locations.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: September 10, 2013
    Assignee: Epcos AG
    Inventor: Wolfgang Pahl
  • Patent number: 8519518
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a package paddle; forming a lead adjacent the package paddle, the lead having a hole in a lead body top side and a lead ridge protruding from a lead non-horizontal side; mounting an integrated circuit over the package paddle; connecting an electrical connector to the lead and the integrated circuit; and forming a fill layer within the hole.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: August 27, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Byung Tai Do, Reza Argenty Pagaila, Linda Pei Ee Chua, Arnel Senosa Trasporto
  • Patent number: 8498131
    Abstract: An interconnect structure includes an insulative web having a first surface and a second surface; a logic device secured to the second surface of the insulative web; a frame panel assembly including a frame base having a first surface and a second surface, a first frame insulative layer disposed between the frame base first surface and the insulative web second surface, an aperture extending through the frame base and first frame insulative layer, wherein at least a portion of the logic device is disposed within the aperture, and a first frame connector disposed between a first electrically conductive layer located on the frame base first surface, and a second electrically conductive layer located on a surface of the first frame insulative layer; a device connector disposed between an I/O contact on a surface of the logic device and a third electrical conductor located on a surface of the insulative web; and an insulative layer connector that is disposed between the third electrical conductor located on a sur
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: July 30, 2013
    Assignee: General Electric Company
    Inventors: Raymond Albert Fillion, Kevin Matthew Durocher, Richard Joseph Saia, Charles Gerard Woychik
  • Patent number: 8497560
    Abstract: An LED package is provided. The LED package includes a carrier, an LED chip, a conductive structure, a first encapsulant, a lens and a heat sink. The carrier is cup shaped and comprises a bottom portion and a lateral wall. The LED chip is received in the carrier and disposed on the bottom portion. The conductive structure is electrically connected to the LED chip. The first encapsulant is received in the carrier and fixing the carrier and the conductive structure. The lens is corresponding to the LED chip. The carrier is embedded in the heat sink, and heat generated by the LED chip is transmitted to the heat sink via the bottom portion and the lateral wall of the carrier.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: July 30, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Te Lin, Ming-Yao Lin, Kuang-Yu Tai
  • Patent number: 8476737
    Abstract: An environment-resistant module which provides both thermal and vibration isolation for a packaged micromachined or MEMS device is disclosed. A microplatform and a support structure for the microplatform provide the thermal and vibration isolation. The package is both hermetic and vacuum compatible and provides vertical feedthroughs for signal transfer. A micromachined or MEMS device transfer method is also disclosed that can handle a wide variety of individual micromachined or MEMS dies or wafers, in either a hybrid or integrated fashion. The module simultaneously provides both thermal and vibration isolation for the MEMS device using the microplatform and the support structure which may be fabricated from a thin glass wafer that is patterned to create crab-leg shaped suspension tethers or beams.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: July 2, 2013
    Assignee: The Regents of the University of Michigan
    Inventors: Khalil Najafi, Sang-Hyun Lee, Sang Woo Lee
  • Patent number: 8477239
    Abstract: A integrated camera module (10, 10a) for capturing video images in very small digital cameras, cell phones, personal digital assistants, and the like. A lens assembly (24, 24a) is rigidly affixed in relation to a sensor array area (14) of a camera chip (12) by a molding (26). The molding (26) is formed on the camera chip (12), and optionally on a printed circuit board (16, 16a) on which the camera chip (12) is mounted. The lens assembly (24, 24a) is held in place in a recess (29) of the molding (26) by an adhesive (28). The molding (26) is formed such that a precise gap (30) exists between the lens assembly (24) and a sensor array area (14) of the camera chip (12).
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: July 2, 2013
    Assignee: DigitalOptics Corporation
    Inventors: Vidyadhar Sitaram Kale, Samuel Waising Tam, Dongkai Shangguan