Abstract: A method includes mounting a window substrate to a carrier tape. The window substrate has a window extending between an upper surface of the window substrate and a lower surface of the window substrate, the carrier tape sealing the window at the lower surface. Bond pads on an active surface of a MEMS die are flip chip mounted to terminals on the upper surface of the window substrate, a MEMS active area of the MEMS die being aligned with the window of the window substrate. A magnet is mounted to an inactive surface of the MEMS die.

Abstract: Systems and methods for a flexible dynamic loop having reduced impedance are described. The flexible dynamic loop may supply current from a preamplifier to another device, such as a hard disk drive. In one embodiment, a flexible dynamic loop comprises a flexible structure having a set of wire traces. The flexible dynamic loop may also comprise a set of impedance control structures on the flexible structure and perpendicular to a bend radius of the flexible structure, wherein the set of impedance control structures change an impedance level experienced by at least some of the set of wire traces. Some of the impedance control structures may be staggered. The flexible dynamic loop may also include a cover layer formed over the set of impedance control structures, which may be patterned with perforations. The flexible dynamic loop may also include one or more flexible rails connecting some of the impedance control structures.

Abstract: A printed circuit module and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and a buried oxide (BOX) layer over the at least one device layer. A polymer layer is disposed over the BOX layer, wherein the polymer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 103 Ohm-cm.

Abstract: A wafer seal ring may be formed on a wafer having a pattern structure with a pattern density. The wafer seal ring pattern structure may include a plurality of lines having a width and a spacing that may be approximately equal to a width and a spacing of die bond rings on the wafer. The wafer having the wafer seal ring formed thereon may be bonded to a wafer that may not have a wafer seal ring. A pair of wafers may be formed with respective wafer seal rings formed in a corresponding manner. The pair of wafers may be bonded together with the wafer seal rings aligned and bonded together to form a seal ring structure between the bonded wafers.

Abstract: An epoxy resin composition for encapsulating a semiconductor device and a semiconductor package, the composition including an epoxy resin; a polyorganosiloxane resin represented by Formula 3, below; a curing agent; a curing accelerator; and an inorganic filler:

Abstract: An image sensor that comprises a first substrate and a plurality of photo detector assemblies disposed on or in the first substrate. Each of the photo detector assemblies comprises a photo detector formed on or in a second substrate and configured to generate an analog signal in response to received light, a converter formed on or in a third substrate, wherein the converter is electrically coupled to the photo detector and includes circuitry for converting the analog signal to a digital signal, a processor formed on or in a fourth substrate, wherein the processor is electrically coupled to the converter and includes circuitry for processing the digital signal.

Abstract: Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.

Abstract: This invention relates to an optical element for the purpose of identification and/or prevention of forgery or copying, including at least one layer with anisotropic optical properties, wherein the anisotropic optical properties are patterned, characterized in that the pattern represents biometric information. In addition, this invention relates to a method for the preparation of an optical element for the purpose of identification and/or prevention of forgery or copying.

Abstract: A high temperature, non-cavity package for non-axial electronics is designed using a glass ceramic compound with that is capable of being assembled and operating continuously at temperatures greater that 300-400° C. Metal brazes, such as silver, silver colloid or copper, are used to connect the semiconductor die, lead frame and connectors. The components are also thermally matched such that the packages can be assembled and operating continuously at high temperatures and withstand extreme temperature variations without the bonds failing or the package cracking due to a thermal mismatch.

Abstract: A package on packaging structure provides for improved thermal conduction and mechanical strength by the introduction of a sold thermal coupler between the first and second packages. The first package has a first substrate and through vias through the first substrate. A first set of conductive elements is aligned with and coupled to the through vias of the first substrate. A solid thermal coupler is coupled to the first set of conductive elements and to a die of the second package. A second set of conductive elements is coupled to the die and a bottom substrate is coupled to the second set of conductive elements. The thermal coupler may be, e.g., an interposer, a heat spreader, or a thermal conductive layer.

Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A conductive layer can be formed over the encapsulant and the semiconductor die. A transmissive layer can be formed over the semiconductor die. An interconnect structure can be formed through the encapsulant and electrically connected to the conductive layer, whereby the interconnect structure is formed off to only one side of the semiconductor die.

Abstract: A semiconductor device has a through electrode formed in a through hole which penetrates a Si substrate from one surface to the other surface of the Si substrate, wherein a rectangular electrode pad is provided on the other surface with an insulation film laid between the electrode pad and the other surface, an opening of the through hole on the one surface side is circular, an opening of the through hole on the other surface side is rectangular, and the area of the opening on the other surface side is made smaller than the area of the opening on the one surface side.

Abstract: A semiconductor package comprises a top package and a bottom package with fan-out interconnect structures. A plurality of inter-package connectors electrically connect the top package and the bottom package, and are located near a perimeter of the semiconductor package. A first material is located in a space delimited by a lower surface of the top package, an upper surface of the bottom package, and the inner-most inter-package connectors of the semiconductor package, wherein the first material partially fills the space. A second material different from the first material encapsulates the inter-package connectors.

Abstract: Provided is an optical module. The optical module includes: an optical bench having a first trench of a first depth and a second trench of a second depth that is lower than the first depth; a lens in the first trench of the optical bench; at least one semiconductor chip in the second trench of the optical bench; and a flexible printed circuit board covering an upper surface of the optical bench except for the first and second trenches, wherein the optical bench is a metal optical bench or a silicon optical bench.

Abstract: An image pickup unit for an endoscope includes: an image pickup device including a plurality of connection terminal portions arrayed on a back face that is a surface opposite to a light-receiving surface; a planar rigid printed wiring board including a substrate connection portion and an electric cable connection portion; a flexible printed wiring board including a fixation portion connected to the image pickup device and the rigid printed wiring board, an extension portion extending from an outer periphery of the fixation portion, and a flexed portion provided at a boundary between the fixation portion and the extension portion; an electric cable connected to the electric cable connection portion of the rigid printed wiring board; and an electronic component mounted on the extension portion of the flexible printed wiring board.

Abstract: A method for fabricating a MEMS device includes providing a micro-electro-mechanical system (MEMS) substrate having a sacrificial layer on a first side, providing a carrier including a plurality of cavities, bonding the first side of the MEMS substrate on the carrier, forming a first bonding material layer on a second side of the MEMS substrate, applying a sacrificial layer removal process to the MEMS substrate, providing a semiconductor substrate including a second bonding material layer and bonding the semiconductor substrate on the second side of the MEMS substrate.

Abstract: A cross-sectional shape or a three-dimensional shape of a circuit pattern is estimated and evaluated only from a planar image of the circuit pattern observed from the above of a wafer.

Abstract: A plate structure and method of manufacturing a plate structure, the plate structure including a first plate; an optical laminate on the first plate, the optical laminate including an optical plate on the first plate and a film dam along a top periphery of the optical plate; a second plate on the optical laminate; and a resin layer in a space provided by the film dam, the resin layer attaching the optical plate to the second plate.

Abstract: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 ?m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.

Abstract: An optoelectronic package includes an optoelectronic chip, a transparent protection layer and a plurality of pads. The optoelectronic chip has an upper surface and an active area defined on the upper surface. The transparent protection layer is connected to the optoelectronic chip and covers the upper surface. The transparent protection layer touches and is entirely attached to the active area. The pads are electrically connected to the optoelectronic chip.

Abstract: An imaging system may include an integrated circuit package that includes an image sensor die mounted in a flip chip configuration to a package substrate. The image sensor die may be a backside illumination sensor die. The image sensor die may include an imaging device structure formed over a carrier layer. Through-silicon vias formed in the carrier layer may couple imaging device circuitry in the imaging device structure to conductive bumps on the carrier layer that are coupled to metal interconnects. A ball grid array may be formed on a surface of the package substrate that may be coupled to the conductive bumps. A glass lid may be attached to the image sensor die using attachment structures such that an air gap is formed between the glass lid and the image sensor die. Package sealing material may be deposited between the image sensor die and the package substrate.

Abstract: A method for preparing a semiconductor with preapplied underfill comprises providing a semiconductor wafer with a plurality of metallic bumps on its top side and, optionally, through-silica-vias vertically through the silicon wafer; laminating a back grinding tape to the top of the wafer covering the metallic bumps and through silicon vias; thinning the back side of the wafer; mounting a dicing tape to the back side of the thinned wafer and mounting the silicon wafer and dicing tape to a dicing frame; removing the back grinding tape; providing an underfill material precut into the shape of the wafer; aligning the underfill on with the wafer and laminating the underfill to the wafer.

Abstract: In at least one embodiment of the optoelectronic semiconductor component (1), the optoelectronic semiconductor component has a support (2). At least one optoelectronic semiconductor chip (3) with a radiation outlet face (30) is applied onto a support upper face (20). A sacrificial layer (5) is located over the radiation outlet face (30) in the direction away from the support (2). A housing body (6) which has a housing upper face (60) is molded around the semiconductor chip (3) and/or around the sacrificial layer (5) in a lateral direction parallel to the radiation outlet face (30). A sacrificial layer (5) upper face (50) which faces away from the radiation outlet face (30) is free of a housing body (6) material.

Abstract: A chip arrangement is provided, the chip arrangement, including: a carrier; at least one chip including at least one contact pad disposed over the carrier; an encapsulation material at least partially surrounding the at least one chip and the carrier; and at least one low temperature co-fired ceramic sheet disposed over a side of the carrier.

Abstract: A manufacturing method of semiconductor package structure includes: providing a first dielectric layer having multiple through holes; providing a second dielectric layer having multiple conductive vias and a chip-containing opening; laminating the second dielectric layer onto the first dielectric layer; disposing a chip in the chip-containing opening and adhering a rear surface of the chip onto the first dielectric layer exposed by the chip-containing opening; forming a redistribution circuit layer on the second dielectric layer wherein a part of the redistribution circuit layer extends from the second dielectric layer onto an active surface of the chip and the conductive vias so that the chip electrically connects the conductive vias through the partial redistribution circuit layer; forming multiple solder balls on the first dielectric layer wherein the solder balls are in the through holes and electrically connect the chip through the conductive vias and the redistribution circuit layer.

Abstract: Exemplary embodiments of a camera module are proposed, the camera module including a PCB (Printed Circuit Board) mounted with an image sensor, a base installed at an upper surface of the PCB and formed with a window at a position corresponding to that of the image sensor, an IRCF (Infrared Cut Filter) installed at an upper surface of the base, and an adhesive member fixing the IRCF to the base.

Abstract: A MEMS lead frame package body encloses a MEMS device enclosed in an internal cavity formed by the mold body and cover. To accommodate a MEMS microphone, an acoustic aperture extends through the mold body. In some embodiments, a conductive column extends through the pre-molded body to allow electrical connection from a partially encapsulated lead frame to the conductive cover. Some embodiments may include a multi-tiered cavity within the mold body for mounting an integrated circuit separated by a gap above the MEMS device.

Abstract: A semiconductor device includes: a package including a base plate and a side wall located on a perimeter of the base plate; a semiconductor element on the base plate; and a lid joined to a top of the side wall and covering the semiconductor element, wherein a first curved surface is located inside the package at the top of the side wall, a second curved surface is located on a perimeter of an undersurface of the lid, and the first curved surface of the side wall contacts the second curved surface of the lid.

Abstract: A luminescence device used in a backlight unit for lighting or displaying may include: a substrate including at least two electrode patterns and LED chips which are provided over the substrate and include a phosphor provided thereon. A dam is provided over the substrate, and an encapsulation layer is provided over the substrate. The dam is spaced from the LED Chips, and the substrate comprises a direct copper bonding (DCB) substrate including a first copper layer, a second copper layer and a substrate body.

Abstract: Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained.

Abstract: Apparatus and method of making an improved moisture-resistant package for a MEMS device having movable parts, the package including a substrate, a translucent cover over the substrate, a seal and moisture barrier and a plurality of parallel sidewalls around the periphery of the substrate and cover. The sidewalls have ends and an area between the sidewalls, and the sidewalls separate the substrate and cover by a sufficient distance to provide clearance for the movement of the movable parts. The package is sealed using a glue layer that at least partially fills the area between the sidewalls, and lies between the ends of the sidewalls and one of the substrate or cover. The glue layer causes the substrate or cover, respectively, to adhere to the ends of the sidewalls. The glue layer and the sidewalls together prevent moisture from entering the package.

Abstract: A camera module according to an exemplary embodiment of the present disclosure includes a housing forming an exterior appearance of the camera module, a PCB (Printed Circuit Board) mounted with an image sensor where one end of which is fixed to the housing and the other end is exposed to an outside to be connected to other parts, a lens holder including at least one or more pieces of lenses and so arranged as to be spaced apart from the image sensor at a predetermined distance, and at least two actuators mounted at areas other than an image sensor-mounted area of the PCB, wherein a position of the image sensor is controlled in response to strains of the actuators.

Abstract: A method for producing a MEMS device having improved charge elimination characteristics includes providing a substrate having one or more layers, and applying a first charge elimination layer onto at least one portion of one given layer of the substrate. The method may then (1) apply a sacrificial layer onto the first charge elimination layer, (2) apply a second charge elimination layer onto at least a portion of the sacrificial layer, and (3) deposit a movable layer onto at least a portion of the second charge elimination layer. To form a structure within the movable layer the method may etch the movable layer. The method may then etch the sacrificial layer to release the structure.

Abstract: An optical sensor element is mounted in a package which includes a glass substrate having a cavity, and a glass lid substrate bonded to the other substrate to close the cavity. The glass substrate with the cavity has metalized wiring patterns on front and rear surfaces thereof, and a through hole filled with metal to form a through-electrode interconnecting the wiring patterns on the front and rear surfaces. A metalized wiring pattern on the rear surface of the glass lid substrate is electrically connected to the wiring pattern on the front surface of the other substrate with an adhesive containing conductive particles. The glass lid substrate is made either of glass having a filter function or glass having a light shielding property with an opening therethrough filled with glass having a filter function.

Abstract: An optical semiconductor apparatus includes a lid body bonded to an upper surface of a frame body, the lid body having an opening at a position vertically overlapping with an optical semiconductor device. The lid body has a first portion which is positioned to surround the opening and has an upper surface to which a light-transmissive member is bonded, a second portion which is positioned to surround the first portion, and a third portion which is positioned to surround the second portion and has a lower surface to which the frame body is bonded. The upper surface of the first portion is positioned lower than an upper surface of the third portion. The second portion has a thin-walled portion positioned to surround the first portion, the thin-walled portion having a thickness thinner than that of the first portion as well as thinner than that of the third portion.

Abstract: An image sensor package includes a crystalline handler having opposing first and second surfaces, and a cavity formed into the first surface. At least one step extends from a sidewall of the cavity, wherein the cavity terminates in an aperture at the second surface. A cover is mounted to the second surface and extends over and covers the aperture. The cover is optically transparent to at least one range of light wavelengths. A sensor chip is disposed in the cavity and mounted to the at least one step. The sensor chip includes a substrate with front and back opposing surfaces, a plurality of photo detectors formed at the front surface, and a plurality of contact pads formed at the front surface which are electrically coupled to the photo detectors.

Abstract: A semiconductor package substrate including a substrate body having a front surface configured for mounting a semiconductor chip on the front surface and a rear surface facing the front surface and comprising a window passing through the front and rear surfaces, the window having one or more surfaces inclined from the front surface toward the rear surface; and a conductive pattern arranged along an inclined surface of the window so as to extend from the front surface to the rear surface of the substrate body.

Abstract: Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.

Abstract: An organic light emitting diode display includes a flexible substrate, an organic light emitting diode disposed over the flexible substrate, and an encapsulation film disposed over the flexible substrate to encapsulate the organic light emitting diode, with the organic light emitting diode interposed between the encapsulation film and the flexible substrate. A thermal conduction layer contacts the flexible substrate, wherein the thermal conduction layer faces the organic light emitting diode and the flexible substrate is interposed between the thermal conduction layer and the organic light emitting diode. A first film is disposed over the encapsulation film, and a second film is disposed over the thermal conduction layer.

Abstract: Semiconductor packages are disclosed. In a semiconductor package, a package board may include a hole. A mold layer may cover an upper portion of the package board and extend through the hole to cover at least a portion of a bottom surface of the package board. Each of the sidewalls of a lower mold portion may have a symmetrical structure with respect to the hole penetrating the package board, such that a warpage phenomenon of the semiconductor package may be reduced.

Abstract: A multi-chip package may include an image sensor chip, an image signal processor (ISP) chip, a cover glass, and a package substrate. The ISP chip may be placed on the substrate. The image sensor chip may be placed over the ISP chip. An adhesive film may be formed between the ISP and image sensor chips. A cover glass may be suspended above the image sensor chip. The ISP chip and the image sensor chip may be wire bonded to the substrate. The multi-chip package may be hermetically sealed using a liquid compound or a dam structure. During normal operation, the ISP chip sends control signals to the image sensor chip via a first set of wire bond members and conductive traces in the substrate while the image sensor chip sends output signals to the ISP chip via a second set of wire bond terminals and conductive traces in the substrate.

Abstract: A semiconductor package includes a baseplate having a die attach region and a peripheral region, a transistor die having a first terminal attached to the die attach region, and a second terminal and a third terminal facing away from the baseplate, and a frame including an electrically insulative member having a first side attached to the peripheral region of the baseplate, a second side facing away from the baseplate, a first metallization at the first side of the insulative member and a second metallization at the second side of the insulative member. The insulative member extends outward beyond a lateral sidewall of the baseplate. The first metallization is attached to the part of the first side which extends outward beyond the lateral sidewall of the baseplate. The first and second metallizations are electrically connected at a region of the insulative member spaced apart from the lateral sidewall of the baseplate.

Abstract: A semiconductor device housing package includes a base body having, on its upper surface, a mounting region of a semiconductor device; a frame body having a frame-like portion disposed on the upper surface of the base body, surrounding the mounting region, and an opening penetrating through from an inner side of the frame-like portion to an outer side thereof; a flat plate-like insulating member disposed in the opening, extending from an interior of the frame body to an exterior thereof; wiring conductors disposed on an upper surface of the insulating member, extending from the interior of the frame body to the exterior thereof; and a metallic film disposed on a part of the upper surface of the insulating member, the metallic film lying outside the frame body surrounding the wiring conductors.

Abstract: A light-emitting device package having improved connection reliability of a bonding wire, heat dissipation properties, and light quality due to post-molding and a method of manufacturing the light-emitting device package. The light-emitting device package includes, for example, a wiring substrate having an opening; a light-emitting device that is disposed on the wiring substrate and covers the opening; a bonding wire electrically connecting a bottom surface of the wiring substrate to a bottom surface of the light-emitting device via the opening; a molding member that surrounds a side surface of the light-emitting device and not a top surface of the light-emitting device, which is an emission surface, is formed on a portion of a top surface of the wiring substrate, and is formed in the opening of the wiring substrate to cover the bonding wire; and a solder resist and a bump formed on the bottom surface of the wiring substrate.

Abstract: A metal plate covers an opening on the upper surface of a core substrate and exposes an outer edge of the upper surface of the core substrate. A conductive layer covers the lower surface of the core substrate. A semiconductor chip bonded to a first surface of the metal plate is exposed through the opening. A first insulating layer covers the upper and side surface of the metal plate and the outer edge of the upper surface of the core substrate. A second insulating layer fills the openings of the metal plate and the conductive layer and covers the outer edge of the lower surface of the core substrate, the conductive layer, and the semiconductor chip. The metal plate is thinner than the semiconductor chip. Total thickness of the conductive layer and the core substrate is equal to or larger than the thickness of the semiconductor chip.

Abstract: A MEMS lead frame package body encloses a MEMS device enclosed in an internal cavity formed by the mold body and cover. A conductive internal shell with a connection window sits in the cavity. The MEMS device is mounted in the shell and electrically coupled to the lead frame through wire bonds directed through the connection window. To accommodate a MEMS microphone, an acoustic aperture extends through the mold body aligned with a hole in the internal shell.

Abstract: A semiconductor package includes a lead spaced apart from a semiconductor die. The die includes a diaphragm disposed at a first side of the die and is configured to change an electrical parameter responsive to a pressure difference across the diaphragm. The die further includes a second side opposite the first side, a lateral edge extending between the first and second sides and a terminal at the first side. An electrical conductor connects the terminal to the lead. An encapsulant is disposed along the lateral edge of the die so that the terminal and the electrical conductor are spaced apart from the encapsulant. The encapsulant has an elastic modulus of less 10 MPa at room temperature. A molding compound covers and contacts the lead, the electrical conductor, the encapsulant, the terminal and part of the first side of the die so that the diaphragm is uncovered by the molding compound.

Abstract: A semiconductor package includes a circuit board having an inner circuit pattern and a plurality of contact pads connected to the inner circuit pattern, at least one integrated circuit (IC) device on the circuit board and making contact with the contact pads, a mold on the circuit board, the mold fixing the IC device to the circuit board, and a surface profile modifier on a surface of the IC device and a surface of the mold, and the surface profile modifier enlarging a surface area of the IC device and the mold to dissipate heat.

Abstract: A device comprising a chip, which is held in casting compound and on which a hollow structure is arranged is disclosed.

Abstract: A light emission device includes: an organic electroluminescent element including and second electrodes; a wiring board including first and second patterned conductors; and first and second connection parts. The first and the second electrodes include first and second extended portions. The first and the second extended portions overlap the first and the second patterned conductors, respectively. The first connection part includes a first through-hole wire and a first protrusion electrode protruding from the first patterned conductor to be inside the first through-hole wire so as to be electrically connected to the first through-hole wire. The second connection part includes a second through-hole wire and a second protrusion electrode protruding from the second patterned conductor to be inside the second through-hole wire so as to be electrically connected to the second through-hole wire.