Abstract: A microdevice (20) having a hermetically sealed cavity (22) to house a microstructure (26). The microdevice (20) comprises a substrate (30), a cap (40), an isolation layer (70), at least one conductive island (60), and an isolation trench (50). The substrate (30) has a top side (32) with a plurality of conductive traces (36) formed thereon. The conductive traces (36) provide electrical connection to the microstructure (26). The cap (40) has a base portion (42) and a sidewall (44). The sidewall (44) extends outwardly from the base portion (42) to define a recess (46) in the cap (40). The isolation layer (70) is attached between the sidewall (44) of the cap (40) and the plurality of conductive traces (36). The conductive island (60) is attached to at least one of the plurality of conductive traces (36). The isolation trench (50) is positioned between the cap (40) and the conductive island (60) and may be unfilled or at least partially filled with an electrically isolating material.

Abstract: The disclosure relates to method and apparatus for isolating sensitive regions of a semiconductor device by providing a thermal path or an electromagnetic shield. The thermal path may include vias having different length, depth and configuration such that the thermal path between the two regions is lengthened. In addition, the vias may be fully or partially filled with an insulating material having defined conductive properties to further retard heat electromagnetic or heat transmission between the regions. In another embodiment, electrical isolation between two regions is achieved by etching a closed loop or an open loop trench at the border of the regions and filling the trench with a conductive material to provide proper termination of electromagnetic fields within the substrate.

Abstract: A semiconductor device 39. The device includes an interposer 31 having two major surfaces. The first surface 311 includes patterned metal conductors and bond pads 351, and the second surface includes an array of solder balls 33. The device includes a semiconductor chip 30 having a top surface and a back surface, the back surface of the chip adjacent the interposer 31, and the top surface including a plurality of terminals. Also included is a layer of polymeric material 34 disposed on the first surface 311 of the interposer covering the area of the interposer over the solder ball array. At least a portion of the polymeric material layer is between the chip 30 and the interposer 31. The device further includes a plurality of electrical connections 35 between the chip terminals and the bond pads 351 on the interposer.

Abstract: A heat radiation electrode (15) is exposed from the back surface of an insulating resin (13), and a metal plate (23) is affixed to this heat radiation electrode (15). The back surface of this metal plate (23) and the back surface of a first supporting member (11) are substantially within a same plane, so that it is readily affixed to a second supporting member (24). Accordingly, the heat generated by the semiconductor chip can be efficiently dissipated via the heat radiation electrode (15), the metal plate (23) and the second supporting member (24).

Abstract: A semiconductor package has a printed circuit board, an integrated circuit chip on the printed circuit board with an exposed semiconductor die, and a rigid structure secured to the printed circuit board and enclosing the exposed semiconductor die. The exposed surface of the semiconductor die placed is in thermal contact with an inner surface of the rigid structure with a compressible material.

Abstract: An encapsulation for an electrical device is disclosed. The encapsulation comprises plastic substrates which are laminated onto the surface of the electrical device. The use of laminated plastics is particularly useful for flexible electrical devices such as organic LEDs.

Abstract: A semiconductor device includes a base substrate provided with a base wiring. A first substrate includes a first wiring to be electrically connected to the base wiring and is provided above the base substrate. A first semiconductor element includes a first electrode to be electrically connected to the first wiring and is provided between the base substrate and the first substrate. A second substrate includes a second wiring to be electrically connected to the base wiring and is provided above the first substrate. A second semiconductor element includes a second electrode to be electrically connected to the second wiring and is provided between the first substrate and the second substrate and above the first semiconductor element. The first substrate has a first region where the first semiconductor element is provided below, a second region where a portion of the first wiring that connects to the base wiring is located, and a first bent section between the first region and the second region.

Abstract: A semiconductor package includes a relatively thin substrate epoxy attached to a packaging substrate, such as a lead frame. A relatively thick semiconductor epoxy is attached to a semiconductor. The relatively thin substrate epoxy and the relatively thick semiconductor epoxy are attached to one another forming a stack including the packaging substrate, the relatively thin substrate epoxy, the relatively thick semiconductor epoxy, and the semiconductor. A housing encloses the stack.

Abstract: The present invention includes integrated circuit packages, ball-grid array integrated circuit packages and methods of packaging an integrated circuit. One aspect of the present invention provides an integrated circuit package including a substrate having opposing first and second substrate surfaces and at least one electrical connection supported by the first substrate surface and adapted to couple with circuitry external of the package; a semiconductor die including circuitry electrically coupled with the at least one electrical connection; a first die surface coupled with the second substrate surface; a second die surface; and a cover coupled with the second die surface.

Abstract: A semiconductor package has a printed circuit board, an integrated circuit chip on the printed circuit board with an exposed semiconductor die, and a rigid structure secured to the printed circuit board and enclosing the exposed semiconductor die. The exposed surface of the semiconductor die placed is in thermal contact with an inner surface of the rigid structure with a compressible material.

Abstract: A high-frequency module of the invention includes an insulating substrate including a plurality of ceramic thin plates stacked in layers, and an insulating layer formed on the top surface of the insulating substrate. In the high-frequency module, a thin-film circuit is formed on the top surface of the insulating layer, and comprises a wiring pattern and an electrical part comprising a resistor and/or a capacitor. The wiring pattern is formed of a thin film. The electrical part is connected to the wiring pattern and is formed of a thin film. Therefore, the electrical part of the high-frequency module of the invention can be formed more precisely than an electrical part of a related high-frequency module. Consequently, it is possible to provide a high-frequency module having high performance.

Abstract: A heat sink assembly having a retaining device includes a heat sink (30), a retention frame (10), a rectangular fastener (50), four pins (20), and four springs (40). The heat sink includes a base (32) defining four bores (38) therein. The frame is secured to a printed circuit board (60) around an electronic package (70), and defines a pair of through holes (16). A pair of posts (55) depends from opposite sides of the fastener. The pins are received through the bores of the base and in the fastener. The springs surround the pins respectively between the base and the fastener. The posts are deformably extended through the through holes thereby compressing the springs and sandwiching the base between the frame and the springs. The springs cooperatively provide evenly distributed pressing forces on the base. The heat sink is thus easily, firmly and evenly secured to the electronic package.

Abstract: A multiple semiconductor chip (multi-chip) module for use in power applications includes at least a power semiconductor chip and a control semiconductor chip mounted on an electrically conductive heat sink. The power semiconductor chip may be a Silicon-On-Insulator (SOI) device and the control semiconductor chip may be a semiconductor device having a substrate connected to ground potential. The power semiconductor chip and the control semiconductor chip are directly mounted on the electrically conductive heat sink without the use of a separate electrical insulation layer in order to obtain a multi-chip module which is simple and economical to manufacture, and which offers superior performance characteristics.

Abstract: An IC chip package is constructed to include a substrate, a chip, adhesive means, a cover, and a spacer. The substrate has a top side, a bottom side, and a plurality of conductive pads at the top side. The chip is fixedly mounted in the top side of the substrate, having a plurality of conductive pads respectively electrically connected to the conductive pads of substrate by respective bonding wires. The adhesive means is provided at the top side of the substrate around the border area. The spacer is connected between the substrate and the cover to keep the cover from the substrate at a distance.

Abstract: A circuit device 10 comprises conductive patterns 11, separated by separation grooves 41, circuit elements 12, affixed onto conductive patterns 11, and an insulating resin 13, covering circuit elements 12 and conductive patterns 11 and filling separation grooves 41 while exposing the rear surfaces of conductive patterns 11. Constricted parts 19 are formed at side surfaces of separation grooves 41. At constricted parts 19, the width of separation grooves 41 is made narrower than at other locations. Thus by making insulating resin 13 adhere closely to constricted parts 19, the adhesion of insulating resin 13 with conductive patterns 11 is improved.

Abstract: A solid-state image pickup device in which no warp occurs in a solid-state image pickup element chip is provided. A solid-state image pickup device, including a solid-state image pickup element chip on which a plurality of solid-state image pickup elements are mounted, a wiring substrate electrically connected to the solid-state image pickup element chip and adapted to transmit signals from each one of a plurality of solid-state image pickup elements, and a protection cap provided on a light incident side of the solid-state image pickup element chip and adapted to protect the solid-state image pickup element chip, is characterized in that the solid-state image pickup element chip is formed on a substrate with a thermal expansion coefficient equal to that of the protection cap, and the substrate and the protection cap are sealed with a sealing resin.

Abstract: A structure of a substrate for a high-density semiconductor package is provided. The structure of the substrate comprises a metal substrate and an interconnect substrate disposed on the second surface of the metal substrate. The interconnect substrate comprises at least one or more metal and inter-metal dielectric layers comprising a plurality of traces/lines, pads and vias appropriate for the design. One or more dice are attached to the top surface of the metal substrate, wire bonds are used to connect the dice through open slots on the metal substrate to the Ni/Au plated pads on the interconnect substrate. The uppermost wiring layers are electrically connected to the ball pads on the bottom surface through a plurality of wiring layers and conductive vias. The ball pads are attached to the lowest wiring layer.

Abstract: A device and method identify and compensate for tensile and/or shear stress due to heat-caused expansion and contraction between an integrated heat spreader and thermal interface material. This device and method may change the shape of the integrated heat spreader based upon the identification of location(s) of high tensile and/or shear stress so that additional thermal interface material may be deposited between the integrated heat spreader and a die in corresponding locations. Utilizing this method and device, heat is efficiently transferred from the die to the integrated heat spreader.

Abstract: A semiconductor device is configured of a first semiconductor chip mounted on a substrate, a plate member arranged on the first semiconductor chip, and a second semiconductor chip arranged on the plate member. Bonding wires electrically connect the pads of the first semiconductor chip and the pads of the second semiconductor chip to the pads of the substrate, and a sealing resin seals the first semiconductor chip and the second semiconductor chip. A first portion of the plate member is displaced away from the ends of the first and second semiconductor chips, and a second portion of the plate member extending perpendicular to the first portion, projects outward from the first and second semiconductor chips to be exposed to the outside.

Abstract: A power module for low voltage applications, which does not include an insulated metal substrate is disclosed. The module includes a power shell and a plurality of lead frames each lead frame including a conductive pad on which one or more MOSFETs may be electrically mounted. The MOSFETs are electrically connected via wire bonds.

Abstract: A packaged microchip has a stress sensitive microchip having a microchip coefficient of thermal expansion, a package having a package coefficient of thermal expansion, and an isolator having an isolator coefficient of thermal expansion. The isolator is connected between the stress sensitive microchip and the package. The microchip coefficient of thermal expansion illustratively is closer to the isolator coefficient of thermal expansion than it is to the package coefficient of thermal expansion.

Abstract: A multi chip package, which includes a package substrate having a first side and an opposing second side. The first side is for receiving package electrical connections. Integrated circuits are electrically connected and structurally connected by their first sides to the second side of the package substrate. Heat spreaders are disposed adjacent the second side of the integrated circuits, where a single one of the heat spreaders is associated with a single one of the integrated circuits, but not all of the integrated circuits have an associated heat spreader. A single stiffener having a first side and an opposing second side covers all of the integrated circuits and heat spreaders, where the first side of the stiffener is disposed adjacent the second side of the heat spreaders.

Abstract: A source electrode, a gate electrode, and a drain electrode formed on a front face active region of a semiconductor substrate in a shape of teeth of a comb are covered with an insulating film such as polyimede etc., as well as all of the upper surface and the side surfaces of the insulating film are covered with a metal protective film. Via hole receiving pads connected to the source electrode, the gate electrode, and the drain electrode are respectively connected to bonding pads on a reveres face of the semiconductor substrate through via holes.

Abstract: A multiple semiconductor chip (multi-chip) module includes at least an output semiconductor chip and a control semiconductor chip mounted on an electrically conductive heat sink. The output semiconductor chip may have a bulk substrate configuration and the control semiconductor chip may have a Silicon-On-Insulator (SOI) configuration. The output semiconductor chip and the control semiconductor chip are directly mounted on the electrically conductive heat sink without the use of a separate electrical insulation layer in order to obtain a multi-chip module which is simple and economical to manufacture, and which offers superior performance characteristics such as enhanced heat sink efficiency and reduced EMI.

Abstract: A semiconductor interconnection device having a semiconductor die, a plurality of epoxy bonds, and an array of insulating islands is disclosed. The semiconductor die has a plurality of conductive contacts. The plurality of epoxy bonds has a metallic substance such as silver. The epoxy bonds are configured to provide interconnection between the semiconductor die and an external structure. The plurality of epoxy bonds is selectively applied to the plurality of conductive contacts on the semiconductor die and corresponding conductive contacts on the external structure. The array of insulating islands is coupled to the plurality of conductive contacts. The islands are configured to prevent migration of the metallic substance from the plurality of epoxy bonds to the semiconductor die through the plurality of conductive contacts.

Abstract: A structure of a heat spreader substrate. A first heat spreader has a first upper surface, a corresponding first lower surface and an opening. A second heat spreader has a second upper surface and a corresponding second lower surface. The second heat spreader is fit tightly into the opening. The second lower surface and the first lower surface are coplanar. A thickness of the second heat spreader is smaller than that of the first heat spreader. A chip is located on the second upper surface. A substrate is located on the first upper surface of the first heat spreader, and the opening is exposed by the substrate.

Abstract: An electronic package and a method for packaging an electronic component, particularly a shock-sensitive component such as a yaw rate sensor or an accelerometer mounted to a circuit board. The package includes a case having an opening through which the circuit board is placed within the case, so that a peripheral edge of the circuit board is adjacent but spaced apart from a wall of the case. A thixotropic gel is present in the space between the peripheral edge of the circuit board and the wall of the case, so as to separate and control the mechanical decoupling of the circuit board and case. An optional spacer can be used to space the circuit board from the shelf. Alternatively, the gel may be filled with a polymer particulate material. A potting material preferably fills an upper cavity within the case to encapsulate and secure the circuit board within the case.

Abstract: A semiconductor device having: a wiring substrate; a semiconductor chip disposed thereon; and a heat radiating plate for radiating the heat generated from the semiconductor chip. A highly elastic member made of a synthetic resin is so disposed as to surround the semiconductor chip between the wiring substrate and the heat radiating plate.

Abstract: A yarn processing system, e.g. a yarn feeder comprising a housing in which at least one semiconductor component is arranged on a printed circuit board. The semiconductor component lies on a heat conducting body which is in the form of at least one prolongation of the housing that extends through the printed circuit board up to the semiconductor component.

Abstract: A semiconductor package with an embedded heat-dissipating device is proposed. The heat-dissipating device including a heat sink and a plurality of connecting bumps attached to connecting pads formed on the heat sink is mounted on a substrate by reflowing the connecting bumps to ball pads of the substrate. The connecting bumps and the ball pads help buffer a clamping force generated during the molding process, so as to prevent a packaged semiconductor chip from being cracked. Moreover, the reflowing process allows the connecting bumps to be self-aligned on the substrate, so as to assure the toning and planarity of the heat sink mounted thereon. Accordingly, during molding, the precisely-positioned beat sink can have its upper side closely abutting an upper mold, allowing a molding resin to be prevented from flashing on the upper side thereof i.e.

Abstract: The present invention is directed to an apparatus suitable for mounting an integrated circuit (IC) including a frame suitable for receiving an integrated circuit (IC). The frame includes at least one leg coupled to the frame, the leg suitable for engaging a circuit board so as to enable the apparatus to be secured to the circuit board, thereby securing the integrated circuit (IC). At least one of the frame and leg include a conductive material so as to create at least one of a heat conducting path and an EMC ground path between the integrated circuit (IC) and the circuit board.

Abstract: A semiconductor clamped-stack assembly (32) has at least two clamped stacks, each of these clamped stacks having a plurality of power semiconductor components (8) and a plurality of heat sinks (6), which are arranged in series along a horizontally extending axial direction (A). According to the invention, power semiconductor components (8) from different clamped stacks are assigned to one another and are located in a common mounting plane, which is perpendicular to the axial directions (A) of the clamped stacks (31). Mutually associated power semiconductor components (8) can be removed from the clamped-stack assembly or, respectively, inserted into the clamped-stack assembly in a common mounting direction, which lies in the mounting plane. Mutually associated power semiconductor components (8) are preferably mounted on a common plate (14). As a result, they can be dismantled when the clamped-stack assembly (32) is loosened, without further power semiconductor components or heat sinks having to be dismantled.

Abstract: A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

Abstract: A semiconductor device exhibiting a lower incidence of burrs forming on its contacts during the singulation process. The semiconductor device includes a die which is electrically connected to a set of contacts wherein each contact has a contact surface and a non-contact surface. Each contact surface of the contacts contains a recessed region filled with a first deposit of molding material. The die and the non-contact surfaces of the contacts are encapsulated with a second deposit of molding material. The semiconductor device is singulated from a molded lead frame by guiding a saw blade through recessed regions formed on the contact surface of the contacts. The molding material in the recessed regions creates a “buffer zone” which separates the path of the saw blade from the contact surface of the contacts.

Abstract: Heat is conducted, from a heat generating electronic device that is mounted in a gap between a circuit board and a heat dissipator, along a path that includes a path segment that passes along conductive runs on the circuit board and another segment that spans the gap at a location adjacent to the device, the other path segment being spanned predominantly by a non-metallic piece that has a thermal conductivity of at least 7 W/m-°K.

Abstract: A power semiconductor module achieves high isolation strength from a base through selectively positioning a plurality of metal coatings on first and second surfaces and positioning edges of the plurality to beneficially reduce the field strength tangentially to a selected position, especially in a defined critical region directly adjacent a metal coating edge on a first surface opposite the base. This design results in regions which beneficially allow field lines to extend without functional detriment. The beneficial position selection is is achieved by means of an optimization process in which the tangential components of the field strength beside the first or second metallization edge reach identical values.

Abstract: A method is provided of making a semiconductor package with a heat spreader in which a chip carrier module plate consisting of a plurality of array-arranged chip carriers is mounted with at least one chip on each of the chip carriers. A heat spreader module plate is attached to the chips, with an interface layer formed on a top surface of the heat spreader module plate. The chip carrier module plate, the chips and the heat spreader module plate are encapsulated. Adhesion force between the interface layer and the encapsulant is larger than that between the interface layer and the heat spreader module plate, and adhesion force between the interface layer and the heat spreader module plate is smaller than that between the heat spreader module plate and the encapsulant.

Abstract: The present invention is a method and apparatus to limit eddy current in a thermal plate. A plate is coupled to a die of an integrated circuit for thermal dissipation. The plate has first and second pluralities of grooves comprising non-periodic lines in first and second directions, respectively. The first and second pluralities of grooves form a grid pattern.

Abstract: A microchip (3) is mounted to a chip carrier (1) in such a way as to avoid an earth fault between the chip (3) and the carrier (1). When mounting chips, the chip (3) is placed on a chip carrier (1) that includes an electrically and thermally conductive element (13). The element includes a surface (17) and a recess (15) arranged relative to the surface. The microwave chip (3) is arranged at the surface (17) of the electrically and thermally conductive element (13) by means of a fixing or bonding substance (19), which is disposed at least partially in the recess (15). When mounting the chip, the chip (3) is positioned so that an earth plane (3d) of the microwave chip (3) will lie level with the surface (17) of the electrically and thermally conductive element (13). The chip carrier (1) is suitable for a chip mounting process and can be produced both readily and inexpensively.

Abstract: Heat sinks are provided that achieve very high convective heat transfer surface per unit volume. These heat sinks comprise a spreader plate, at least three fins arranged radially around the spreader plate and an array of porous reticulated foam blocks that fills the space between adjacent fins.

Abstract: A module retention adapter for attaching enabled heat sinks to the user target system while validating a processor with an LAI tool. In a preferred embodiment, the invention comprises an adapter and a clip. A user attaches an adapter to each retention module on a target system. Once a processor is loaded into the LAI tool and a heat sink solution is loaded onto the processor between the adapters. The heat sink clips are then clipped onto the adapters. The clips retain the heat sink to the adapters while also retaining the heat sink to the motherboard retention modules.

Abstract: A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

Abstract: A package is provided for surface mounting a semiconductor device to a board such that a first pad of the semiconductor device is operatively connected to a second pad on the board. The package includes a paddle having a front side and a back side with the front side being mated to the semiconductor device and at least partially enclosed in an encapsulant material and the backside being substantially exposed. In addition, the package has a region of the paddle that is at least partially isolated by the encapsulant material and aligned with the second pad an interconnect connected to the first pad of the semiconductor device and bonded to the region such that a conductive path is formed with the first pad, the region and the second pad when the backside is mated with the board.

Abstract: The electrical connections of an integrated circuit chip assembly comprised of an integrated circuit chip attached to a substrate are encapsulated and reinforced with a high viscosity encapsulant material by dispensing the encapsulant material through an opening in the substrate into the space between the integrated circuit chip and the substrate. An integrated circuit chip assembly having a reinforced electrical interconnection which is more resistant to weakening as a result of stress created by differences in coefficient of thermal expansion between the integrated circuit chip and the substrate to which the integrated circuit chip is attached is produced.

Abstract: A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat- radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

Abstract: A bus bar assembly having a high-speed switching device, a bus bar, and a heat sink. The switching device is integrated into a cavity on the top surface of the bus bar, and the heat sink is mechanically coupled to the bottom surface of the bus bar. The bus bar may include capacitors that are positioned upside down on the top surface of the bus bar to more effectively communicate heat from the capacitor to the bus bar and then the heat sink. The heat sink may be formed from a pair of parallel plates that oppose each another to form a cooling channel, wherein a coolant, such as gas or water, may be passed through. An interior surface of one of the plates may incorporate a cooling structure such as grooves or fins.

Abstract: An electronic apparatus of the present invention comprises an electronic circuit board; an electrically conductive casing for encasing the electronic circuit board; a semiconductor element module electrically connected to the electronic circuit board; and a resin fixture intervening between the electrically conductive casing and the semiconductor element module, the resin fixture mounted with the semiconductor element module and fitted to the electrically conductive casing. As a result, the resin fixture can suppress a transfer of heat generated in the electronic circuit board to the semiconductor element module.

Abstract: An electrical contact, preferably made from a gold-plated, beryllium-copper flat stock which allows radio-frequency signal to pass with low noise, is provided within a housing. The electrical contact has two arms for contact with two external circuits. The electrical contact further has a pivot for allowing the electrical contact to adjust within the housing. The housing supports the electrical contact and is provided with a pivot point, such as a non-conducting rubber tip, for meeting the pivot of the electrical contact. The housing combined with one or more of the electrical contacts results in a testing port especially suited for providing high frequency communication between an electrical testing fixture and a device under test, such as a high-frequency hybrid integrated circuit.

Abstract: A process for forming a thermally enhanced Chip On Board semiconductor device with a heat sink is described. In one aspect, a thermally conducting filled gel elastomer material or a silicon elastomeric material or elastomeric material, if the material is to be removed, is applied to the die surface to which the heat sink is to be bonded. During the subsequent glob top application and curing steps, difficult-to-remove glob top material which otherwise may be misapplied to the die surface adheres to the upper surface of the elastomer material. The elastomer material is removed by peeling prior to adhesion bonding of the heat sink to the die. In another aspect, the thermally conducting filled gel elastomer material is applied between a die surface and the inside attachment surface of a cap-style heat sink to eliminate overpressure on the die/substrate interface.

Abstract: A surface mount semiconductor package includes washing grooves disposed on a bottom surface of a plastic housing. The package also employs locking elements for locking the plastic housing to a metal pad on which a semiconductor device is mounted, where the locking elements include a cross bar between terminals, slots disposed on the metal pad which include barbs and dove-tail grooves disposed on the metal pad. The metal pad includes a waffled surface for improved coupling to a substrate. The package includes terminals having offset portions for providing spaces for the plastic housing material to fill for improved encapsulation of the terminals. The metal pad extends beyond the lateral edges of the plastic housing for improved heat dissipation and for providing a surface to couple to a heatsink.