Abstract: An apparatus and method for evenly applying an atomized adhesive for bonding a die to a leadframe are disclosed. In one embodiment, the apparatus includes a hood in communication with an air supply and a vacuum plenum that encompass a semiconductor device component located in a target area during adhesive application so that the adhesive is selectively applied to specific portions of the leadframe or other semiconductor device component and adhesive is not allowed outside the system. A mask or stencil may be employed for further prevention of adhesive application to undesired areas. An air purge may be employed to direct the adhesive mist toward the component to be coated. In another embodiment, a fine adhesive spray is directed against the surface of the workpiece to be coated, selected areas being masked to prevent coating. Wafers may be coated, as well as leadframes.

Abstract: An enhanced heat dissipating Chip Scale Package (CSP) method and devices include preparing a heat dissipating base with a recess surrounded by a guarding wall. A chip with an integrated circuit (IC) layout is adhered the heat dissipating base in the recess. A substrate with a metallic circuit layer that is smaller size than the chip is then adhered to the chip. Then coupling the metallic circuit layer with the IC layout. A non-conductive resin is then filled in the recess within the guarding wall and covers the coupling portion. The resulting package device produced by means of BGA package process is small size and has enhanced heat dissipating property. The Package size/chip size ratio may be lower than 1.2 to meet the CSP requirements.

Abstract: A package for mounting an integrated circuit chip to a circuit board or the like is provided. The package includes a chip carrier which has a metal substrate including first and second opposed faces. A dielectric coating is provided on at least one of the faces, which preferably is less than about 20 microns in thickness, and preferably has a dielectric constant from about 3.5 to about 4.0. Electrical circuitry is disposed on the dielectric coating, said circuitry including chip mounting pads, connection pads and circuit traces connecting the chip mounting pads to the connection pads. An IC chip is mounted by flip chip or wire bonding or adhesive connection on the face of the metal substrate which has the dielectric coating thereon. In any case, the IC chip is electrically connected to the chip mounting pads either by the solder ball or wire bond connections.

Abstract: An electronic device having two or more printed circuit boards with integrated heat-dissipating mechanism without a fan. A heat-generating circuit component is placed on a daughter board separated from a motherboard. An electrically insulating thermal conductor is placed between the daughter board and the motherboard for heat transfer.

Abstract: A structure for packaging an electronic device.

Abstract: In a high-power microwave hybrid integrated circuit comprising package-free semiconductor devices 5 with contact pads, a dielectric substrate 1 containing holes 3 and a topological pattern on its front side and a shielding metallization 2 on its opposite side, a metallic header 4 with projections 6 adjoining the shielding metallization 2 of the dielectric substrate 1 and passing through the holes 3 thereof, said semiconductor devices 5 being mounted on the projections 6 of the header 4 such that their surfaces with the contact pads flush level with a front side of the dielectric substrate 1, a part of said contact pads being connected to the topological pattern of the metallization and a part thereof being connected to the projections 6 of the header 4, the improvements consisting in that the metallic header 4 is provided with holes 3 where its projections 6 are mounted, said projections 6 being fabricated in the form of inserts rigidly secured in said holes 3 and made of material with a thermal conductivity

Abstract: A method and apparatus for controlling the thickness of a thermal interface between a processor die and a thermal plate in a microprocessor assembly are provided. The apparatus includes a generally rectangular shaped thermal top cover having a recessed portion of predetermined depth and aperture therein. The thermal top cover fits over the processor die. A thermal interface layer fills the recessed portion of the thermal top cover covering the processor die. The depth of the recessed portion is greater than the thickness of the processor die so that the thickness of the thermal interface layer is controlled. A thermal plate is placed over the thermal top cover in contact with the thermal grease so as to form a thermal path from the processor die to the thermal plate.

Abstract: An apparatus and method for evenly applying an atomized adhesive for bonding a die to a leadframe are disclosed. In one embodiment, the apparatus includes a hood in communication with an air supply and a vacuum plenum that encompass a semiconductor device component located in a target area during adhesive application so that the adhesive is selectively applied to specific portions of the leadframe or other semiconductor device component and adhesive is not allowed outside the system. A mask or stencil may be employed for further prevention of adhesive application to undesired areas. An air purge may be employed to direct the adhesive mist toward the component to be coated. In another embodiment, a fine adhesive spray is directed against the surface of the workpiece to be coated, selected areas being masked to prevent coating. Wafers may be coated as well as leadframes.

Abstract: A semiconductor chip has a membrane mounted on supports that are held in the material of the chip so that the membrane is supported at a space from the chip. The membrane may be a metal layer. The supports are columns or webs that extend into the chip material. Electrical connections to the membrane may be made by conductive supports.

Abstract: A secure electronic data module containing a monolithic semiconductor chip of the type having a memory that is protected by a combination of hardware and software mechanisms such that unauthorized access to the data stored in the memory is prevented. The monolithic semiconductor chip comprises a plurality of solder bumps for attaching the chip to a substrate that may be a printed circuit board or another chip; a multi-level interlaced power and ground lines using minimum geometries; and a detection circuit block for detecting an external trip signal that may be produced by a pre-specified change in an operating condition brought on by unauthorized accessing, or an internal trip signal that may be produced by shorting of power and ground lines or by a change in an oscillator's frequency, also associated with or appurtenant to unauthorized accessing of the secure memory.

Abstract: A novel IC chip packaging construction in which the chip package materials are selected such that their thermal linear expansion curves are closely matched over the full operating temperature range of the IC chip. The IC chip packaging construction includes a metal base and cover for enclosing the IC chip and a pair of insulating frames for hermetically sealing the IC chip in the chip package. A plurality of input/output leads make electrical connections with the IC chip through fine wires that are soldered to the leads and to contact areas on the IC chip. The metal base and cover and the input/output leads are fabricated from copper and the insulating frames are fabricated from Fotoceram.RTM. 160, which has a thermal linear expansion curve that closely matches that of copper over the full operating temperature range of the chip. Accordingly, the problems of differential expansion rates due to temperature variations for wafer size or very large scale IC chips are greatly minimized.

Abstract: A surface mount semiconductor package includes washing grooves disposed on a bottom surface of a plastic housing. The package also employs locking elements for locking the plastic housing to a metal pad on which a semiconductor device is mounted, where the locking elements include a cross bar between terminals, slots disposed on the metal pad which include barbs and dove-tail grooves disposed on the metal pad. The metal pad includes a waffled surface for improved coupling to a substrate. The package includes terminals having offset portions for providing spaces for the plastic housing material to fill for improved encapsulation of the terminals. The metal pad extends beyond the lateral edges of the plastic housing for improved heat dissipation and for providing a surface to couple to a heatsink.

Abstract: An electrical insulation for a heatsink (14) of a semiconductor device (10) is provided by an insulating layer (16) formed on a desired portion or portions of the semiconductor device (10) to protect a semiconductor die (17) from arcing currents due to high voltage potentials. The insulating layer (16) is formed from a non-conductive powder coating which is applied to the semiconductor devices (10) by attracting the powder to the semiconductor device (10) in one of four ways. Either a fluidized powder bed process, an electrostatic fluidized bed process, an electrostatic spraying process, or the powder is applied during the mold process on the desired surface of the semiconductor device (10). Once the powder coating is applied to the heatsink (14), the semiconductor package is cured to form the insulating layer (16). The insulating layer (16) can also be formed over other portions the semiconductor device (10) such as a body (13), leads (12), or a leadframe (11).

Abstract: In a packaging arrangement suitable for semiconductor devices, a semiconductor chip is mounted on a surface of an aluminum base with a bonding layer interposed therebetween. The aluminum base has a capability to favorably dissipate heat from the semiconductor chip. The bonding layer consists of a resilient and heat conductive material such as silicone resin mixed with silver powder so that thermal strain of the metal base is accommodated by the resiliency of the bonding layer, and is prevented from adversely affecting the electronic component chip even though the aluminum base demonstrates a substantially more significant thermal expansion than the semiconductor chip. It is therefore possible to achieve a high reliability in the packaging of semiconductor devices at a minimum cost.

Abstract: A plastic pin support of a plastic PGA package is used to hold conductor pins in alignment, for electrical contact, with a printed circuit board and a socket. The printed circuit board is mounted on the plastic pin support which is electrically connected to respective conductor pins of the plastic pin support. A first adhesive layer, containing silver fillers, connects a silicon chip housed in the plastic PGA package to a heat sink and conducts heat from the silicon chip to the heat sink. The first adhesive layer also absorbs thermal expansion variations between the silicon chip and the heat sink during thermal cycles. A second adhesive layer connects the printed circuit board to the heat sink.

Abstract: A flexible circuit board includes an insulating flexible film having a lower surface provided with first wiring patterns having first inner ends, and second outer ends extending to a peripheral area of the insulating flexible film. A semiconductor element is electrically connected to and supported by the first inner ends of the first patterns. A connecting circuit board includes an insulating base substrate having an upper surface provided with second wiring patterns having first inner ends, and second outer ends extending to a peripheral area of the base substrate, and a lower surface provided with external connecting terminals electrically connected to the first inner ends of the second wiring patterns by vias. A resin fills a space between the lower surface of the flexible circuit board and the upper surface of the connecting circuit board so that the semiconductor element is hermetically sealed with the resin.

Abstract: An electronic module is provided including a chip bonded to a flexible laminate, and an apparatus for establishing coplanarity of a surface of the module, the apparatus comprising (1) a stiffener having a recessed portion for receiving the chip mounted to the flexible laminate, the recessed portion including a first planar surface and a second planar surface with the two planar surfaces being substantially parallel to each other, and (2) an adhesive bond line along the second planar surface for attaching the flexible laminate to the stiffener, the adhesive bond line including a plurality of spacers embedded within the adhesive bond line.

Abstract: It is an object to increase a breakdown voltage of a lead frame. A primary sealing resin (41) seals the upper main surface of a lead frame (3) and elements mounted thereon. A secondary sealing resin (21) coupling the lead frame (3) and a heat sink (51) passes through gaps of the lead frame (3) having pattern configuration to project on the upper main surface side of the lead frame (3). The primary sealing resin (41) is in close contact with the projections (62). The projections (62) enlarge the creeping distance along the interface between the primary sealing resin (41) and the secondary sealing resin (21) between parts of the lead frame (3) adjacent with gaps therebetween, so that the breakdown voltage between those parts is increased.

Abstract: The present invention relates to a solid printed substrate to be used for mounting electronic parts and a method of manufacturing the same. A metal base substrate having a plurality of copper foil layers stacked thereon is employed placing a thermoplastic polyimide sheet between each copper foil. The metal base substrate with a circuit pattern prepared on each copper foil layer is processed by bending or deep drawing into a box-shaped work which has an opening surface. The opening surface is processed so as to have a substantially equal area with that of the bottom of the substrate and have a collar portion on the periphery thereof. On the collar portion, leads to be used for connection with other wiring substrate are formed by patterning on copper foil layers.

Abstract: There is disclosed components for electronic packaging applications having integral bumps. A leadframe is formed by etching a metallic strip from one side to form outwardly extending, substantially perpendicular integral bumps. The metallic strip is then etched from the opposite side to form individual leads. When the integrally bumped component is an package base, fatigue of solder balls is reduced.

Abstract: Method and apparatus for interconnecting integrated circuits (ICs) are described. The invented lattice preferably is formed in a plural-layer structure whereby each required interconnect signal has one or more dedicated layers of a planar, thin-film conductor that is coextensive with the substrate. Thousands of such horizontal layers are vertically stacked in the structure, each being shielded by voltage or ground planes and each being insulated by layers of insulative dielectric material. A regular array of vertical pillars is provided in the substrate, each pillar effectively providing an inner conductor either electrically connected with a conductive layer or electrically insulated therefrom by an insulative region. The columns extend from the top of the substrate on which the ICs are mounted through to the bottom surface of the bottom layer.

Abstract: A discrete element electronic package (100) includes a heat spreader (180) with a cavity (185) for receiving a substrate (110), a substrate (110) mounted within the cavity (185) of the heat spreader (180), a heat-generating semiconductor device (170), such as a power transistor (170), mounted on the substrate (110), and electrical connectors (140) located on the substrate (110) to provide an electrical interface to the semiconductor device (170).

Abstract: A semiconductor module includes a metal base plate having a plane upper sace and a convex lower surface. An electrically insulating and thermally conductive substrate is material-lockingly connected to the upper surface of the metal base plate. Semiconductor chips are material-lockingly connected to an upper surface of the substrate.

Abstract: A single, integral Metal Matrix Composite structure (47) includes a base plate (11), circuit layer (25), and lead supports (30,32), forming the single integral structure (47). Such a structure is particularly suited for power module applications. The various elements are well matched, thermally. Additionally, the structure (47) can be fabricated using straightforward molding processes, rather than complicated, fixtured, bonding and solder processes which are typically used for conventional power modules.

Abstract: An improved millimeter wave device package design in which the package includes a dielectric substrate disposed upon a supporting base such that the substrate extends substantially along the peripheral edge of the base, defining a central aperture. A solid conductive layer substantially covers the first surface of the dielectric substrate and a series of conductive transmission lines are formed on an opposing second surface of the substrate. A dielectric layer is disposed upon and substantially covers the transmission lines and the second surface of the substrate upon which they are formed. A seal ring is disposed upon and the dielectric layer and a conductor electrically connects the device to the transmission lines. A lid is sealed atop the seal ring completes the hermetical seal for the device.

Abstract: A package structure in which conductive layers are provided on the lower surface of a circuit substrate provided with a semiconductor element mounted on the upper surface thereof, which conductive layers are connected to a conductive seal portion via conductive through holes, whereby both satisfactory air-tightness and satisfactory electromagnetic shielding characteristics of the package structure can be obtained. Projections consisting of high-temperature solder are formed as externally connecting electrodes, whereby a surface packaging operation can be carried out smoothly.

Abstract: There is provided a molded plastic electronic package having improved thermal dissipation. A heat spreader, formed from aluminum or an aluminum alloy, is partially encapsulated in the molding resin. Forming a black anodization layer on the surface of the heat spreader improves both thermal dissipation and adhesion to the molding resin.

Abstract: An electronic package assembly that includes a flexible circuit wrapped around a metal substrate. The leads of the flexible circuit are connected to an integrated circuit that is mounted to the top surface of the substrate. The flexible circuit has a plurality of metal pads located adjacent to the bottom surface of the substrate. The flexible circuit also contains a power/ground plane and a number of conductive signal lines that couple the integrated circuit to the metal pads. The pads can be soldered to a printed circuit board to electrically couple the integrated circuit to the board.

Abstract: A thermal attachment assembly for heat generating electronic devices which includes a multi-element spring having low force, high deflection, spring fingers, and which is adjustable and attached by screws to a cover to apply pressure directly against electronic components arranged generally perpendicular to at least one edge of a printed wired board (PWB). The attachment assembly includes a heat sink housing in which the electronic components are pressed against an electrically insulating, thermally conductive film positioned against one wall of the heat sink housing. The PWB is snapped to a carrier and both are placed into the housing so that the electronic devices are positioned within spaces of the carrier. The carrier includes sloping surfaces, so that the spring fingers are deflected downward when the cover is attached to the housing, thereby insuring that the spring fingers are properly positioned onto the electronic devices, between the spaces of the carrier.

Abstract: A packaged semiconductor device has a wiring substrate. A plurality of semiconductor device chips are connected to the wiring substrate by a use of bumps. A heat sink is bonded through a high heat conductive bonding layer to a surface of each of the semiconductor device chips. In addition, a package casing which accommodates the semiconductor device chips and the wiring substrate, has internal conductors which are positioned in the inside of the package casing. External connection pins extend outwardly from the package casing and are connected to corresponding internal conductors. The wiring substrate is connected to the internal conductors of the package casing via a flexible wiring circuit member. The flexibility of this wiring permits the thermal expansion and contraction to occur without breaking the connections to the bumps.

Abstract: A multi-layer lead frame for a semiconductor device comprises a lead frame body made of a metal strip having a first opening and a plurality of inner leads having respective innertips which define the opening. A metal plane independent from the lead frame body and adhered to the inner leads by an insulation adhesive film, has an inner periphery defining a second opening corresponding to the first opening. The inner periphery of the insulation film protrudes slightly from the inner tips of the inner leads.

Abstract: A MIC package housing that reduces or completely eliminates alumina substrate cracking due to thermal expansion rate differences between the housing and the alumina by using a low-expansion iron-nickel alloy, such as commercially available Carpenter 49, made to ASTM Specification A-753-78 (Alloy 2) and MIL-N-14411B (MR) (Composition 3 and 4). Such a housing places compressive stresses no glass-to-metal seals used in hermetic feedthroughs and the glass is fused and the stresses relieved by a special process of annealing. Manufacturing yields are improved and very large alumina substrates can be used and are attached by hard soldering.