Ii-vi Compound Patents (Class 257/78)
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Patent number: 8278656Abstract: The subject of the invention is a substrate that can be used as a substrate for the epitaxial growth of layers based on gallium nitride and comprising a support material (11, 21) coated on at least one of its faces with at least one multilayered stack comprising at least one zinc-oxide-based layer (13, 24). The substrate is coated with a semiconductor structure of III-N or II-VI type, and it is characterized in that placed between the support material (11, 21) and said at least one zinc-oxide-based layer (13, 24) is at least one intermediate layer (12, 23) comprising oxides with at least two elements chosen from tin (Sn), zinc (Zn), indium (In), gallium (Ga) and antimony (Sb).Type: GrantFiled: July 11, 2008Date of Patent: October 2, 2012Assignee: Saint-Gobain Glass FranceInventors: Eric Mattmann, Pascal Reutler, Fabien Lienhart
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Patent number: 8274078Abstract: Provided is an oxynitride semiconductor comprising a metal oxynitride. The metal oxynitride contains Zn and In and at least one element selected from the group consisting of Ga, Sn, Mg, Si, Ge, Y, Ti, Mo, W, and Al. The metal oxynitride has an atomic composition ratio of N, N/(N+O), of 7 atomic percent or more to 80 atomic percent or less.Type: GrantFiled: April 23, 2008Date of Patent: September 25, 2012Assignee: Canon Kabushiki KaishaInventors: Naho Itagaki, Tatsuya Iwasaki, Masatoshi Watanabe, Toru Den
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Patent number: 8274138Abstract: A high quality II-VI semiconductor nanowire is disclosed. A plurality of II-VI semiconductor nanowires is provided, with each being fixed to a support. Each nanowire terminates in a free end and a metal alloy nanoparticle is fixed to each nanowire at its free end.Type: GrantFiled: September 30, 2009Date of Patent: September 25, 2012Assignee: Eastman Kodak CompanyInventor: Keith B. Kahen
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Patent number: 8257999Abstract: A growth method is proposed for high quality zinc oxide comprising the following steps: (1) growing a gallium nitride layer on a sapphire substrate around a temperature of 1000° C.; (2) patterning a SiO2 mask into stripes oriented in the gallium nitride <1 100> or <11 20> direction; (3) growing epitaxial lateral overgrowth of (ELO) gallium nitride layers by controlling the facet planes via choosing the growth temperature and the reactor; (4) depositing zinc oxide films on facets ELO gallium nitride templates by chemical vapor deposition (CVD). Zinc oxide crystal of high quality with a reduced number of crystal defects can be grown on a gallium nitride template. This method can be used to fabricate zinc oxide films with low dislocation density lower than 104/cm?2, which will find important applications in future electronic and optoelectronic devices.Type: GrantFiled: May 20, 2011Date of Patent: September 4, 2012Assignee: National University of SingaporeInventors: Soo Jin Chua, Hailong Zhou, Jianyi Lin, Hui Pan
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Patent number: 8232580Abstract: A semiconductor device includes a photodiode formed using a silicon substrate, a wide-bandgap semiconductor layer formed on the silicon substrate and having a bandgap larger than that of silicon, and a switching element formed using the wide-bandgap semiconductor layer. The switching element is electrically connected to the photodiode so as to be on/off-controlled by a control signal from the photodiode.Type: GrantFiled: August 9, 2007Date of Patent: July 31, 2012Assignee: Sharp Kabushiki KaishaInventor: Yoshiaki Nozaki
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Patent number: 8193543Abstract: Light emitting systems are disclosed. The light emitting system includes an LED that emits light at a first wave-length. A primary portion of the emitted first wavelength light exits the LED from a top surface of the LED that has a minimum lateral dimension Wmin. The remaining portion of the emitted first wavelength light exits the LED from one or more sides of the LED that has a maximum edge thickness Tmax (122, 124). The ratio Wmin/Tmax is at least 30. The light emitting system further includes a re-emitting semiconductor construction that includes a semiconductor potential well. The re-emitting semiconductor construction receives the first wavelength light that exits the LED from the top surface and converts at least a portion of the received light to light of a second wavelength.Type: GrantFiled: August 18, 2009Date of Patent: June 5, 2012Assignee: 3M Innovative Properties CompanyInventors: Catherine A. Leatherdale, Michael A. Haase, Todd A. Ballen
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Patent number: 8193537Abstract: An optically active material is used to create power devices and circuits having significant performance advantages over conventional methods for affecting optical control of power electronics devices and circuits. A silicon-carbide optically active material is formed by compensating shallow donors with the boron related D-center. The resulting material can be n-type or p-type but it is distinguished from other materials by the ability to induce persistent photoconductivity in it when illuminated by electromagnetic radiation with a photon energy in excess of the threshold energy required to photoexcite electrons from the D-center to allowed states close to the conduction band edge, which varies from polytype to polytype.Type: GrantFiled: June 18, 2007Date of Patent: June 5, 2012Assignee: SS SC IP, LLCInventor: Michael S. Mazzola
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Patent number: 8174024Abstract: In one aspect, a device includes a gallium nitride (GaN) layer, a first diamond layer disposed on the GaN layer, a gate structure disposed in contact with the GaN layer and the first diamond layer, and a second diamond layer having a first thermal conductivity and disposed on a second surface of the GaN layer. The gate and the first diamond layer are disposed on a first surface of the GaN layer opposite the second surface of the GaN layer.Type: GrantFiled: June 10, 2011Date of Patent: May 8, 2012Assignee: Raytheon CompanyInventors: Ralph Korenstein, Steven D. Bernstein, Stephen J. Pereira
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Patent number: 8164101Abstract: A light-emitting device includes a light-emitting portion and an oxygen concentration control portion. The light-emitting portion includes a surface. The light-emitting portion emits light with an intensity corresponding to an oxygen concentration on the surface when receiving light energy. The oxygen concentration control portion controls the oxygen concentration on the surface of the light-emitting portion.Type: GrantFiled: August 11, 2006Date of Patent: April 24, 2012Assignee: Fuji Xerox Co., Ltd.Inventors: Takashi Morikawa, Kei Shimotani
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Patent number: 8148731Abstract: Semiconductor films and structures, such as films and structures utilizing zinc oxide or other metal oxides, and processes for forming such films and structures, are provided for use in metal oxide semiconductor light emitting devices and other metal oxide semiconductor devices, such as ZnO based semiconductor devices.Type: GrantFiled: August 28, 2007Date of Patent: April 3, 2012Assignee: Moxtronics, Inc.Inventors: Yungryel Ryu, Tae-seok Lee, Henry W. White
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Patent number: 8129717Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.Type: GrantFiled: July 29, 2009Date of Patent: March 6, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
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Patent number: 8129260Abstract: A semiconductor substrate includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is formed of II-VI-group semiconductor material, III-V-group semiconductor material, or II-VI-group semiconductor material and III-V-group semiconductor material. At least one amorphous region and at least one crystalloid region are formed in the first semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer and is crystal-grown from the at least one crystalloid region. A method of manufacturing a semiconductor substrate includes preparing a growth substrate; crystal-growing the first semiconductor layer on the growth substrate; forming the at least one amorphous region and the at least one crystalloid region in the first semiconductor layer; and forming a second semiconductor layer on the first semiconductor layer using the at least one amorphous region as a mask and the at least one crystalloid region as a seed.Type: GrantFiled: May 24, 2007Date of Patent: March 6, 2012Assignee: Samsung LED Co., Ltd.Inventors: Ho-sun Paek, Youn-joon Sung, Kyoung-ho Ha, Joong-kon Son, Sung-nam Lee
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Patent number: 8119513Abstract: A method for making a cadmium sulfide layer is provided. The method includes a number of steps including providing a substrate and disposing a layer containing cadmium on the substrate followed by sulfurization of the cadmium-containing layer.Type: GrantFiled: November 22, 2010Date of Patent: February 21, 2012Assignee: General Electric CompanyInventors: Bastiaan Arie Korevaar, Scott Feldman-Peabody, Robert Dwayne Gossman
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Patent number: 8097885Abstract: Provided are a compound semiconductor film which is manufactured at a low temperature and exhibits excellent p-type conductivity, and a light emitting film in which the compound semiconductor film and a light emitting material are laminated and with which high-intensity light emission can be realized. The compound semiconductor film has a composition represented by a Cu2—Zn—IV—S4 type, in which the IV is at least one of Ge and Si. The light emitting film includes the light emitting material and the compound semiconductor film laminated on a substrate in the stated order.Type: GrantFiled: May 27, 2008Date of Patent: January 17, 2012Assignee: Canon Kabushiki KaishaInventors: Tomoyuki Oike, Tatsuya Iwasaki
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Patent number: 8097886Abstract: An organic electroluminescence device which can prevent the deterioration thereof attributed to moisture by preventing a desiccant from influencing organic electroluminescence elements is provided. The organic electroluminescence device includes: first and second substrates which are arranged to face each other in an opposed manner with a gap therebetween; organic electroluminescence elements which are formed on a first surface of the first substrate which faces the second substrate in an opposed manner; a desiccant which is formed on a second surface of the second substrate which faces the first substrate in an opposed manner; and a resin which is adhered to the first and second surfaces and covers the desiccant and the organic electroluminescence elements.Type: GrantFiled: October 23, 2009Date of Patent: January 17, 2012Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Satoru Kase, Yoshinori Ishii, Eiji Matsuzaki
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Patent number: 8093095Abstract: Device and method of forming a device in which a substrate (10) is fabricated with at least part of an electronic circuit for processing signals. A bulk single crystal material (14) is formed on the substrate, either directly on the substrate (10) or with an intervening thin film layer or transition region (12). A particular application of the device is for a radiation detector.Type: GrantFiled: December 21, 2006Date of Patent: January 10, 2012Assignee: Kromek LimitedInventors: Arnab Basu, Max Robinson, Ben Cantwell, Andy Brinkman
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Patent number: 8093589Abstract: In a thin film transistor (1), a gate insulating layer (4) is formed on a gate electrode (3) formed on an insulating substrate (2). Formed on the gate insulating layer (4) is a semiconductor layer (5). Formed on the semiconductor layer (5) are a source electrode (6) and a drain electrode (7). A protective layer (8) covers them, so that the semiconductor layer (5) is blocked from an atmosphere. The semiconductor layer (5) (active layer) is made of, e.g., a semiconductor containing polycrystalline ZnO to which, e.g., a group V element is added. This allows practical use of a semiconductor device which has an active layer made of zinc oxide and which includes an protective layer for blocking the active layer from an atmosphere.Type: GrantFiled: June 14, 2004Date of Patent: January 10, 2012Assignees: Sharp Kabushiki KaishaInventors: Toshinori Sugihara, Hideo Ohno, Masashi Kawasaki
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Patent number: 8093671Abstract: Device and method of forming a device in which a substrate (10) is fabricated with at least part of an electronic circuit for processing signals. A bulk single crystal material (14) is formed on the substrate, either directly on the substrate (10) or with an intervening thin film layer or transition region (12). A particular application of the device is for a radiation detector.Type: GrantFiled: September 13, 2010Date of Patent: January 10, 2012Assignee: Kromek LimitedInventors: Arnab Basu, Max Robinson, Benjamin John Cantwell, Andy Brinkman
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Patent number: 8080824Abstract: A semiconductor material structure includes at least one region capable of generating electrons and holes each having an associated mean kinetic energy during operation. A material layer in proximity to the region provides an associated potential energy larger than the mean kinetic energy associated with the generated electrons and the mean kinetic energy associated with the holes.Type: GrantFiled: November 15, 2006Date of Patent: December 20, 2011Assignee: Academia SinicaInventors: Kuei-Hsien Chen, Chien-Hung Lin, Chia-Wen Hsu, Li-Chyong Chen
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Patent number: 8076677Abstract: A semiconductor light emitting device includes a semiconductor light emitting element, a lead electrically connected to the semiconductor light emitting element, and a resin package covering the semiconductor light emitting element and part of the lead. The resin package includes a lens facing the semiconductor light emitting element. The lead includes an exposed portion that is not covered by the resin package. The exposed portion includes a first portion and a second portion, where the first portion has a first mount surface oriented backward along the optical axis of the lens, and the second portion has a second mount surface oriented perpendicularly to the optical axis of the lens.Type: GrantFiled: December 7, 2010Date of Patent: December 13, 2011Assignee: Rohm Co., Ltd.Inventors: Yasunori Hata, Masahiko Kobayakawa
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Patent number: 8071482Abstract: A manufacturing method for a silicon carbide semiconductor device is disclosed. It includes an etching method in which an Al film and Ni film are laid on an SiC wafer in this order and wet-etched, whereby a two-layer etching mask is formed in which Ni film portions overhang Al film portions. Mesa grooves are formed by dry etching by using this etching mask.Type: GrantFiled: May 20, 2008Date of Patent: December 6, 2011Assignee: Fuji Electric Co., Ltd.Inventor: Yasuyuki Kawada
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Publication number: 20110269261Abstract: Methods for protecting a cadmium sulfide layer on a substrate are provided. The method can include sputtering a cadmium sulfide layer onto a substrate from a cadmium sulfide target at a sputtering pressure (e.g., about 10 mTorr to about 150 mTorr), and sputtering a cap layer directly on the cadmium sulfide layer. The cap layer can be sputtered directly onto the cadmium sulfide layer without breaking vacuum of the sputtering pressure. Methods are also provided for manufacturing a cadmium telluride based thin film photovoltaic device through depositing a cadmium sulfide layer on a substrate, depositing a cap layer directly on the cadmium sulfide layer, heating the substrate to sublimate at least a portion of the cap layer from the cadmium sulfide layer, and then depositing a cadmium telluride layer on the cadmium sulfide layer. An intermediate substrate for forming a cadmium telluride based thin-film photovoltaic device is also provided.Type: ApplicationFiled: April 30, 2010Publication date: November 3, 2011Applicant: PRIMESTAR SOLAR, INC.Inventors: Jennifer Ann Drayton, Richard Ernest Demaray
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Patent number: 8049225Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.Type: GrantFiled: August 5, 2009Date of Patent: November 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Akiharu Miyanaga, Kengo Akimoto, Kojiro Shiraishi
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Patent number: 8030663Abstract: A semiconductor device including thin film transistors having high electrical properties and reliability is proposed. Further, a method for manufacturing the semiconductor devices with mass productivity is proposed. The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity.Type: GrantFiled: August 5, 2009Date of Patent: October 4, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
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Patent number: 8013323Abstract: A P-type nitride semiconductor and a method for manufacturing the same are provided. A nitride semiconductor includes a P-type nitride layer formed on a active layer, wherein the P-type nitride layer is a P-type nitride layer with the group 4 element doped.Type: GrantFiled: December 4, 2009Date of Patent: September 6, 2011Assignee: LG Innotek Co., Ltd.Inventor: Sung Chul Choi
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Patent number: 8008694Abstract: A light source with enhanced brightness includes an angle-selective optical filter and a light emitting diode (LED) having a high reflective layer. The angle-selective filter is located on the top surface of emitting diode to pass lights at specified angles. According to one embodiment, the angle-selective filter includes index-alternating layers. With a reflective polarizer, the light source can produce polarized light with enhanced brightness.Type: GrantFiled: September 22, 2007Date of Patent: August 30, 2011Assignee: YLX, Ltd.Inventors: Li Xu, Yi Li
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Patent number: 7999346Abstract: A semiconductor device provided with a silicon carbide semiconductor substrate, and an ohmic metal layer joined to one surface of the silicon carbide semiconductor substrate in an ohmic contact and composed of a metal material whose silicide formation free energy and carbide formation free energy respectively take negative values. The ohmic metal layer is composed of, for example, a metal material such as molybdenum, titanium, chromium, manganese, zirconium, tantalum, or tungsten.Type: GrantFiled: June 17, 2010Date of Patent: August 16, 2011Assignee: Rohm Co., Ltd.Inventors: Yuji Okamura, Masashi Matsushita
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Patent number: 7989237Abstract: Silicon substrates are applied to the package structure of solid-state lighting devices. Wet etching is performed to both top and bottom surfaces of the silicon substrate to form reflecting cavity and electrode access holes. Materials of the reflecting layer and electrode can be different from each other whose preferred materials can be chosen in accordance with a correspondent function. Formation of the electrode can be patterned by an etching method or a lift-off method.Type: GrantFiled: September 25, 2008Date of Patent: August 2, 2011Assignee: Advances Optoelectronic Technology, Inc.Inventors: Wen Liang Tseng, Lung Hsin Chen
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Patent number: 7989261Abstract: In one aspect, a method includes fabricating a device. The device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer. In another aspect, a device includes a gallium nitride (GaN) layer, a diamond layer disposed on the GaN layer and a gate structure disposed in contact with the GaN layer and the diamond layer.Type: GrantFiled: December 22, 2008Date of Patent: August 2, 2011Assignee: Raytheon CompanyInventors: Ralph Korenstein, Steven D. Bernstein, Stephen J. Pereira
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Patent number: 7972931Abstract: The present invention relates to a method of manufacturing thin-film transistors using nanoparticles and thin film transistors manufactured by the method. A hydrophilic buffer layers are deposited on the substrates to facilitate formation of nanoparticle films. Sintered nanoparticles are used as an active layer and dielectric materials of high dielectric coefficient are also used as a gate dielectric layer to form a top gate electrode on the gate dielectric layer, thereby enabling low-voltage operation and low-temperature fabrication.Type: GrantFiled: January 17, 2007Date of Patent: July 5, 2011Assignee: Korea University Industrial & Academic Collaboration FoundationInventors: Sangsig Kim, Kyoung-Ah Cho, Dong-Won Kim, Jae-Won Jang
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Publication number: 20110140129Abstract: Light emitting systems are disclosed. The light emitting system includes an LED that emits light at a first wavelength and includes a pattern that enhances emission of light from a top surface of the LED and suppresses emission of light from one or more sides of the LED. The light emitting system further includes a re-emitting semiconductor construction that includes a II-VI potential well. The re-emitting semiconductor construction receives the first wavelength light that exits the LED and converts at least a portion of the received light to light of a second wavelength. The integrated emission intensity of all light at the second wavelength that exit the light emitting system is at least 4 times the integrated emission intensity of all light at the first wavelength that exit the light emitting system.Type: ApplicationFiled: August 18, 2009Publication date: June 16, 2011Inventors: Catherine A. Leatherdale, Todd A. Ballen, Thomas J. Miller
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Publication number: 20110140128Abstract: Light emitting systems are disclosed. The light emitting system includes an LED that emits light at a first wave-length. A primary portion of the emitted first wavelength light exits the LED from a top surface of the LED that has a minimum lateral dimension Wmin. The remaining portion of the emitted first wavelength light exits the LED from one or more sides of the LED that has a maximum edge thickness Tmax (122, 124). The ratio Wmin/Tmax is at least 30. The light emitting system further includes a re-emitting semiconductor construction that includes a semiconductor potential well. The re-emitting semiconductor construction receives the first wavelength light that exits the LED from the top surface and converts at least a portion of the received light to light of a second wavelength.Type: ApplicationFiled: August 18, 2009Publication date: June 16, 2011Inventors: Catherine A. Leatherdale, Michael A. Haase, Todd A. Ballen
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Patent number: 7956360Abstract: A method of growing highly planar, fully transparent and specular m-plane gallium nitride (GaN) films. The method provides for a significant reduction in structural defect densities via a lateral overgrowth technique. High quality, uniform, thick m-plane GaN films are produced for use as substrates for polarization-free device growth.Type: GrantFiled: April 6, 2007Date of Patent: June 7, 2011Assignees: The Regents of the University of California, Japan Science and Technology AgencyInventors: Benjamin A. Haskell, Melvin B. McLaurin, Steven P. DenBaars, James Stephen Speck, Shuji Nakamura
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Patent number: 7951639Abstract: A growth method is proposed for high quality zinc oxide comprising the following steps: (1) growing a gallium nitride layer on a sapphire substrate around a temperature of 1000° C.; (2) patterning a SiO2 mask into stripes oriented in the gallium nitride <1 100> or <11 20> direction; (3) growing epitaxial lateral overgrowth of (ELO) gallium nitride layers by controlling the facet planes via choosing the growth temperature and the reactor; (4) depositing zinc oxide films on facets ELO gallium nitride templates by chemical vapor deposition (CVD). Zinc oxide crystal of high quality with a reduced number of crystal defects can be grown on a gallium nitride template. This method can be used to fabricate zinc oxide films with low dislocation density lower than 104/cm?2, which will find important applications in future electronic and optoelectronic devices.Type: GrantFiled: October 24, 2008Date of Patent: May 31, 2011Assignee: National University of SingaporeInventors: Soon Jin Chua, Hailong Zhou, Jianyi Lin, Hui Pan
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Publication number: 20110121319Abstract: Light emitting devices and methods of fabricating the same are disclosed. The light emitting device includes a light emitting diode (LED) that emits blue or UV light and is attached to a semiconductor construction. The semiconductor construction includes a re-emitting semiconductor construction that includes at least one layer of a II-VI compound and converts at least a portion of the emitted blue or UV light to longer wavelength light. The semiconductor construction further includes an etch-stop construction that includes an AlInAs or a GaInAs compound. The etch-stop is capable of withstanding an etchant that is capable of etching InP.Type: ApplicationFiled: November 7, 2008Publication date: May 26, 2011Inventors: Michael A. Haase, Thomas J. Miller, Xiaoguang Sun
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Patent number: 7947999Abstract: A luminescent device including a die pad lead composed of an inner lead and an outer lead, a case for uniting the inner lead, a light emitting diode chip mounted on a first predetermined position of one main surface of the inner lead, and a transparent sealing material portion for sealing the light emitting diode chip and a part of the one main surface. The case seals the inner lead other than an area sealed by the transparent sealing material portion, and the inner lead of the die pad lead has bending portions at least two places including a first bending portion and a second bending portion. A rear of the first predetermined position in the inner lead of the die pad lead is exposed outside the case, and the second bending portion is formed in the case so that the outer lead extends from a side of the case.Type: GrantFiled: December 26, 2006Date of Patent: May 24, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Taizo Tomioka, Takahiro Suzuki, Hiroyuki Tokubo, Yukinori Aoki
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Patent number: 7915747Abstract: A substrate for forming a semiconductor layer includes a plurality of linear convexes or grooves on a surface of the substrate by crystal growth. The plurality of linear convexes or grooves are formed along a direction of a cleavage plane of the semiconductor layer.Type: GrantFiled: June 27, 2006Date of Patent: March 29, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Keiichi Matsushita
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Patent number: 7915606Abstract: A semiconductor light emitting device including a substrate including a plurality of discrete and separated protruding reflective patterns protruding from the substrate and including a valley; a first semiconductor layer on the substrate and covering the reflective patterns; a gap formed in the valley of a corresponding reflective pattern between the substrate and the first semiconductor layer; an active layer on the first semiconductor layer; and a second semiconductor layer on the active layer.Type: GrantFiled: April 27, 2010Date of Patent: March 29, 2011Assignee: LG Electronics Inc.Inventors: Bum Chul Cho, Seung Hyun Yang
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Patent number: 7915149Abstract: There is disclosed a method for forming a gallium nitride layer of which resistivity is 1×106 ?·cm or more, including steps of: forming a gallium nitride layer containing iron on a substrate; and heating said gallium nitride layer formed on said substrate.Type: GrantFiled: June 10, 2008Date of Patent: March 29, 2011Assignee: Sumitomo Electric Industries, Ltd.Inventors: Seiji Nakahata, Fumitaka Sato, Yoshiki Miura, Akinori Koukitu, Yoshinao Kumagai
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Patent number: 7897976Abstract: The invention of this application is a field-effect transistor type light-emitting device having an electron injection electrode, i.e. a source electrode, a hole injection electrode, i.e. a drain electrode, an emission active member disposed between the source electrode and the drain electrode so as to contact with both electrodes, and a field application electrode, i.e. a gate electrode, for inducing electrons and holes in the emission active member, which is disposed in the vicinity of the emission active member via an electrically insulating member or an insulation gap. The emission active member is made of an inorganic semiconductor material having both an electron transporting property and a hole transporting property.Type: GrantFiled: February 18, 2003Date of Patent: March 1, 2011Assignee: Hoya CorporationInventors: Hiroshi Kawazoe, Satoshi Kobayashi, Yuki Tani, Hiroaki Yanagita
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Patent number: 7880175Abstract: Disclosed herein is an ultraviolet (UV) light-blocking composition comprising a metal nanoparticle that absorbs and blocks a UV light wavelength using a surface plasmon-absorbing wavelength, and a dielectric. The UV light-blocking composition is capable of absorbing and blocking a UV light wavelength or, a specific wavelength, using the surface plasmon-absorbing wavelength of the metal nanoparticle or, the plasmon-absorbing wavelength transited by the dielectric, thereby demonstrating increased visibility when applied to an image display apparatus such as a mobile phone, and the like.Type: GrantFiled: November 13, 2007Date of Patent: February 1, 2011Assignee: Samsung Advanced Institute of TechnologyInventors: Hyeon Jin Shin, Jae Young Choi, In Yong Song, Dong Kee Yi, Seong Jae Choi, Seon Mi Yoon
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Patent number: 7868334Abstract: A semiconductor light emitting device includes a semiconductor light emitting element, a lead electrically connected to the semiconductor light emitting element, and a resin package covering the semiconductor light emitting element and part of the lead. The resin package includes a lens facing the semiconductor light emitting element. The lead includes an exposed portion that is not covered by the resin package. The exposed portion includes a first portion and a second portion, where the first portion has a first mount surface oriented backward along the optical axis of the lens, and the second portion has a second mount surface oriented perpendicularly to the optical axis of the lens.Type: GrantFiled: April 8, 2008Date of Patent: January 11, 2011Assignee: Rohm Co., Ltd.Inventors: Yasunori Hata, Masahiko Kobayakawa
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Patent number: 7847297Abstract: An ohmic contact in accordance with the invention includes a layer of p-type GaN-based material. A first layer of a group II-VI compound semiconductor is located adjacent to the layer of p-type GaN-based material. The ohmic contact further includes a metal layer that provides metal contact. A second layer of a different II-VI compound semiconductor is located adjacent to the metal layer.Type: GrantFiled: January 20, 2009Date of Patent: December 7, 2010Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.Inventors: Jeffrey N Miller, David P Bour, Virginia M Robbins, Steven D Lester
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Patent number: 7834343Abstract: A P-type nitride semiconductor and a method for manufacturing the same are provided. A nitride semiconductor includes a P-type nitride layer formed on a active layer, wherein the P-type nitride layer is a P-type nitride layer with the group 4 element doped.Type: GrantFiled: October 5, 2006Date of Patent: November 16, 2010Assignee: LG Innotek Co., Ltd.Inventor: Sung Chul Choi
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Patent number: 7821015Abstract: A method of making a semi-insulating epitaxial layer includes implanting a substrate or a first epitaxial layer formed on the substrate with boron ions to form a boron implanted region on a surface of the substrate or on a surface of the first epitaxial layer, and growing a second epitaxial layer on the boron implanted region of the substrate or on the boron implanted region of the first epitaxial layer to form a semi-insulating epitaxial layer.Type: GrantFiled: June 18, 2007Date of Patent: October 26, 2010Assignee: SemiSouth Laboratories, Inc.Inventor: Michael S. Mazzola
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Patent number: 7803669Abstract: An organic thin film transistor substrate includes a gate line formed on a substrate, a data line intersecting the gate line and defining a subpixel area, an organic thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode facing the source electrode, and an organic semiconductor layer forming a channel between the source and drain electrodes, a passivation layer parallel with the gate line, for covering the organic semiconductor layer and peripheral regions of the organic semiconductor layer, and a bank insulating layer for determining the position of the organic semiconductor layer and the passivation layer.Type: GrantFiled: June 21, 2007Date of Patent: September 28, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Seung Hwan Cho, Bo Sung Kim, Keun Kyu Song
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Patent number: 7700959Abstract: A semiconductor light-emitting device capable of obtaining a high light reflectance through the use of a high-reflection metal layer formed on the side of an electrode on one side and capable of preventing migration of atoms from the high-reflectance metal layer is provided. Semiconductor layers of the opposite conduction types are formed on the opposite sides of an active layer, and an ohmic contact layer being a thin film for contriving a decrease in contact resistance, a transparent and conductive layer, and a high-reflection metal layer for reflecting light generated in the active layer are sequentially layered on one of the semiconductor layers. Since the transparent conductive layer functions also as a barrier layer and it transmits light, a high light take-out efficiency can be obtained through the reflection at the high-reflectance metal layer.Type: GrantFiled: March 31, 2005Date of Patent: April 20, 2010Assignee: Sony CorporationInventors: Jun Suzuki, Masato Doi, Hiroyuki Okuyama, Goshi Biwa
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Patent number: 7696073Abstract: The present invention relates to a method for producing an n-type ZnTe system compound semiconductor single crystal having high carrier concentration and low resistivity, the ZnTe system compound semiconductor single crystal, and a semiconductor device produced by using the ZnTe system compound semiconductor as a base member. Concretely, a first dopant and a second dopant are co-doped into the ZnTe system compound semiconductor single crystal so that the number of atoms of the second dopant becomes smaller than the number of atoms of the first dopant, the first dopant being for controlling a conductivity type of the ZnTe system compound semiconductor to a first conductivity type, and the second dopant being for controlling the conductivity type to a second conductivity type different from the first conductivity type. By the present invention, a desired carrier concentration can be achieved with a doping amount smaller than in earlier technology, and crystallinity of the obtained crystal can be improved.Type: GrantFiled: November 26, 2007Date of Patent: April 13, 2010Assignee: Nippon Mining & Metals Co., Ltd.Inventors: Tetsuya Yamamoto, Atsutoshi Arakawa, Kenji Sato, Toshiaki Asahi
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Publication number: 20100084664Abstract: A semiconductor structure includes a substrate which may be formed from a ZnS single crystal of wurtzite (2H) structure with a predetermined crystal orientation, and which has a first surface and a second surface. The structure includes a layer of a group III-nitride crystalline material deposited as an epitaxial layer on the first surface of the substrate. In one embodiment, the group III-nitride deposit is epitaxially grown using a MOCVD (or MOVPE) technique or a HVPE technique or a combination thereof. There may be a mask and/or a buffer layer on the first surface and/or a protective layer on the second surface.Type: ApplicationFiled: October 6, 2009Publication date: April 8, 2010Applicant: FAIRFIELD CRYSTAL TECHNOLOGY, LLCInventor: Shaoping Wang
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Patent number: RE42770Abstract: A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.Type: GrantFiled: October 28, 2010Date of Patent: October 4, 2011Assignee: Nichia CorporationInventors: Hiroyuki Kiyoku, Shuji Nakamura, Tokuya Kozaki, Naruhito Iwasa, Kazuyuki Chocho