Abstract: Ions are implanted to the n-type or p-type semiconductor layers of a semiconductor element, which includes a semiconductor having a multilayer structure on a substrate, a metal electrode on one entire surface of the semiconductor and a metal section partially formed on the metal electrode, in an amount from 10.sup.12 ions/cm.sup.2 to 10.sup.18 ions/cm.sup.2, thus forming an insulating layer in the n-type or p-type semiconductor layers.

Abstract: Only the areas of the CdTe/HgCdTe interface of a FPA detector circuit which is coupled by an epoxy to a silicon-based integrated circuit that require interdiffusing are heated to a sufficiently high temperature or have photons of light impinging thereon for a sufficient time to cause interdiffusion of the two layers by the travel of tellurium into the HgCdTe and the travel of mercury into the CdTe. The vast majority of the wafer is masked with an aluminum thin film to greatly reduce heat gain or photon transmission. An advantage of the process in accordance with the present invention is that only a very small fraction of the HgCdTe/epoxy/silicon-based integrated circuit wafer receives incoming energy during interdiffusion whereby problems caused by the differences in coefficient of thermal expansion between silicon and HgCdTe at the epoxy interface are minimized.

Abstract: A double diamond mesa vertical field effect transistor includes a diamond layer, a first diamond mesa on a diamond layer, and a second diamond mesa on the first diamond mesa, opposite the diamond layer. A source contact is formed on the second diamond mesa, opposite the first diamond mesa, and a gate is formed on the first diamond mesa opposite the diamond layer. The drain contact may be formed on the diamond layer adjacent the first diamond mesa, or the diamond layer itself may be formed on a nondiamond substrate and a drain contact may be provided on the nondiamond substrate. An integrated array of field effect transistors may be formed, including a plurality of second mesas on the first mesa, with a plurality of gates formed on the first mesa between the second mesas and a source formed on each second mesa, opposite the first mesa. The second mesas may also extend over the multiple gate contacts on the first mesa to form a common source region with a common source contact.

Abstract: A light emitting semiconductor heterojunction includes a first layer of n-type semiconducting material comprising a Group II-VI material, and a second layer of p-type semiconducting diamond on the first layer. Preferably the Group II-VI material includes a Group II material selected from the group consisting of zinc and cadmium, and the Group VI material is selected from the group consisting of sulfur and selenium. The light emitting heterojunction will produce light having a wavelength in the range of about 440-550 nanometers, depending on the composition and the temperature of operation. One embodiment of the device is a surface emitting device and includes a contact layer on the diamond layer having a predetermined shape, such as a ring, overlying only a portion of the diamond layer for permitting surface emission of light from diamond layer.

Abstract: There is disclosed a tensile strained blue-green II-VI quantum well laser. The tensile strained blue-green II-VI quantum well laser comprises of a semiconductor substrate; a buffer layer formed on the semiconductor substrate; a first ZnSe cladding layer formed on the buffer layer; a multi-quantum well layer formed on the first ZnSe cladding layer, consisting of a ZnS.sub.y Se.sub.1-y active region and a Mg.sub.z Zn.sub.1-z S.sub.w Se.sub.1-w barrier region; a current-restricting layer formed on the multi-quantum well layer; a second ZnSe cladding layer formed on the current-restricting layer; and a cap layer formed on the second ZnSe cladding layer. The inventive tensile strained blue-green II-VI quantum well laser is capable of reducing the oscillation wavelength into not more than 500 nm at room temperature and of lowering the threshold current density to as low as 1,000 A/cm.sup.2.

Abstract: A ferroelectrics device includes a semiconductor substrate having a diamond structure or zinc blend structure, and a ferroelectric compound film formed on the semiconductor substrate by selective epitaxial growth. The ferroelectric compound film is made of a mixed crystal of at least three components in groups II and VI and has the same structure as the semiconductor substrate.

Abstract: A thin film single crystal substrate useful in the production of a semiconductor, comprising a base substrate made of single crystal diamond and at least one thin film of a single crystal of a material selected from the group consisting of silicon carbide, silicon, boron nitride, gallium nitride, indium nitride, aluminum nitride, boron phosphide, cadmium selenide, germanium, gallium arsenide, gallium phosphide, indium phosphide, gallium antimonide, indium arsenide, indium antimonide, aluminum phosphide, aluminum arsenide, aluminum antimonide, cadmium telluride, mercury sulfide, zinc oxide, zinc sulfide, zinc selenide and zinc telluride, and optionally an intermediate layer between the base substrate and the thin film of single crystal, which optionally comprises an intermediate layer between the base substrate and the thin film of single crystal.

Abstract: A semiconductor blue-green light emitting device in a double heterostructure configuration includes a light emitting layer, a p-type clad layer and an n-type clad layer sandwiching the light emitting layer, a cap layer and a contact layer in this sequence formed on the clad layer. The light emitting layer contains at least one of CdZnSe, ZnSSe, and ZnSe, each of the p-type clad layer and the n-type clad layer contains at least one of ZnSSe, ZnSe and ZnMgSSe, the cap layer is of (Al.sub.X Ga.sub.1-X).sub.0.5 In.sub.0.5 P (0.ltoreq.X.ltoreq.1), and the contact layer is of Al.sub.X Ga.sub.1-X As (0.ltoreq.X.ltoreq.1). The diode provided is with improved ohmic characteristics.

Abstract: An ohmic contact to a p-type zinc selenide (ZnSe) layer in a Group II-VI semiconductor device, includes a zinc telluride selenide (ZnTe.sub.x Se.sub.1-x) layer on the zinc selenide layer, a mercury selenide (HgSe) layer on the zinc telluride selenide layer and a conductor (such as metal) layer on the mercury selenide layer. The zinc telluride selenide and mercury selenide layers between the p-type zinc selenide and the conductor layer provide an ohmic contact by eliminating the band offset between the wide bandgap zinc selenide and the conductor. Step graded, linear graded, and parabolic graded layers of zinc telluride selenide may be provided. An integrated heterostructure is formed by epitaxially depositing the ohmic contact on the Group II-VI device. A removable overcoat layer may be formed on the Group II-VI device to allow room temperature atmospheric pressure transfer of the device from a zinc based deposition chamber to a mercury based deposition chamber, for deposition of the ohmic contact.

Abstract: A blue-green II/VI semiconductor injection laser utilizing a Zn.sub.1-u Cd.sub.u Se active layer (quantum well) having Zn.sub.1-x Mg.sub.x S.sub.y Se.sub.1-y cladding layers and ZnS.sub.z Se.sub.1-z guiding layers on a GaAs substrate. These devices are operable in a pulse mode at room temperature.

Abstract: A process for selective formation of a II-VI group compound film comprises applying a compound film forming treatment, in a gas phase including a starting material for supplying the group II atoms of periodic table and a starting material for supplying the group VI atoms of periodic table, on a substrate having a non-nucleation surface (S.sub.NDS) with small nucleation density and a nucleation surface (S.sub.NDL) with larger nucleation density (ND.sub.L) than the nucleation density (ND.sub.S) of said non-nucleation surface (S.sub.NDS) and a large area sufficient for a number of nuclei to be formed and forming selectively a II-VI group compound film only on said nucleation surface (S.sub.NDL).

Abstract: An article of manufacture having an epitaxial (111) magnesium oxide (MgO) layer, suitable for use as a buffer layer, on a (111) surface of a tetrahedral semiconductor substrate, and method for its manufacture is described. The article may further include an epitaxial oxide overlayer on the (111) MgO layer. The overlayer may be a conducting, superconducting, and/or ferroelectric oxide layer. The method of producing the epitaxial (111) magnesium oxide (MgO) layer on the (111) surface of a tetrahedral semiconductor substrate proceeds at low temperature. The method may further include steps for forming the epitaxial oxide layer on the (111) MgO layer. The methods include the steps of preparing the (111) surface of a tetrahedral semiconductor substrate for deposition and the low temperature depositing of an MgO layer on the prepared surface. Further steps may include the depositing of the oxide layer over the MgO layer.

Abstract: A hetero crystalline structure consisting of semiconductor materials of a zincblende-structure and wurtzite-structure. For example, formed on a semiconductor substrate having a crystal face of (100) of the zincblende structure is a semiconductor material of the wurtzite-structure in its bulk state as a film of the same zincblende-structure as the semiconductor substrate.

Abstract: An ohmic contact to a p-type zinc selenide (ZnSe) layer in a Group II-VI semiconductor device, includes a zinc telluride selenide (ZnTe.sub.x Se.sub.1-x) layer on the zinc selenide layer, a mercury selenide (HgSe) layer on the zinc telluride selenide layer and a conductor (such as metal) layer on the mercury selenide layer. The zinc telluride selenide and mercury selenide layers between the p-type zinc selenide and the conductor layer provide an ohmic contact by eliminating the band offset between the wide bandgap zinc selenide and the conductor. Step graded, linear graded, and parabolic graded layers of zinc telluride selenide may be provided. An integrated heterostructure is formed by epitaxially depositing the ohmic contact on the Group II-VI device. A removable overcoat layer may be formed on the Group II-VI device to allow room temperature atmospheric pressure transfer of the device from a zinc based deposition chamber to a mercury based deposition chamber, for deposition of the ohmic contact.

Abstract: A semiconductor structure with a p-type ZnSe layer has an improved ohmic contact consisting of a layer of Hg.sub.x Zn.sub.1-x Te.sub.a Se.sub.b Sc where x=0-1 with x being 0 at the surface of the ZnSe layer and increasing thereafter, a, b and c each =0-1 and a+b+c=1.

Abstract: A semiconductor laser comprising an active layer in which a biaxial compressive strain is generated, to improve an optical gain. The semiconductor laser has a double-heterostructure comprising an active layer of a (Cd,S)Zn(Se,Te) compound, a pair of cladding layers formed beneath and over the active layer and made of a Zn(Se,Te) compound, and a pair of strained layers formed among the active layer and the cladding layers and made of a (Cd,S)Zn(Se,Te) compound. The strained layers is comprised of a Group II-VI compound semiconductor having lattice constants smaller than and band gaps larger than those of the active layer so that a biaxial compressive strain is induced in the active layer, thereby enabling the optical gain to be improved. It is possible to provide semiconductor lasers which can be practically used at a room temperature.

Abstract: Disclosed is a new method suitable for making highly integrated quantum wire arrays, quantum dot arrays in a single crystal compound semiconductor and FETs of less than 0.1 micron gate length. This makes it possible to construct a high-performance electronic device with high speed and low power consumption, using a combination of low-temperature-growth molecular beam epitaxy (LTG-MBE) and focused ion beam (FIB) implantation. The compound semiconductor (GaAs) epitaxial layers, which are made by LTG-MBE, are used as targets of Ga FIB implantation to make Ga wire or dot arrays. Precipitation of arsenic microcrystals, which are initially embedded in a single crystal GaAs layer and act as Schottky barriers, are typically observed in an LTG GaAs layer. A thermal annealing process, after implantation, changes the arsenic microcrystals to GaAs crystals if the arsenic microcrystals are in the region in which the Ga ions are implanted.

Abstract: A semiconductor light emitting element with a high light-emitting efficiency, which is constituted in such a way that, of the composition of its GaN and AlN epitaxial layer, part of N is substituted by P, thus ensuring good lattice-matching with the substrate crystal, ZnO.

Abstract: A thin-film electroluminescence device has transparent electrodes formed on a transparent substrate, a lower dielectric layer formed on the substrate having the transparent electrodes, a luminescent layer formed on the lower dielectric layer, an upper dielectric layer formed on the luminescent layer, and back electrodes formed on the upper dielectric layer. At least one of the upper and lower dielectric layers includes a SiN:H film formed in contact with the luminescent layer by a plasma chemical vapor deposition method. The SiN:H film contains N--H bonds of 1.2.times.10.sup.22 /cm.sup.3 or less to control an amount of change in emission-start voltage to 30 V or less.

Abstract: Disclosed are a gallium nitride type semiconductor device that has a single crystal of (Ga.sub.l-x Al.sub.x).sub.l-y In.sub.y N, which suppresses the occurrence of crystal defects and thus has very high crystallization and considerably excellent flatness, and a method of fabricating the same. The gallium nitride type semiconductor device comprises a silicon substrate, an intermediate layer consisting of a compound containing at least aluminum and nitrogen and formed on the silicon substrate, and a crystal layer of (Ga.sub.l-x Al.sub.x).sub.l-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, excluding the case of x=1 and y=0). According to the method of fabricating a gallium nitride base semiconductor device, a silicon single crystal substrate is kept at a temperature of 400 to 1300.degree. C.

Abstract: An electroluminescence device is constituted by sequentially stacking a glass substrate, a transparent electrode, a luminescent layer, an interlayer containing a semiconductor having a band gap of 2.4 eV or more, a current-limiting layer containing a conductive powder, and a backplate.

Abstract: A semiconductor light emitting device has an epitaxial layer of which lattice match with a substrate crystal is made. The epitaxial layer is formed of mixed crystals of a plurality of Group III-V compound semiconductors on the substrate formed of a crystal of ZnO. More particularly, the expitaxial layer is formed of:Al.sub.x Ga.sub.1-X-Y In.sub.Y N (0.ltoreq.X<1, 0<Y<1)where Ga of a semiconductor, GaN, is partially replaced with In or a combination of In and Al. As a result, an epitaxial layer of mixed crystals of GaInN or AlGaInN series is grown on the substrate. Also, the epitaxial layer is formed of:Al.sub.p Ga.sub.1-p-q In.sub.q N (0.ltoreq.p<1, 0<q<1) andAl.sub.x Ga.sub.1-x N.sub.1-y P.sub.y (0.ltoreq.X.ltoreq.1, 0<Y<1)where Ga of a semiconductor, GaN, is partially replaced with In or Al, or N is partially is replaced with P.

Abstract: Disclosed is a new method suitable for making highly integrated quantum wire arrays, quantum dot arrays in a single crystal compound semiconductor and FETs of less than 0.1 micron gate length. This makes it possible to construct a high-performance electronic device with high speed and low power consumption, using a combination of low-temperature-growth molecular beam epitaxy (LTG-MBE) and focused ion beam (FIB) implantation. The compound semiconductor (GaAs) epitaxial layers, which are made by LTG-MBE, are used as targets of Ga FIB implantation to make Ga wire or dot arrays. Precipitation of arsenic microcrystals, which are initially embedded in a single crystal GaAs layer and act as Schottky barriers, are typically observed in an LTG GaAs layer. A thermal annealing process, after implantation, changes the arsenic microcrystals to GaAs crystals if the arsenic microcrystals are in the region in which the Ga ions are implanted.