Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).

Abstract: A nitride based semiconductor light emitting element includes at least a gallium nitride based compound semiconductor layer of a first conductivity type and a gallium nitride based compound semiconductor layer of a second conductivity type stacked on a substrate. On a main region of the top surface of the semiconductor layer of the second conductivity type, a Pd-containing electrode is formed, and the top surface and side surfaces of the Pd-containing electrode as well as the surface of the semiconductor layer of the second conductivity type in a region of at least a prescribed width from the side surfaces are covered by a conductive shielding film to be shielded from the atmosphere or a mold resin.

Abstract: A thermal management system or method may include features for pumping heat in a composite semiconductor structure. A heat pump such as a peltier device may be formed from compound semiconductor materials in a composite semiconductor structure. The heat pump may be thermally connected to an area of thermal interest such as a circuit device that generates heat during operation. The heat pump may also be connected to a non-compound semiconductor region of the composite semiconductor structure, which may be die bonded to a heat sink. Electricity may be conducted through the heat pump to move heat in a desired direction between the area of thermal interest and the non-compound semiconductor region. Plural heat pumps may be formed for cooling or heating an area of thermal interest in the composite semiconductor structure. If desired, control circuitry and a temperature sensor may be formed and used to regulate the temperature in the area of the thermal interest.

Abstract: An ohmic contact to II-VI compound semiconductor device for lowering the contact resistance and increasing the efficiency and reliability of a photoelectric device. The method of manufacturing the ohmic contact to a II-VI compound semiconductor device comprises the steps of forming a II-VI compound semiconductor layer on the substrate, forming a mask layer with a contact via on the II-VI compound semiconductor layer, forming a metal-contact layer on the mask layer and II-VI compound semiconductor layer, and removing the metal-contact layer over the mask layer, wherein the remainder of the metal-contact layer forms the ohmic contact. In order to prevent oxidization of the metal-contact layer, a shield layer comprised of a noble metal can be disposed on the metal-contact layer.

Abstract: The invention provides a semiconductor light emitting device whose operating voltage can be easily reduced, a method of producing the same, and an optical device. An n-type clad layer, a first guide layer, an active layer, a second guide layer, a p-type clad layer, a first semiconductor layer, and a second semiconductor layer of ZnSe are successively grown on an n-type substrate. An alkali compound layer of Na2Se is then formed thereon. Subsequently, a heat treatment is performed by means of irradiation of an excimer laser beam so that at least a part of the second semiconductor layer and at least a part of the alkali compound layer are altered thereby forming a contact layer. Furthermore, a p-side electrode is formed on the contact layer. The contact layer contains an alkali metal serving as a p-type impurity so that the contact layer has a low electric resistance thereby achieving a reduction in the operating voltage and thus a reduction in the operating power.

Abstract: Microoptical systems with clear aperture of about one millimeter or less are fabricated from a layer of photoresist using a lithographic process to define the optical elements. A deep X-ray source is typically used to expose the photoresist. Exposure and development of the photoresist layer can produce planar, cylindrical, and radially symmetric micro-scale optical elements, comprising lenses, mirrors, apertures, diffractive elements, and prisms, monolithically formed on a common substrate with the mutual optical alignment required to provide the desired system functionality. Optical alignment can be controlled to better than one micron accuracy. Appropriate combinations of structure and materials enable optical designs that include corrections for chromatic and other optical aberrations. The developed photoresist can be used as the basis for a molding operation to produce microoptical systems made of a range of optical materials.

Abstract: A method and apparatus for homoepitaxial growth of freestanding, single bulk crystal Gallium Nitride (GaN) are provided, wherein a step of nucleating GaN in a reactor results in a GaN nucleation layer having a thickness of a few monolayers. The nucleation layer is stabilized, and a single bulk crystal GaN is grown from gas phase reactants on the GaN nucleation layer. The reactor is formed from ultra low oxygen stainless steel.

Abstract: A semi-insulating bulk single crystal of silicon carbide is disclosed that has a resistivity of at least 5000 &OHgr;-cm at room temperature and a concentration of deep level trapping elements that is below the amounts that will affect the resistivity of the crystal, preferably below detectable levels. A method of forming the crystal is also disclosed, along with some resulting devices that take advantage of the microwave frequency capabilities of devices formed using substrates according to the invention.

Abstract: A semi-insulating bulk single crystal of silicon carbide is disclosed that has a resistivity of at least 5000 &OHgr;-cm at room temperature and a concentration of trapping elements that create states at least 700 meV from the valence or conduction band that is below the amounts that will affect the resistivity of the crystal, preferably below detectable levels. A method of forming the crystal is also disclosed, along with some resulting devices that take advantage of the microwave frequency capabilities of devices formed using substrates according to the invention.

Abstract: The present invention provides materials and structures to reduce dislocation density when growing a III-nitride compound semiconductor. A II-nitride compound single crystal-island layer is included in the semiconductor structure, and III-nitride compound semiconductor layers are to grow thereon. It reduces the dislocation density resulted from the difference between the lattice constants of the GaN compound semiconductor layers and the substrate. It also improves the crystallization property of the III-nitride compound semiconductor.

Abstract: Ohmic and rectifying contacts to a TaC layer on an n-type or p-type area of an SiC substrate are formed by depositing a WC layer over the TaC layer, followed by a metallic W layer. Such contacts are stable to at least 1150° C. Electrodes connect to the contacts either directly or via a protective bonding layer such as Pt or PtAu alloy through a dielectric layer.

Abstract: The invention relates to a II-VI semiconductor component in which, within a series of layers, there is provided at least one junction between a semiconductor layer containing BeTe and a semiconductor layer containing Se. A boundary layer between the semiconductor layer containing BeTe and the semiconductor layer containing Se is prepared in such a way that it forms a Be—Se configuration.

Abstract: The present invention relates to a method and device for interconnecting radio frequency power SiC field effect transistors. To improve the parasitic source inductance advantage is taken of the small size of the transistors, wherein the bonding pads are placed on both sides of the die in such a way that most of the source bonding wires (6) go perpendicularly to the gate and drain bonding wires (7, 8). Multiple bonding wires can be connected to the source bonding pads, reducing the source inductance. An additional advantage comes from such arrangement by reducing the mutual inductance between source/gate and between source/drain due to the orthogonal wire placement.

Abstract: A semiconductor material avalanche photodiode photodetector having ultraviolet response, solar radiation immunity and response speed in excess of that available from conventional ultraviolet photodetectors is described. The detector is an avalanche photodiode comprised of periodic table group III-Nitride semiconductor material, such as aluminum gallium nitride, serving as a photon to charge carrier transducer, and an avalanche charge carrier multiplication region comprised of different semiconductor materials such as silicon. The photodetector is capable of selective ultraviolet signal transducing while exposed to a mixture of ultraviolet and solar energy “noise” radiation. The included avalanche multiplication region is optically shielded from solar and other energy components to enable this selective capability. A multiplied ultraviolet photoresponsive electric signal is collected from output electrodes disposed adjacent the avalanche multiplication structure.

Abstract: An insulating resin sheet made from a thermosetting resin is provided on an insulating substrate in such a manner as to cover bonding pads provided on the insulating substrate. A lower chip is set on the insulating substrate in such a manner that bonding bumps connected to inner connection terminals of the lower chip break the insulating resin sheet 24 to be in contact with the bonding pads. The insulating resin sheet is thermally cured and subsequently the bonding bumps are melted.

Abstract: A semi-insulating bulk single crystal of silicon carbide is disclosed that has a resistivity of at least 5000 &OHgr;-cm at room temperature and a concentration of trapping elements that create states at least 700 meV from the valence or conduction band that is below the amounts that will affect the resistivity of the crystal, preferably below detectable levels. A method of forming the crystal is also disclosed, along with some resulting devices that take advantage of the microwave frequency capabilities of devices formed using substrates according to the invention.

Abstract: A semi-insulating bulk single crystal of silicon carbide is disclosed that has a resistivity of at least 5000 &OHgr;-cm at room temperature and a concentration of deep level trapping elements that is below the amounts that will affect the resistivity of the crystal, preferably below detectable levels. A method of forming the crystal is also disclosed, along with some resulting devices that take advantage of the microwave frequency capabilities of devices formed using substrates according to the invention.

Abstract: A single crystal thin film of the compound ZnSiXGe1-XN2 (where x can range from 0 to 1). This thin film single crystal can be disposed on a single crystal substrate made of, for example, sapphire, silicon carbide, lithium gallate or silicon with or without an additional GaN buffer layer grown on them. Alternately, a GaN single crystal thin film grown on any substrate can be used. In the case of sapphire, it can be R-plane so that the thin film has its c-axis lying within the thin film or A- or C-plane so that the thin film has its c-axis perpendicular to the substrate. The substrate could also be any substrate with a GaN single crystal thin film deposited on it. ZnSiXGe1-XN2 single crystal thin films can be made by the MOCVD method using suitable precursors, molar injection ratios, and substrate temperatures. It is possible to make various optical, electro-optical or electronic devices with the material, for example, a second harmonic generator emitting blue light.

Abstract: A semi-insulating bulk single crystal of silicon carbide is disclosed that has a resistivity of at least 5000 &OHgr;-cm at room temperature and a concentration of deep level trapping elements that is below the amounts that will affect the resistivity of the crystal, preferably below detectable levels. A method of forming the crystal is also disclosed, along with some resulting devices that take advantage of the microwave frequency capabilities of devices formed using substrates according to the invention.

Abstract: A semiconductor device comprises an active element and contacts that permit low-resistance external electrical connections. The active element includes an active layer formed from group II-VI elements, an n-doped layer on one side of the active it layer, and a p-doped layer on the other side of the active layer. The p-doped layer is a ZnSe-based alloy or a ZnTe-based alloy. There are electrical contacts to the n-doped layer and to the p-doped layer. The electrical contact to the p-doped layer includes a graded-alloy contact layer in epitaxial contact with the p-doped layer and whose bandgap varies from about that of the p-doped layer adjacent the p-doped layer to about zero at a location remote from the p-doped layer. The graded-alloy contact layer is a HgZnSSe-based graded-composition alloy where the p-doped layer is a ZnSe-based alloy, or a HgZnSeTe-based graded-composition alloy where the p-doped layer is a ZnTe-based alloy.

Abstract: A semi-insulating bulk single crystal of silicon carbide is disclosed that has a resistivity of at least 5000 &OHgr;-cm at room temperature and a concentration of deep level trapping elements that is below the amounts that will affect the resistivity of the crystal, preferably below detectable levels. A method of forming the crystal is also disclosed, along with some resulting devices that take advantage of the microwave frequency capabilities of devices formed using substrates according to the invention.

Abstract: A variable bandgap infrared absorbing material, Hg1-x Cdx Te, is manufactured by use of the process termed MOCVD-IMP (Metalorganic Chemical Vapor Deposition-Interdiffused Multilayer Process). A substantial reduction in the dislocation defect density can be achieved through this method by use of CdZnTe layers which have a zinc mole fraction selected to produce a lattice constant which is substantially similar to the lattice constant of HgTe. After the multilayer pairs of HgTe and Cd0.944Zn0.056Te are produced by epitaxial growth, the structure is annealed to interdiffuse the alternating layers to produce a homogeneous alloy of mercury cadmium zinc telluride. The mole fraction x in Hg1-x(Cd0.944Zn0.056)xTe can be varied to produce a structure responsive to multiple wavelength bands of infrared radiation, but without changing the lattice constant. The alloy composition is varied by changing the relative thicknesses of HgTe and Cd0.944Zn0.056Te.

Abstract: A semiconductor light emitting device has a stacked structure including an n-type clad layer, an active layer, and a p-type clad layer on an InP substrate. The p-type clad layer is made from an MgZnSeTe-based compound semiconductor lattice-matched with InP. The n-type clad layer is made from a compound semiconductor lattice-matched with InP and selected from an MgZnSeTe-based compound semiconductor, an MgZnCdSe-based compound semiconductor, and an MgCdSSe-based compound semiconductor.

Abstract: A device structure provides improved efficiency of light emission from a light emitting element made of silicon while rendering such emission electrically controllable. Silicon in the light emitting element comprises fine microcrystals, which are miniaturized sufficiently to cause a quantum size effect. The microcrystals may be 10 nanometers (nm) or less in grain size. A dielectric film of 5 nm thick or less is formed containing therein such microcrystals. The microcrystal structure section is disposed between p- and n-type semiconductor layers. These layers are brought into electrical contact with the microcrystal structure only, while causing the remaining portions to be electrically insulative by a dielectric film or the like. Elementary particles of the opposite polarities, e.g. electrons and holes, are injected by tunnel effect into the microcrystals resulting in emission of light rays with increased efficiency.

Abstract: A transistor of SiC having a drain and a highly doped substrate layer is formed on the drain. A highly n type buffer layer may optionally be formed on the substrate layer. A low doped n-type drift layer, a p-type base layer, a high doped n-type source region layer and a source are formed on the substrate layer. An insulating layer with a gate electrode is arranged on top of the base layer and extends substantially laterally from at least the source region layer to a n-type layer. When a voltage is applied to the gate electrode, a conducting inversion channel is formed extending substantially laterally in the base layer at an interface of the p-type base layer and the insulating layer. The p-type base layer is low doped in a region next to the interface to the insulating layer at which the inversion channel is formed and highly doped in a region thereunder next to the drift layer.

Abstract: An optoelectronic semiconductor component has a radiation-emitting active layer sequence which is associated with at least one poorly dopable semiconductor layer of a first conductivity type. A heavily doped first degenerated junction layer of a first conductivity type and a heavily doped second degenerated junction layer of a second conductivity type opposite to the first conductivity type are provided between the poorly dopable semiconductor layer and a contact layer of the semiconductor body, the contact layer being associated with the poorly dopable semiconductor layer.

Abstract: A gallium nitride-based III-V Group compound semiconductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.

Abstract: This is an integral IR detector system with at least two epitaxial HgCdTe sensors on integrated silicon or GaAs circuitry and also a method of fabricating such system. The system can comprise: a) integrated silicon or GaAs circuitry 110; b) an epitaxial lattice-match layer (e.g. ZnSe 114) on a top surface of the circuit; c) an epitaxial insulating layer (e.g. CdTe 102) on the lattice-match layer; and d) at least two epitaxial HgCdTe sensors 101,121 on the insulating layer, with the HgCdTe sensors being electrically connected to the circuitry. Preferably, the circuitry is silicon. Preferably, an IR transparent, spacer layer (e.g. CdTe 120 or CdZnTe) is on the HgCdTe sensors and an HgCdTe filter 122 is on the spacer layer. Preferably, at least one of the HgCdTe sensors and the HgCdTe filter is laterally continuously graded.

Abstract: On a substrate of n-type GaAs, an n-type cladding layer of n-type Zn.sub.0.9 Mg.sub.0.1 S.sub.0.13 Se.sub.0.87, an n-type light guiding layer of n-type ZnS.sub.0.06 Se.sub.0.94, an active layer of ZnCdSe and a p-type light guiding layer of p-type ZnS.sub.0.06 Se.sub.0.94 are successively formed. On the p-type light guiding layer, a p-type contact structure is formed. The p-type contact structure includes a first layer of p-type ZnS.sub.0.31 Se.sub.0.54 Te.sub.0.15, a second layer of ZnS.sub.0.47 Se.sub.0.28 Te.sub.0.25, a third layer of p-type ZnS.sub.0.65 Te.sub.0.35, a fourth layer of p-type ZnS.sub.0.5 Te.sub.0.5 and a fifth layer of p-type ZnTe.

Abstract: In a method of manufacturing a semiconductor light-emitting device composed of a II-VI compound semiconductor in which at least more than one kind of elements of Zn, Be, Mg, Cd or Hg are used as a II-group element and at least more than one kind of elements of Se, S, Te are used as a VI-group element and which includes first conductivity type and second conductivity type cladding layers and an active layer, a supply ratio VI/II ratio of VI-group element and II-group element required when the active layer is epitaxially deposited is selected to be greater than 1.1 and the active layer is deposited epitaxially. Thus, there may be obtained a highly-reliable semiconductor light-emitting device whose life time is made longer.

Abstract: A gallium nitride-based III-V Group compound semiconductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.

Abstract: In a method of forming a II-VI compound semiconductor thin film on an InP substrate, a layer of III-V compound semiconductor mixed crystal is first formed on the InP substrate. The desorption rate of a group V element constituting the III-V compound semiconductor mixed crystal at a decomposition temperature of a native oxide layer formed on a surface of the III-V compound semiconductor mixed crystal layer is lower than a desorption rate of P of the InP substrate at a decomposition temperature of a native oxide layer formed on a surface of the InP substrate. A II-VI compound semiconductor thin film layer is formed on the first III-V compound semiconductor mixed crystal layer.

Abstract: In a II-VI group semiconductor laser, on an n type GaAs substrate, an n type ZnSe layer, a multiquantum well layer of a ZnCdSe well layer and a ZnSe barrier layer, and a p type ZnSe layer are deposited in this order. A polycrystalline ZnO layer is provided on both sides of the p type ZnSe layer for constricting current. Multifilm reflecting mirrors, respectively constituted with a polycrystalline SiO.sub.2 layer and a polycrystalline TiO.sub.2 layer, for obtaining laser oscillation are provided on the p type ZnSe layer as well as on a surface of the n type ZnSe layer exposed by etching the GaAs substrate. Furthermore, a p type AuPd electrode and an n type AuGeNi electrode are respectively provided.

Abstract: An ohmic contact to a p-type zinc selenide (ZnSe) layer in a Group II-VI semiconductor device, includes a zinc mercury selenide (Zn.sub.x Hg.sub.1-x Se) layer on the zinc selenide layer, a mercury selenide (HgSe) layer on the zinc mercury selenide layer and a conductor (such as metal) layer on the mercury selenide layer. The zinc mercury selenide and mercury selenide layers between the p-type zinc selenide and the conductor layer provide an ohmic contact by eliminating the band offset between the wide bandgap zinc selenide and the conductor. Step graded, linear graded, and parabolic graded layers of zinc mercury selenide may be provided. A layer of mercury selenide without the mercury zinc selenide layer may also provide an ohmic contact. The ohmic contact of the present invention produces nearly ideal voltage-current relation, so that high efficiency Group II-VI optoelectronic devices may be obtained.

Abstract: A heterojunction is formed between a pair of layers of different semiconductive materials whose work function difference produces a large band offset at the heterojunction. Donor or acceptor atoms are included in one regions that when photoexcited produce free charge carriers but leave behind charged centers that keep the photoexcited carriers localized. The large barrier at the heterojunction limits recombination of the free charge carriers and the charged centers and persistent photoconductivity results. This effect is used to form light operated switches. An illustrative example uses a layer of high purity gallium arsenide forming a heterojunction with a gallium-doped layer of zinc selenide.

Abstract: After the removal of a native oxide layer on a surface of an InP substrate, a ZnCdSe buffer layer is grown, and a ZnSeTe layer as a II-VI compound semiconductor layer containing Te is formed on the ZnCdSe buffer layer. This permits the ZnSeTe layer to grow two-dimensionally from directly after the start of growing such that its crystal quality is considerably improved. In this manner, a semiconductor device is attained which has above the InP substrate the II-VI compound semiconductor layer containing Te, which has such a high quality as to permit the semiconductor device to be used as a light emitting device.

Abstract: A GaN single crystal having a full width at half-maximum of the double-crystal X-ray rocking curve of 5-250 sec and a thickness of not less than 80 .mu.m, a method for producing the GaN single crystal having superior quality and sufficient thickness permitting its use as a substrate and a semiconductor light emitting element having high luminance and high reliability, comprising, as a substrate, the GaN single crystal having superior quality and/or sufficient thickness permitting its use as a substrate.

Abstract: Amorphous silicon in impurity regions (source and drain regions or N-type or p-type regions) of TFT and TFD are crystallized and activated to lower electric resistance, by depositing film having a catalyst element such as nickel (Ni), iron (Fe), cobalt (Co) or platinum (Pt) on or beneath an amorphous silicon film, or introducing such a catalyst element into the amorphous silicon film by ion implantation and subsequently crystallizing the same by applying heat annealing at an appropriate temperature.

Abstract: A silicon carbide switching device having near ideal electrical characteristics includes an electrical insulator with an electrical permittivity greater than about ten times the permittivity of free space (.epsilon..sub.o) and more preferably greater than about fifteen times the permittivity of free space, as a gate electrode insulating region. The use of electrical insulators having high electrical permittivities relative to conventional electrical insulators such as silicon dioxide significantly improves the breakdown voltage and on-state resistance characteristics of a silicon carbide switching device to the point of near ideal characteristics, as predicted by theoretical analysis. Thus, the preferred advantages of using silicon carbide, instead of silicon, can be more fully realized.

Abstract: The present invention is directed to a thin film transistor (TFT) structure having a channel region formed of a crystallized SiGe and is to provide a thin film transistor having a large carrier mobility. In this case, a channel region (4) is formed of a crystallized SiGe thin film.

Abstract: According to one aspect of the invention, a crystal-growing method for forming a II-VI single crystalline semiconductor expressed by Zn.sub.1-x Cd.sub.x Se (where 0<x<0.35) is provided. The crystal-growing method includes a step of epitaxially growing the II-VI single crystalline semiconductor on a substrate by: supplying a II element Zn onto the substrate by using a molecular beam from a ZnSe compound source and a molecular beam from a Zn elemental source; supplying a II element Cd onto the substrate by using a molecular beam from a CdSe compound source; and supplying a VI element Se onto the substrate by using a molecular beam from a ZnSe compound source.

Abstract: A ferroelectric memory device includes a channel layer of a dielectric material containing oxygen, source and drain electrode provided on the channel layer across a channel region defined in the channel layer, a ferroelectric memory layer provided on the channel layer so as to cover at least the channel region, and a write control electrode provided on the ferroelectric memory layer for applying an electric field thereto.

Abstract: A II-VI group compound semiconductor device having a p-type Zn.sub.x Mg.sub.1-x S.sub.y Se.sub.1-y (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) semiconductor layer, on which an electrode layer is formed with at least metallic nitride layer lying between the semiconductor layer and the electrode layer.

Abstract: The present invention provides an Si base semiconductor monocrystal substrate which includes an Si(11n) substrate where n=1.5-2.5. An intermediate layer is formed on the Si(11n) substrate. The intermediate layer is made of a material selected from the group consisting of ZnTe and Zn-rich CdZnTe, The intermediate layer has a thickness in the range of 50-200 angstroms. The intermediate layer is oriented in a (11n')B plane. An upper layer is formed on the intermediate layer. The upper layer is made of a material selected from the group consisting of CdTe and Cd-rich CdZnTe. The upper layer is oriented in a (11n")B plane. The indexes n' and n" satisfy the following equations. ##EQU1## where y is the lattice mismatch between the Si substrate and the intermediate layer. ##EQU2## where y' is the lattice mismatch between the Si substrate and the upper layer.

Abstract: An electromagnetic radiation transducer is provided having a p-type ZnSe layer and an n-type layer. The p-type ZnSe layer has a net donor to net acceptor ratio (N.sub.D /N.sub.A) of less than or equal to about 0.8. The net acceptor concentration is greater than about 5.times.10.sup.15 cm .sup.-3 and the resistivity is less than 15 .OMEGA.-cm. The p-type ZnSe layer is deposited by doping the ZnSe during fabrication with a neutral free-radical source.

Abstract: A photovoltaic diode unit cell (10) includes a first layer (14) having a first type of electrical conductivity and a second layer (16) of Group II-VI material having a second type of electrical conductivity that differs from the first type. The first layer and the second layer are coupled together so as to form a photovoltaic junction (15) therebetween. The photovoltaic junction is coupled via electrical interconnects (18, 20, 22) to a readout 24 and collects first charge carriers resulting from an absorption of IR radiation within the layer 14. The junction also collects second charge carriers resulting from the absorption of visible light in a region of highly graded crystal potential formed, in a Liquid Phase Epitaxy (LPE)-grown embodiment of this invention, at an interface of a substrate and the first layer. The substrate is subsequently removed, preferably by a mechanical operation followed by a wet chemical etch, to expose the region of highly graded crystal potential.

Abstract: A structure is fabricated comprising a substrate, a dielectric layer formed over the substrate, and a single crystal layer of a compound formed over the dielectric layer. The single crystal layer is formed by the chemical reaction of at least a first element with an initial single crystal layer of a second element on the dielectric layer having an initial thickness of about 100 to about 10,000 angstroms.According to another aspect, a carbide single crystal layer is provided on a substrate by depositing carbon from a solid carbon source at a low rate and low temperature, followed by reacting the carbon with the underlying layer to convert it to the carbide.

Abstract: A diamond semiconductor device has a pn junction formed by a p-type diamond semiconductor portion containing boron as an impurity and an n-type diamond semiconductor portion containing lithium as an impurity. The diamond semiconductor is formed by a diamond crystal growth on a single nucleation site on an insulating substrate. Electroluminescene takes place in the diamond crystal.

Abstract: Group II-VI thin film transistors, a method of making same and a monolithic device containing a detector array as well as transistors coupled thereto wherein, according to a first embodiment, there is provided a group II-VI insulating substrate, a doped layer of a group II-VI semiconductor material disposed over the substrate, an insulating gate region disposed over the doped layer, a pair of spaced contacts on the doped layer providing source and drain contacts, a gate contact disposed over the insulating gate region, an insulating layer disposed over exposed regions of the substrate, doped layer, insulating gate region and contacts and metallization disposed on the insulating layer and extending through the insulating layer to the contacts. The thickness of the doped layer is less than the maximum depletion region thickness thereof.