Abstract: There is disclosed a coating material formulation for layering a plurality of electrodes to provide a substrate for the electrochemical synthesis of organic oligomers. Specifically, there is disclosed a coating layer of from about 0.5 to about 100 microns thick and is composed of a mixture of controlled porosity glass (CPG) particles having an average particle size of from about 0.25 to about 25 microns, and a thickening agent.

Abstract: Packages of semiconductor devices with non-opaque covers and methods for making the packages. The invention allows an encapsulant to be used with a non-opaque cover. By ensuring the cover is attached to a die in such a way as to expose bonding pads while sealing in the imaging portion of the die, the die can be electrically connected to a substrate and then encapsulated. Since the imaging portion is sealed, the encapsulant cannot get underneath the glass. By ensuring the encapsulant is not filled beyond the glass, encapsulant cannot get over the glass either.

Abstract: Environmental sensors and other bodies, together with associated lead wires, are mounted to a oxidizable substrate for high temperature applications by means of a reacted borosilicate mixture (RBM) that secures the body relative to the substrate via of an oxide interface formed between the RBM and substrate during a high temperature reaction process. An oxide interface is also formed with oxidizable bodies to provide further mounting strength. The RBM is a B2O3—SiO2 mixture, with the B2O3 portion a function of the reaction temperature and desired bonding strength and viscosity.

Abstract: A package structure for optical image sensing devices is disclosed. The package structure includes an image sensing integrated circuit chip having a light receiving side and a backside. The image sensing integrated circuit chip has a light sensing area on the light receiving side. A plurality of light sensing devices are arranged in the light sensing area for converting incident light into electrical signals. A plurality of bonding pads are arranged along one or two sides of the light sensing area. Black sealing glue is asymmetrically coated on the outskirts of the light sensing area. The black sealing glue has at least two coating widths. A glass lid is glued over the light sensing area with the sealing glue.

Abstract: There is provided an EL device which has sufficient strength to external pressure and is capable of effectively preventing moisture and oxygen from infiltrating into the EL device, thereby having a prolonged life. An organic EL device 200 is comprised of a substrate 1, an organic EL multilayer film 2 that is formed on the substrate 1, and a sealing plate 31 that is bonded onto the substrate 1 using an adhesive 4 so as to cover the organic EL multilayer film 2. The sealing plate 31 is of a flangeless type, wherein the width of peripheral projecting parts thereof is not less than the thickness at these peripheral projecting parts, and moreover is not less than 0.7 mm.

Abstract: The invention provides improved packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. Methods of assembly are also provided. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment.

Abstract: An electronic part comprising: a functional element chip on which a functional element has been formed; a wiring member which is electrically connected to the functional element chip; and a protecting member for protecting the functional element chip, wherein the wiring member has a stair shape and is electrically connected to the functional element chip, so that an electronic part having a functional element chip which is hard to be distorted. An electronic part comprising: a functional element chip on which a functional element has been formed; and a protecting member for protecting the functional element chip, wherein a spacer is sandwiched between the functional element chip and the protecting member, so that a constant gap between a functional element chip and a protecting cap is easily held.

Abstract: The electronic component has a semiconductor chip embedded in a plastic compound. The electronic component is produced by first producing a number of electronic components on a panel and subsequent dicing into single electronic components. The semiconductor chip of this component is disposed on a substrate the includes or is entirely formed of plastic and it is embedded in a plastic package molding compound. The plastic of the substrate has a glass transition temperature range which is lower than the glass transition temperature range of the plastic package molding compound.

Abstract: The lead-free glass tubing of the SiO2—B2O3—R2O—BaO—ZnO—TiO2 system has a composition, in percent by weight on an oxide basis, consisting essentially of: SiO2, 34 to 52; B2O3, 10 to 25; Al2O3, 0 to 25; Li2O, 2 to 6; Na2O, 4 to 10; K2O, 2 to 6; CaO, 0 to 4; BaO, 1 to 5; ZnO, 4 to 12; TiO2, 2 to 6, and at least one refining agent in an effective amount for refining. An encapsulated diode consisting of a diode encapsulated with this lead-free glass tubing is also disclosed.

Abstract: In an optoelectronic component assembly and a method for the production thereof, the optoelectronic component assembly includes an optoelectronic component arranged on a support element, which is surrounded by a closed dam. An encapsulation is arranged in an inner area of the dam, which encapsulates the optoelectronic component and includes two sealing materials. The inner area of the dam may be filled with a first sealing material up to the top edge of the optoelectronic component. The inner area of the dam located above the optoelectronic component is filled with a second transparent sealing material at least in one area of the window.

Abstract: An encapsulant for use with opto-electronic devices and optical components incorporates a filler made from a glass that has been processed into particle form and heated to a predetermined temperature for a predetermined time, along with an epoxy having an index of refraction matched to that of the glass and heated to a predetermined temperature for a predetermined time, to prevent settling of the filler particles after mixing the filler particles with the epoxy, and thereby obtaining uniform dispersion of the particles within the epoxy. The encapsulant provides for high light transmittance, and its coefficient of thermal expansion can be varied by varying the amount of filler without substantially altering the optical properties of the encapsulant. The coefficient of thermal expansion variation within the encapsulant preferably is less than 30%, due to uniform dispersion of the filler particles within the epoxy.

Abstract: A hermetically sealed wafer scale package for micro-electrical-mechanical systems devices. The package consists of a substrate wafer which contains a microstructure and a cap wafer which contains other circuitry and electrical connectors to connect to external applications. The wafers are bonded together, and the microstructure sealed, with a sealant, which in the preferred embodiment is frit glass. The wafers are electrically connected by a wire bond, which is protected by an overmold. Electrical connectors are applied to the cap wafer, which are electrically linked to the outputs and inputs of the microstructure. The final package is small, easy to manufacture and test, and more cost efficient than current hermetically sealed microstructure packages.

Abstract: A fused silica substrate is processed to a thickness that allows it to be easily flexed. An opening is etched in the substrate. A die having a patterned topside is processed to the thickness of the substrate by lapping the die. The thinned die is positioned within the opening of the substrate. Non-conducting glass is then spun on top and backside surfaces of the die/substrate combination and is allowed to flow between the surfaces of the die and substrate. Conductive traces are constructed to provide electrical connection from the embedded die to the periphery of the enclosure for external electrical interconnect. The flexural properties of the thin fused silica (or equivalent) permit the enclosure to be arched and inserted into a printed circuit board without solder.

Abstract: A stereolithographically fabricated package that surrounds at least a portion of a semiconductor die so as to substantially hermetically seal the same. The package may be fabricated from thermoplastic glass, other types of glass, ceramics, or metals. Stereolithographic processes are used to fabricate at least a portion of the substantially hermetic package around the semiconductor dice of assemblies including carrier substrates or leads or around bare or minimally packaged semiconductor dice, including on dice that have yet to be singulated from a wafer. As at least a portion of the substantially hermetic package is stereolithographically fabricated, that portion may include a series of superimposed, contiguous, mutually adhered layers of a suitable hermetic material. The layers can be fabricated by consolidated selected regions of a layer of unconsolidated particulate or powdered material, or by defining an object layer from a sheet of material.

Abstract: A solid-state image pickup device in which no warp occurs in a solid-state image pickup element chip is provided. A solid-state image pickup device, including a solid-state image pickup element chip on which a plurality of solid-state image pickup elements are mounted, a wiring substrate electrically connected to the solid-state image pickup element chip and adapted to transmit signals from each one of a plurality of solid-state image pickup elements, and a protection cap provided on a light incident side of the solid-state image pickup element chip and adapted to protect the solid-state image pickup element chip, is characterized in that the solid-state image pickup element chip is formed on a substrate with a thermal expansion coefficient equal to that of the protection cap, and the substrate and the protection cap are sealed with a sealing resin.

Abstract: A III nitride semiconductor substrate for ELO is provided for forming a III nitride film whose surface is controlled independent of the film's thickness. A III nitride underlayer including at least Al is directly formed on a base made of e.g. a sapphire single crystal, and not formed through a buffer layer formed at a low temperature. After that patterns made of e.g SiO2 are formed on the underlayer.

Abstract: Glass, for encapsulating a semiconductor, which is substantially free of lead or other harmful ingredients, but which exhibits a sealing temperature of not higher than 710° C., and which stably seals with Dumet. Further, when the glass has a viscosity of 106 dPa·s, the temperature of said glass is not higher than 710° C., and includes two or more of Li2O, Na2O and K2O and B2O3. Also, the glass may comprise: SiO2, B2O3 and Al2O3 in an amount of from 40 to 70%, from 5 to 20% and from 0 to 15% by weight, respectively; MgO, CaO, SrO, BaO and ZnO in a total amount of from 0 to 45% by weight; and Li2O, Na2O and K2O in a total amount of from 5 to 25% by weight.

Abstract: Thermal cycling can lead to damaging stress at the upper surface of a semiconductor device chip (10) encapsulated in synthetic resin material (100), particularly in the case of power devices that include an IC. The invention provides a thick ductile layer pattern (50) of, for example, aluminium over most of the top surface of the insulating over-layer (40) of the chip (10). Electrically-isolated parts (50a, 50b, 50c, 50d etc.) of this ductile covering are individually connected to respective underlying conductive areas so as to reduce charging effects across the insulating over-layer (40). A sufficient spacing Z1 is present between these isolated parts (50a, 50b, 50c, 50d etc.) to avoid short circuits as a result of deformation by shearing and smearing during thermal cycling of the device.

Abstract: A surface acoustic wave device includes a SAW element that is mounted on a substrate. Grooves are provided in the substrate at the outer periphery of the SAW element, and a flexible resin layer is provided at the inner portion of the grooves so as to cover the SAW element. An outer resin layer that is harder than the flexible resin layer is provided at the exterior of the flexible resin layer. This configuration facilitates reduction in size and profile of the surface acoustic wave device, contributes to reduction in cost, and exhibits high environmental resistance.

Abstract: A polymeric composition for making semiconductor device packaging includes at least one epoxy resin, at least one curing agent in an amount between 30 and 110 parts by weight per 100 parts by weight of the epoxy resin, at least one silica-based reinforcing filler in an amount between 300 and 2300 parts by weight per 100 parts of the epoxy resin, and at least one control agent for a rheology of the polymeric composition. The at least one control agent may be substantially free from polar groups and present in an amount between 0.1 and 50 parts by weight per 100 parts by weight of the epoxy resin. The invention also relates to a plastic packaging material for microelectronic applications which may be obtained from the above polymeric composition, and to a semiconductor electronic device including such packaging material.

Abstract: A light-emitting device comprises a substrate, electrical terminals disposed on a top side of the substrate, and a light-emitting semiconductor device disposed above the substrate. The light-emitting semiconductor device has a bottom side oriented to face toward the top side of the substrate. Electrodes are disposed on the bottom side of the light-emitting semiconductor device and electrically connected to the terminals on the substrate. A glass layer is arranged in a path of output light emitted by the light-emitting semiconductor device. The glass layer contains fluorescent material that converts at least a portion of the output light to converted light having a wavelength different from a wavelength of the output light. The fluorescent material may include SrS:Eu2+ that emits red light and (Sr, Ba, Ca)Ga2S4:Eu2+ that emits green light.

Abstract: A modularly expandable semiconductor component includes at least one carrier layer, at least one intermediate layer, at least one coverlayer, at least one semiconductor chip, external contacts and a conductor configuration. The intermediate layer is provided with at least one opening, into which the at least one semiconductor chip is inserted. The carrier layer, the intermediate layer and the coverlayer are connected one above another and form a submodule. If a plurality of submodules are installed above one another, a semiconductor component is provided in which the semiconductor chips are located in several mutually overlying planes. The semiconductor chips can be interconnected. A method for producing a semiconductor component is also provided.

Abstract: A package includes a white contrast layer on an upper surface of a black encapsulant. A mark is in the white contrast layer and extends through the white contrast layer such that the black encapsulant is visible through the mark. Since the black encapsulant is visible through the mark, the mark has a high contrast relative to the white contrast layer and is extremely effective as an advertisement or as a package identification mark.

Abstract: An electronic package and/or package lid includes at least one connection slot for receiving a line, such as an optical fiber. The package and/or package lid also includes at least one sealant slot proximate the connection slot. Optical fibers are connected to a component, such as an opto-electronic component, through the connection slot. A sealant provided via the sealant slot hermetically seals the optical fibers within the connection slot.

Abstract: An organic semiconductor diode includes at least one hole transport layer which is arranged on an anode side and formed of an organic compound having a hole transport capability, and at least one electron transport layer which is arranged on a cathode side and formed of an organic compound having an electron transport capability. The at least one hole transport layer and the at least one electron transport layer are laminated one upon another. The organic semiconductor diode exhibits nonlinear current-voltage characteristics when a voltage is applied between the hole transport layer and the electron transport layer in contact with each other. The hole transport layer at an anode-side end has an ionization potential larger than an electron affinity of the electron transport layer at a cathode side end.

Abstract: An integrated circuit chip package wherein the chip is encapsulated prior to mechanical bonding to a packaging substrate. The package provides a continuous adhesive interface between the encapsulated chip and surrounding encapsulant, and the substrate. This structure eliminates discontinuities in flatness and their associated stress states resulting in more reliable package contacts.

Abstract: A semiconductor device comprising a wiring substrate which has a laminated glass fabric body made by laminating a plurality of glass fabrics and impregnating with resin. A resin layer is provided on at least one of surfaces of the laminated glass fabric body. A plurality of pad electrodes are formed on the resin layer. The resin layer has a thickness from 1.5 to 2.5 times the depth of unevenness of the surface of the laminated glass fabric body on which the resin layer exists. A semiconductor pellet is disposed on the wiring substrate and has a plurality of projected electrodes. The projected electrodes are electrically coupled to the pad electrodes by pressing the projected electrodes to the pad electrodes while heating the wiring substrate and/or the semiconductor pellet. Tip portions of the projected electrodes together with the pad electrodes plunge into the resin layer.

Abstract: A hermetically sealed wafer scale package for micro-electrical-mechanical systems devices. The package consists of a substrate wafer which contains a microstructure and a cap wafer which contains other circuitry and electrical connectors to connect to external applications. The wafers are bonded together, and the microstructure sealed, with a sealant, which in the preferred embodiment is frit glass. The wafers are electrically connected by a wire bond, which is protected by an overmold. Electrical connectors are applied to the cap wafer, which are electrically linked to the outputs and inputs of the microstructure. The final package is small, easy to manufacture and test, and more cost efficient than current hermetically sealed microstructure packages.

Abstract: A stereolithographically fabricated package that surrounds at least a portion of a semiconductor die so as to substantially hermetically seal the same. The package may be fabricated from thermoplastic glass, other types of glass, ceramics, or metals. Stereolithographic processes are used to fabricate at least a portion of the substantially hermetic package around the semiconductor dice of assemblies including carrier substrates or leads or around bare or minimally packaged semiconductor dice, including on dice that have yet to be singulated from a wafer. As at least a portion of the substantially hermetic package is stereolithographically fabricated, that portion may include a series of superimposed, contiguous, mutually adhered layers of a suitable hermetic material. The layers can be fabricated by consolidated selected regions of a layer of unconsolidated particulate or powdered material, or by defining an object layer from a sheet of material.

Abstract: An epoxy resin composition for encapsulating a semiconductor device comprising as essential components (A) an epoxy resin; (B) a phenolic resin; (C) a curing accelerator; and (D) a hollow inorganic filler having an average particle size of 4 to 100 &mgr;m and an average shell thickness of 1.5 &mgr;m or more, wherein the amounts of the component (A) and the component (B) are adjusted such that a total amount of X and Y (X+Y) is 350 or more, wherein X is an epoxy equivalent of the epoxy resin (A), and Y is a hydroxyl group equivalent of the phenolic resin (B); and a semiconductor device comprising a semiconductor element encapsulated by the epoxy resin composition.

Abstract: In this semiconductor device, immediate below a mold line M in a surface where an inner lead of a wiring substrate composed of a BT resin impregnated glass cloth or the like is formed, a second solder resist layer is stacked on a first solder resist layer to form a protrusion of a predetermined width. Then, on a predetermined position of the wiring substrate, a semiconductor element is assembled by wire bonding and an assembled part thereof is molded by a resin layer. Further, on the other surface of the wiring substrate, bumps are formed. Such a semiconductor device is separated by use of a slit hole formed on the wiring substrate in advance in conformity with a mold line M. In this structure, in a step of molding, since a resin is not forced outside of a pushing face of a metal mold to form a burr or the like, a thin and small resin molded semiconductor device of excellent appearance and characteristic can be obtained.

Abstract: Integrated circuit devices produced by a method in which devices are formed and packaged at the wafer scale. The integrated circuit device includes bond pads on a first side thereof, a layer of glass adhesively affixed to the first side, a layer of sealant covering the second side and edges thereof, and a metallization pattern on the layer of glass connected via an array of contact holes to the bond pads on the integrated circuit device. The device is advantageously formed with an etchable glass package and palladium metallization pattern.

Abstract: In a semiconductor-sealing liquid epoxy resin composition comprising (A) a liquid epoxy resin, (B) a curing agent, and (C) an inorganic filler, the inorganic filler has such a controlled particle size distribution that the composition provides improved interstitial infiltration and has a low modulus of elasticity in the cured state.

Abstract: A reinforced semiconductor package (20,30) and method utilizes at least one of the grooves (15,16) and ridges (24,25) formed on the package body (17,23) to reinforce the package body (17,23) to prevent warping of the package after molding.

Abstract: The present invention relates to a chip scale package and a method for providing the same. The chip scale package reduces the length of interconnection through the direct contact of a semiconductor chip and output terminals without a substrate. The chip scale package includes a semiconductor chip in which electronic circuits are integrated, having several bonding pads on an upper side. Output terminals are disposed around the semiconductor chip. Bonding wires connect the bonding pads with the output terminals. The bonding wires and associated components are encapsulated by a molded material, which does not encapsulate the central base of the semiconductor chip and the output terminals.

Abstract: A composition for sealing a semiconductor device contains polyphenylene sulfide wherein a line expansion coefficient at 150° C. to 200° C. is 4.75×10−5 [1/°C.] or less, a line thermal expansion coefficient at 80 to 130° C. is 6.0×10−5 [1/°C.] or less, and a line expansion coefficient ratio between the flow direction and a normal direction of the flow direction is 0.55 or more.

Abstract: A mold compound made from a polymer resin and an isorefringent, transparent filler is used to form optical electronic components (10, 20, 30). The mold compound can be used to form a lens (13) on a display device (10), to form the outer housing (21) of a waveguide (20), or to form a dome (34) that reflects light from a light emitting device (32) to a light detecting device (33).

Abstract: A wafer frame for fixing and handling 200 mm wafers is produced with a significantly reduced weight as compared to a metal wafer frame, while maintaining mechanical and thermal material properties. This is accomplished by producing the wafer frame from a plastic with a glass fiber content of from 1 to 40% by weight.

Abstract: The semiconductor device includes a semiconductor chip, an FPC tape for mounting the semiconductor chip thereto, a mold resin for protecting the semiconductor chip, and metal balls provided on the FPC tape for connecting the semiconductor chip to a circuit board. The mold resin has the glass transition temperature not lower than 200.degree. C., the coefficient of linear expansion in the range from 13 to 18 ppm/.degree. C., and Young's modulus in the range from 1500 to 3000 kg/mm.sup.2, whereby warpage of the semiconductor device is mitigated. The semiconductor device can also include a buffer layer. The semiconductor device can be manufactured by collectively molding a plurality of semiconductor chips mounted to the FPC tape and by cutting the molded article into individual semiconductor packages.

Abstract: An electronic component (10) is formed by encasing individual components within a glass tube (20). The individual components can include a semiconductor die (11), leads (12,13), and dumets (16,17). The glass tube (20) is transparent and melts at a temperature less than other commercially available materials.

Abstract: A method for producing integrated circuit devices comprises the steps of forming and packaging such devices at the wafer scale, including forming a plurality of chip circuits with bond pads, adhesively fixing a plate of glass to the active surface of the wafer, slicing the wafer, applying a sealant layer to the backside of the wafer, forming contact holes through the upper glass plate, metallizing the glass plate and singulating the individual chips. Use of etchable glass for the package and palladium for metallization provides an advantageous construction method.

Abstract: A diffusion gauge is formed in a surface of a silicon substrate which has a plane orientation of (110). The diffusion gauge is disposed so that a main current thereof flows along a <110> direction perpendicular to a direction in which large stress biased in one direction generates in the surface of the silicon substrate due to distortion of a base for fixing the silicon substrate. Therefore, even when the large biased stress generates in the surface of the silicon substrate, because the <110> direction in which the main current of the diffusion gauge flows is perpendicular to the direction in which the biased stress generates, there is a little change in a resistance value of the diffusion gauge. As a result, a detection error caused by the distortion of the base can be reduced.

Abstract: A method and encapsulation material for encapsulating the solder joints of an IC device mounted on the substrate of an electronic circuit assembly. The encapsulation material is formulated to be sufficiently opaque to x-radiation to enable the use of x-radiation imaging techniques to detect air pockets and voids in the encapsulation material that might degrade the fatigue life properties of the solder joints encapsulated by the encapsulation material. For the purpose of enhancing the fatigue life properties of the solder joints, the encapsulation material contains a filler material dispersed in a polymeric material, such as an epoxy, such that the encapsulation material is characterized by a coefficient of thermal expansion approximately equal to that of the solder joints. The filler material contains a sufficient amount of an element to render the encapsulation material opaque to x-radiation.

Abstract: In a semiconductor package which includes a plurality of semiconductor chips of different kinds, some of the chips are bonded to die bonding pad by means of a conductive adhesive, while the other chips are bonded by means of a non-conductive adhesive that contains highly insulating beads. Encapsulation of the package is by a molding compound. A nitride film or an organic insulating film is disposed on a back side of the chips bonded by the non-conductive adhesive to improve the withstand voltage between these chips and the die pad.

Abstract: A process of making hermetically sealed glass semiconductor packages by injecting molding an electronic device within a body of molten thermoplastic glass which is solidified by cooling. The glass has a sealing temperature not over 350.degree. C. and a CTE not over 110.times.10.sup.-7 /.degree.C. and may be made of tin-phosphorus oxyfluoride or lead sealing glasses.

Abstract: A method of manufacturing a semiconductor device, in which a pn-junction (2) is provided in a semiconductor wafer (1) of a first conduction type by providing doping atoms of a second conduction type, which is opposed to the first conduction type, via a first main face (3) of the main faces (3, 5) of the wafer (1), subdividing said wafer (1) into individual semiconductor bodies (10) having a pn-junction (2) between and substantially parallel to two opposing connection faces (3, 5), connecting said connection faces (3, 5) to connection bodies (11, 12) by means of a connection layer (15) and covering the semiconductor bodies (10) with a glass (20) A glass-covered semiconductor device is also described. After the pn-junction (2) has been provided on the first main face (3) of the semiconductor wafer (1), a monocrystalline silicon layer (7) having atoms of the second conduction type is epitaxially provided, whereafter the wafer (1) is subdivided into semiconductor bodies (10).

Abstract: A low alpha-ray level glass which emits only an extremely small amount of alpha-ray while maintaining excellent chemical durability, coefficient of thermal expansion and hardness is obtained by introducing fluorine into a SiO.sub.2 --B.sub.2 O.sub.3 --Al.sub.2 O.sub.3 --R.sub.2 O (R being an alkali metal) system glass of a specific content range. The amount of alpha-ray emitted from this glass is below 0.02 count/cm.sup.2.hr.

Abstract: A semiconductor device in which the surface of the semiconductor element is coated with a cured silicone in which there is dispersed filler having an average particle diameter of 0.01 to 500 micrometers and a specific gravity of 0.01 to 0.95 characterized in that the concentration of said filler is higher in the layer of said cured material remote from the element than in the layer of said cured material adjoining the element. The method for fabricating such a device comprises coating the surface of a semiconductor element with a curable silicone composition in which there is dispersed a filler having an average particle diameter of 0.01 to 500 micrometers and a specific gravity of 0.01 to 0.95 and thereafter curing said composition after the elapse of sufficient time for the filler in the layer of the composition adjoining the element to migrate into the layer of said composition remote from the element.

Abstract: High speed integrated circuits are designed and fabricated by taking into account the capacitive loading on the integrated circuit by the integrated circuit potting material. Line drivers may be sized to drive conductive lines as capacitively loaded by the potting material. Repeaters may be provided along long lines, to drive the lines as capacitively loaded by the potting material. Intelligent drivers may sense the load due to the potting material and drive the lines as capacitively loaded by the potting material. The thickness of the passivating layer on the outer conductive lines may also be increased so as to prevent the potting material from extending between the conductive lines. High speed potted integrated circuits may thereby be provided.

Abstract: A photocoupler device includes a light-emitting chip, a light-receiving chip, a light-emitting side lead frame for individually holding the light emitting chip and a light-receiving side lead frame for individually holding the light-receiving chip. The light-emitting and light-receiving chips are opposed to each other so as to be optically coupled and covered with a light-transmissive resin as a first molding layer, in the whole part except in the outside connecting terminal portions of the two lead frames. The first molding layer is further covered with an opaque resin as a second molding layer. In such a photocoupler device, the light-transmissive resin is made to contain fillers in an amount of 80% by weight or more and directly cover the light-emitting chip, without needing silicone-resin coating for protecting the light-emitting chip.