Plural Heterojunctions In Same Device Patents (Class 257/96)
  • Patent number: 8742440
    Abstract: Disclosed is a nitride semiconductor light-emitting element comprising a p-type nitride semiconductor layer 1, a p-type nitride semiconductor layer 2, and a p-type nitride semiconductor layer 3 placed in order above a nitride semiconductor active layer, wherein the p-type nitride semiconductor layer 1 and p-type nitride semiconductor layer 2 each contain Al, the average Al composition of the p-type nitride semiconductor layer 1 is equivalent to the average Al composition of the p-type nitride semiconductor layer 2, the p-type nitride semiconductor layer 3 has a smaller band gap than the p-type nitride semiconductor layer 2, the p-type impurity concentration of the p-type nitride semiconductor layer 2 and the p-type impurity concentration of the p-type nitride semiconductor layer 3 are both lower than the p-type impurity concentration of the p-type nitride semiconductor layer 1, and a method for producing same.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: June 3, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mayuko Fudeta, Eiji Yamada
  • Patent number: 8742397
    Abstract: A semiconductor light emitting device includes a first nitride semiconductor layer, a dopant doped semiconductor layer on the first nitride semiconductor layer, an active layer on the dopant doped semiconductor layer, a delta doped layer on the active layer, a superlattice structure on the delta doped layer, an undoped layer on the superlattice layer, a second nitride semiconductor layer including a first n-type dopant, a third nitride semiconductor layer including a second n-type dopant, and a fourth nitride semiconductor layer including a third n-type dopant.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: June 3, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Tae Yun Kim, Hyo Kun Son
  • Patent number: 8741673
    Abstract: The present invention relates to a polarized light emitting diode (LED) device and the method for manufacturing the same, in which the LED device comprises: a base, a light emitting diode (LED) chip, a polarizing waveguide and a packaging material. In an exemplary embodiment, the LED chip is disposed on the base and is configured with a first light-emitting surface for outputting light therefrom; and the waveguide, being comprised of a polarization layer, a reflection layer, a conversion layer and a light transmitting layer, is disposed at the optical path of the light emitted from the LED chip; and the packaging material is used for packaging the waveguide, the LED chip and the base into a package.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: June 3, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Huan Chen, Han-Ping Yang, Hung-Yi Lin, Cheng-Hsuan Lin
  • Patent number: 8729577
    Abstract: A light-emitting microelectronic device including a first N-type transistor (T1) and a second P-type transistor (T2), the respective gates of which are formed opposite one another, either side of an intrinsic semiconductor material region.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: May 20, 2014
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Laurent Grenouillet, Maud Vinet
  • Patent number: 8729579
    Abstract: An illuminating device includes at least first and second nitride-based semiconductor light-emitting elements each having a semiconductor chip with an active layer region. The active layer region is at an angle of 1° or more with an m plane, and an angle formed by a normal line of a principal surface in the active layer region and a normal line of the m plane is 1° or more and 5° or less. The first and second nitride-based semiconductor light-emitting elements have thicknesses of d1 and d2, respectively, and emit the polarized light having wavelengths ?1 and ?2, respectively, where the inequalities of ?1<?2 and d1<d2 are satisfied.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: May 20, 2014
    Assignee: Panasonic Corporation
    Inventors: Toshiya Yokogawa, Akira Inoue, Masaki Fujikane, Mitsuaki Oya, Atsushi Yamada, Tadashi Yano
  • Patent number: 8729575
    Abstract: The semiconductor light emitting device according to an embodiment includes an N-type nitride semiconductor layer, a nitride semiconductor active layer disposed on the N-type nitride semiconductor layer, and a P-type nitride semiconductor layer disposed on the active layer. The P-type nitride semiconductor layer includes an aluminum gallium nitride layer. The indium concentration in the aluminum gallium nitride layer is between 1E18 atoms/cm3 and 1E20 atoms/cm3 inclusive. The carbon concentration is equal to or less than 6E17 atoms/cm3. Where the magnesium concentration is denoted by X and the acceptor concentration is denoted by Y, Y>{(?5.35e19)2?(X?2.70e19)2}1/2?4.63e19 holds.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Hung Hung, Yasushi Hattori, Rei Hashimoto, Shinji Saito, Masaki Tohyama, Shinya Nunoue
  • Patent number: 8729595
    Abstract: A light emitting device having a vertical structure and a package thereof, which are capable of damping impact generated in a substrate separation process, and achieving an improvement in mass productivity. The device and package include a sub-mount, a first-type electrode, a second-type electrode, a light emitting device, a zener diode, and a lens on the sub-mount.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: May 20, 2014
    Assignees: LG Electronics Inc., LG Innotek Co., Ltd.
    Inventors: Jun Ho Jang, Geun Ho Kim
  • Patent number: 8729572
    Abstract: A light emitting diode package includes an electrically insulated base, first and second electrodes, an LED chip, a voltage stabilizing module, and an encapsulative layer. The base has a first surface and an opposite second surface. The first and second electrodes are formed on the first surface of the base. The LED chip is electrically connected to the first and second electrodes. The voltage stabilizing module is formed on the first surface of the base, positioned between and electrically connected to the first and second electrodes. The voltage stabilizing module connects to the LED chip in reverse parallel and has a polarity arranged opposite to that of the LED chip. The voltage stabilizing module has an annular shape and encircles the first electrode. The encapsulative layer is formed on the base and covers the LED chip.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: May 20, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Hou-Te Lin, Chao-Hsiung Chang
  • Patent number: 8723336
    Abstract: According to an embodiment, a semiconductor light emitting device includes a light emitting body including a semiconductor light emitting layer, a support substrate supporting the light emitting body, and a bonding layer provided between the light emitting body and the support substrate, the bonding layer bonding the light emitting body and the support substrate together. The device also includes a first barrier metal layer provided between the light emitting body and the bonding layer, and an electrode provided between the light emitting body and the first barrier metal layer. The first barrier layer includes a first layer made of nickel and a second layer made of a metal having a smaller linear expansion coefficient than nickel, and the first layer and the second layer are alternately disposed in a multiple-layer structure. The electrode is electrically connected to the light emitting body.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: May 13, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuharu Sugawara
  • Patent number: 8716721
    Abstract: A light emitting device comprises a substrate having a plurality of light emitting elements mounted thereon; a side wall structure having a partition wall portion separating a plurality of light emitting areas that each include at least one of the light emitting elements; and encapsulating resin filled in the light emitting areas to bury the light emitting elements therein. The side wall structure is separated by a space from the substrate at, at least, the partition wall portion so as to be in noncontact with the substrate, and the encapsulating resin is formed so as to integrally, continuously fill the light emitting areas and the space without producing any interface therein.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: May 6, 2014
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Kaori Tachibana
  • Patent number: 8716692
    Abstract: The disclosed light emitting diode includes a substrate provided, at a surface thereof, with protrusions, a buffer layer formed over the entirety of the surface of the substrate, a first semiconductor layer formed over the buffer layer, an active layer formed on a portion of the first semiconductor layer, a second semiconductor layer formed over the active layer, a first electrode pad formed on another portion of the first semiconductor layer, except for the portion where the active layer is formed, and a second electrode pad formed on the second semiconductor layer. Each protrusion has a side surface inclined from the surface of the substrate at a first angle, and another side surface inclined from the surface of the substrate at a second angle different from the first angle.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 6, 2014
    Assignee: LG Display Co., Ltd.
    Inventor: Su-Hyoung Son
  • Patent number: 8716756
    Abstract: A semiconductor device according to the present invention includes a substrate; a nitride semiconductor layer formed above the substrate and having a laminated structure including at least three layers; a heterojunction bipolar transistor formed in a region of the nitride semiconductor layer; and a field-effect transistor formed in a region of the nitride semiconductor layer, the region being different from the region in which the heterojunction bipolar transistor is formed.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: May 6, 2014
    Assignee: Panasonic Corporation
    Inventors: Kazushi Nakazawa, Akiyoshi Tamura
  • Patent number: 8704251
    Abstract: Disclosed is a light-emitting device. The light-emitting device comprises: a first conductivity type semiconductor layer; a second conductivity type semiconductor layer; and an active region comprising a material having a composition of AlxInyGa(1-x-y)N (0?x?1, 0?y?1, 0?x+y?1) between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, wherein the active region comprising: a plurality of barriers and one well disposed between any two of adjacent barriers, wherein the barriers comprises a composite barrier and a single barrier while the composite barrier is composed of a gradient layer having an element with a gradient concentration therein and a first non-gradient layer having a non-gradient composition, and the single barrier is composed of a second non-gradient layer adjacent to the first conductivity type semiconductor layer or the second conductivity type semiconductor layer.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: April 22, 2014
    Assignee: Epistar Corporation
    Inventor: Sheng-Horng Yen
  • Patent number: 8704249
    Abstract: A semiconductor light emitting device includes: a first conductivity type semiconductor layer; a light emission layer; a second conductivity type semiconductor layer; a conductive portion of a first polarity electrically connected to the first conductivity type semiconductor layer; and a conductive portion of a second polarity electrically connected to the second conductivity type semiconductor layer. At least one of the conductive portion of the first polarity and the conductive portion of the second polarity includes a plurality of separated electrode portions arranged on a light emission surface. The closer the positions of the separated electrode portions are to a center point of the light emission surface, the separated electrode portions are provided sparsely, and the farther the positions of the separated electrode portions are from a center point of the light emission surface, the separated electrode portions are provided densely.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: April 22, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masao Kamiya, Keisuke Kayamoto, Hitomi Saito, Hisanobu Noda
  • Patent number: 8704248
    Abstract: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: April 22, 2014
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Publication number: 20140097444
    Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer. The first type nitride semiconductor layer is disposed on the buffer layer. The first type nitride semiconductor layer is doped with a first type dopant, at least one of the buffer layer and the first type nitride semiconductor layer comprises a codopant distributed therein, and an atomic radius of the codopant is larger than an atomic radius of the first type dopant. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer, the second type nitride semiconductor layer comprising a second type dopant.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Hsiang Fang, Chen-Zi Liao, Rong Xuan, Chien-Pin Lu, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Publication number: 20140097443
    Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor stacked layer, a light-emitting layer and a second type nitride semiconductor layer. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer. The first type nitride semiconductor stacked layer is disposed on the buffer layer. The first type nitride semiconductor stacked layer being a plurality of lattice mismatch stacked layers includes a plurality of first nitride semiconductor layers and a plurality of second nitride semiconductor layers. The first nitride semiconductor layers and the second nitride semiconductor layers are stacked alternately, and the first nitride semiconductor layers and the second nitride semiconductor layers are different material. The light-emitting layer is disposed on the first type nitride semiconductor stacked layer.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Hsiang Fang, Rong Xuan, Chen-Zi Liao, Yi-Keng Fu, Chih-Wei Hu, Chien-Pin Lu, Hsun-Chih Liu
  • Publication number: 20140097442
    Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a first buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The first buffer layer is disposed on the nucleation layer. The first buffer layer includes a dopant and Gallium, and an atomic radius of the dopant is larger than an atomic radius of Gallium. The first type nitride semiconductor layer is disposed over the first buffer layer. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Yen-Hsiang Fang, Chen-Zi Liao, Rong Xuan, Chien-Pin Lu, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Patent number: 8692206
    Abstract: Systems, devices, and methods are described including implantable radiation sensing devices having exposure determination devices that determines cumulative exposure information based on the at least one in vivo measurand.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: April 8, 2014
    Inventors: Roderick A. Hyde, Muriel Y. Ishikawa, Eric C. Leuthardt, Michael A. Smith, Elizabeth A. Sweeney, Lowell L. Wood, Jr.
  • Patent number: 8686400
    Abstract: Disclosed herein is a light emitting device including a light emitting structure including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer including at least one combination of a well layer of a first composition formed of a nitride-semiconductor material having first electronic energy and a barrier layer of a second composition formed of a nitride-semiconductor material having higher electronic energy than the first electronic energy, and an interface layer disposed between the second conductivity-type semiconductor layer and the active layer or between the first conductivity-type semiconductor layer and the active layer. The interface layer includes first, second and third layers having different energy bandgaps, the energy bandgaps of the first and second layers are greater than the energy bandgap of the barrier layer, and the energy bandgap of the third layer is less than the energy bandgap of the barrier layer.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: April 1, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Yong Tae Moon
  • Patent number: 8680561
    Abstract: A semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a light emitting layer, a first electrode layer, and a second electrode layer. The light emitting layer is between the first semiconductor layer and the second semiconductor layer. The first electrode layer is on a side of the second semiconductor layer opposite to the first semiconductor layer. The first electrode layer includes a metal portion and a plurality of opening portions piercing the metal portion along a direction from the first semiconductor layer toward the second semiconductor layer. The metal portion contacts the second semiconductor layer. An equivalent circular diameter of a configuration of the opening portions as viewed along the direction is not less than 10 nanometers and not more than 5 micrometers.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: March 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryota Kitagawa, Akira Fujimoto, Koji Asakawa, Eishi Tsutsumi, Takanobu Kamakura, Shinji Nunotani, Masaaki Ogawa
  • Patent number: 8674394
    Abstract: A light emitting device package includes a base, a light emitting element, a mask, metal wires, an encapsulating layer and a cover layer. The base has a first surface bearing electrical structure thereon and an opposite second surface. The mask is arranged on the first surface to define a space receiving the light emitting element. Two openings are defined in the mask. The light emitting element has two pads exposed to an outside through the two openings respectively. The metal wires electrically connect the pads and the electrical structures. The encapsulating layer is filled in the space and two through holes in the base and encapsulates the light emitting element. The encapsulating layer is separated from the metal wires. The cover layer covers and protects the mask and the metal wires. A method of manufacturing the package is also provided.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: March 18, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shiun-Wei Chan, Chih-Hsun Ke
  • Patent number: 8659029
    Abstract: A low contact resistance semiconductor structure includes a substrate, a semiconductor stacked layer, a low contact resistance layer and a transparent conductive layer. The low contact resistance layer is formed on one side of a P-type GaN layer of the semiconductor stacked layer. The low contact resistance layer is formed at a thickness smaller than 100 Angstroms and made of a material selected from the group consisting of aluminum, gallium, indium, and combinations thereof. Through the low contact resistance layer, the resistance between the P-type GaN layer and transparent conductive layer can be reduced and light emission efficiency can be improved when being used on LEDs. The method of fabricating the low contact resistance semiconductor structure of the invention forms a thin and consistent low contact resistance layer through a Metal Organic Chemical Vapor Deposition (MOCVD) method to enhance matching degree among various layers.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: February 25, 2014
    Assignee: Lextar Electronics Corporation
    Inventors: Te-Chung Wang, Fu-Bang Chen, Hsiu-Mu Tang
  • Patent number: 8658451
    Abstract: Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: February 25, 2014
    Assignee: Ultratech, Inc.
    Inventors: Yun Wang, Andrew M. Hawryluk
  • Patent number: 8659039
    Abstract: A highly-efficient semiconductor light emitting diode with improved light extraction efficiency comprising at least a substrate having a plurality of crystal planes, a first conductivity-type barrier layer, an active layer serving as a light emitting layer and a second conductivity-type barrier layer stacked on the substrate. The semiconductor light emitting diode comprises a ridge structure configured from one flat surface and at least two inclining surfaces in the in-plane direction. The width (W) of the flat surface of the ridge structure is 2? (?: light emission wavelength) or less.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: February 25, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Xuelun Wang, Mutsuo Ogura
  • Patent number: 8659041
    Abstract: A nitride semiconductor light emitting diode includes at least an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer. The active layer is formed of one first nitride semiconductor layer having a highest In ratio in the light emitting diode. The light emitting diode further includes at least one of a second nitride semiconductor layer located between the active layer and the n-type nitride semiconductor layer and including an InGaN layer, and a third nitride semiconductor layer located between the active layer and the p-type nitride semiconductor layer and including an InGaN layer. Respective In (Indium) ratios of the InGaN layers included in the second nitride semiconductor layer and the InGaN layers included in the third nitride semiconductor layer are lower than the In ratio of the first nitride semiconductor layer forming the active layer. The LED with high luminous efficiency can thus be provided.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: February 25, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Satoshi Komada
  • Patent number: 8659107
    Abstract: A radiation receiver has a semiconductor body including a first active region and a second active region, which are provided in each case for detecting radiation. The first active region and the second active region are spaced vertically from one another. A tunnel region is arranged between the first active region and the second active region. The tunnel region is connected electrically conductively with a land, which is provided between the first active region and the second active region for external electrical contacting of the semiconductor body. A method of producing a radiation receiver is additionally indicated.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: February 25, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Rainer Butendeich, Reiner Windisch
  • Patent number: 8653547
    Abstract: Provided are a light emitting device and a light emitting device package. The light emitting device includes a first electrode, a light emitting structure including a first semiconductor layer, an active layer, and a second semiconductor layer on the first electrode, a second electrode on the light emitting structure, and a reflective member on at least lateral surface of the second electrode.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: February 18, 2014
    Assignee: LG Innotek Co., Ltd
    Inventors: Hwan Hee Jeong, Sang Youl Lee, June O Song, Kwang Ki Choi
  • Patent number: 8653561
    Abstract: A III-nitride semiconductor electronic device comprises a semiconductor laminate provided on a primary surface of a substrate, a first electrode in contact with the semiconductor laminate, and a second electrode. The semiconductor laminate includes a channel layer and a barrier layer making a junction with the channel layer. The channel layer comprises first III-nitride semiconductor containing aluminum as a Group III constituent element, and the barrier layer comprises second III-nitride semiconductor containing aluminum as a Group III constituent element. The semiconductor laminate including first, second and third regions arranged along the primary surface, and the third region is located between the first region and the second region. The barrier layer includes first to third portions included in the first to third regions, respectively.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: February 18, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Hashimoto, Katsushi Akita, Yoshiyuki Yamamoto, Masaaki Kuzuhara, Norimasa Yafune
  • Patent number: 8647905
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: February 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
  • Patent number: 8648380
    Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: February 11, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Kwang Choong Kim, Won Cheol Seol, Dae Won Kim, Dae Sung Kal, Kyung Hee Ye
  • Patent number: 8647903
    Abstract: A method of fabricating an antireflective grating pattern and a method of fabricating an optical device integrated with an antireflective grating pattern are provided. The method of fabricating the antireflective grating pattern includes forming a photoresist (PR) pattern on a substrate using a hologram lithography process, forming a PR lens pattern having a predetermined radius of curvature by reflowing the PR pattern, and etching the entire surface of the substrate including the PR lens pattern to form a wedge-type or parabola-type antireflective subwavelength grating (SWG) pattern having a pointed tip on a top surface of the substrate. In this method, a fabrication process is simplified, the reflection of light caused by a difference in refractive index between the air and a semiconductor material can be minimized, and the antireflective grating pattern can be easily applied to optical devices.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: February 11, 2014
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Yong Tak Lee, Young Min Song
  • Patent number: 8648369
    Abstract: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper semiconductor layer, an active layer, and a second lower semiconductor layer. Reflective metal layers are positioned between the substrate and the light emitting cells. The reflective metal layers are prevented from being exposed to the outside.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: February 11, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Won Cheol Seo, Joon Hee Lee, Jong Kyun You, Chang Youn Kim, Jin Cheul Shin, Hwa Mok Kim, Jang Woo Lee, Yeo Jin Yoon, Jong Kyu Kim
  • Patent number: 8629459
    Abstract: A light emitting diode device (e.g., LED package) may include at least two light emitting devices that can be switched independently of one another and thus may be useful in vehicular lighting applications, for example low and high beam headlights. A LED device may include a first LED die and at least one additional LED die disposed at different positions within a common reflector cup or relative to a common lens. Multiple LED sub-assemblies may be mounted to a common lead frame along non-coincident principal axes. Methods for varying intensity or color from multi-LED lamps are further provided.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: January 14, 2014
    Assignee: Cree, Inc.
    Inventor: Edward Lloyd Hutchins
  • Patent number: 8624270
    Abstract: Disclosed are a light emitting device and a light emitting device package having the same. The light emitting device includes a first chip structure including a first reflective layer and a first light emitting structure having a plurality of compound semiconductor layers on the first reflective layer; a second chip structure bonded onto the first chip structure and including a second reflective layer and a second light emitting structure having a plurality of compound semiconductor layers on the second reflective layer; and an electrode on the second chip structure.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: January 7, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Kyung Wook Park
  • Patent number: 8610151
    Abstract: There is provided a light-emitting element having a semiconductor film which includes a p-type current-spreading layer of GaInP or GaP; a first p-clad of AlInP; a second p-clad of AlGaInP; an active layer including of GaInP or AlGaInP; a first n-clad having a carrier density of 1×1018 cm?3 to 5×1018 cm?3; a second n-clad having a carrier density of 1×1018 cm?3 to 5×1018 cm?3; wherein the thickness proportion of the first p-clad in an entire p-clad, is 50% to 80%; the thickness of an entire n-clad is equal to or greater than 2 ?m; the thickness proportion of the first n-clad in the entire n-clad is equal to or greater than 80%; and the thickness of the second n-clad is equal to or greater than 100 nm.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: December 17, 2013
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Chiharu Sasaki, Wataru Tamura, Keita Akiyama
  • Patent number: 8610188
    Abstract: A decoupling capacitor arrangement is provided for an integrated circuit. The apparatus includes a plurality of decoupling capacitor arrays electrically connected in parallel with one another. Each of the arrays includes a plurality of decoupling capacitors and a current limiting element. The decoupling capacitors of each array are electrically connected in parallel with one another. The current limiting element is connected in series with the plurality of decoupling capacitors.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: December 17, 2013
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Andreas Kerber, Tanya Nigam, Dieter Lipp, Marc Herden
  • Patent number: 8604496
    Abstract: According to one embodiment, an optical semiconductor device includes an n-type semiconductor layer, a p-type semiconductor layer, and a functional part. The functional part is provided between the n-type semiconductor layer and the p-type semiconductor layers. The functional part includes a plurality of active layers stacked in a direction from the n-type semiconductor layer toward the p-type semiconductor layer. At least two of the active layers include a multilayer stacked body, an n-side barrier layer, a well layer and a p-side barrier layer. The multilayer stacked body includes a plurality of thick film layers and a plurality of thin film layers alternately stacked in the direction. The n-side barrier layer is provided between the multilayer stacked body and the p-type layer. The well layer is provided between the n-side barrier layer and the p-type layer. The p-side barrier layer is provided between the well layer and the p-type layer.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: December 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hisashi Yoshida, Koichi Tachibana, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8604506
    Abstract: This invention provides a surface mounting type light emitting diode excellent in heat radiation performance, reliability and productivity. The surface mounting type light emitting diode includes a metallic base member, a semiconductor light emitting element having a bottom face fixedly bonded to a top face of the base member, and a metallic reflector joined to the top face of the base member with a heat conduction type adhesive sheet interposed therebetween, to surround the semiconductor light emitting element. Heat generated from the semiconductor light emitting element is transferred to the reflector via the base member and the heat conduction type adhesive sheet, and then is radiated to the outside. The metallic reflector can efficiently radiate the heat to the outside. The cutting margin provided for the reflector facilitates a dicing process, which improves productivity.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: December 10, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Konishi, Toshio Hata, Taiji Morimoto
  • Patent number: 8592841
    Abstract: A nitride semiconductor device used chiefly as an LD and an LED element. In order to improve the output and to decrease Vf, the device is given either a three-layer structure in which a nitride semiconductor layer doped with n-type impurities serving as an n-type contact layer where an n-electrode is formed is sandwiched between undoped nitride semiconductor layers; or a superlattice structure of nitride. The n-type contact layer has a carrier concentration exceeding 3×1010 cm3, and the resistivity can be lowered below 8×10?3 ?cm.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: November 26, 2013
    Assignee: Nichia Corporation
    Inventors: Shuji Nakamura, Takashi Mukai, Koji Tanizawa, Tomotsugu Mitani, Hiroshi Marui
  • Patent number: 8587015
    Abstract: Disclosed herein is a light-emitting element including: a first conductivity type semiconductor layer; a light-emitting functional layer formed on the first conductivity type semiconductor layer; a second conductivity type semiconductor layer formed on the light-emitting functional layer; a first conductivity type electrode which has continuity with the exposed portion of the first conductivity type semiconductor layer; a second conductivity type electrode which has continuity with the second conductivity type semiconductor layer; an insulating layer which lies between the light-emitting functional layer, second conductivity type semiconductor layer and second conductivity type electrode on one part and the first conductivity type electrode on the other part; and an annex insulating layer annexed to the insulating layer to form a virtual diode having rectifying action in the opposite direction to that of a diode made up of the second conductivity type semiconductor layer, light-emitting functional layer and f
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: November 19, 2013
    Assignee: Sony Corporation
    Inventor: Hidekazu Aoyagi
  • Patent number: 8587020
    Abstract: A high power LED lamp has a GaN chip placed over an AlGaInP chip. A reflector is placed between the two chips. Each of the chips has trenches diverting light for output. The chip pair can be arranged to produce white light having a spectral distribution in the red to blue region that is close to that of daylight. Also, the chip pair can be used to provide an RGB lamp or a red-amber-green traffic lamp. The active regions of both chips can be less than 50 microns away from a heat sink.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 19, 2013
    Assignee: Epistar Corporation
    Inventor: Salam Hassan
  • Patent number: 8575632
    Abstract: Disclosed is a light-emitting device comprising a light-emitting element (10) composed of a gallium nitride compound semiconductor having an emission peak wavelength of not less than 430 nm; a molded body (40) provided with a recessed portion having a bottom surface on which the light-emitting element (10) is mounted and a lateral surface; and a sealing member (50) containing an epoxy resin including a triazine derivative epoxy resin, or a silicon-containing resin. The molded body (40) is obtained by using a cured product of a thermosetting epoxy resin composition essentially containing an epoxy resin including a triazine derivative epoxy resin, and has a reflectance of not less than 70% at the wavelengths of not less than 430 nm.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: November 5, 2013
    Assignee: Nichia Corporation
    Inventors: Masafumi Kuramoto, Tomohide Miki, Tomoya Tsukioka, Tomohisa Kishimoto
  • Publication number: 20130277696
    Abstract: In a light-emitting element 1, a light-emitting layer 4, a second conductivity type semiconductor layer 5, a transparent electrode layer 6, a reflecting electrode layer 7 and an insulating layer 8 are stacked in this order on a first conductivity type semiconductor layer 3, while a first electrode layer 10 and a second electrode layer 12 are stacked on the insulating layer 8 in an isolated state.
    Type: Application
    Filed: December 27, 2011
    Publication date: October 24, 2013
    Applicant: ROHM CO., LTD.
    Inventors: Nobuaki Matsui, Hirotaka Obuchi
  • Patent number: 8563997
    Abstract: A semiconductor light emitting device comprises a first nitride semiconductor layer comprising a flat top surface and a plurality of concave regions from the flat top surface, a reflector within the concave regions of the first semiconductor layer, and a second semiconductor layer on the first semiconductor layer.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: October 22, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hung Seob Cheong
  • Patent number: 8558215
    Abstract: A light emitting device may include a first conductive semiconductor layer, an active layer adjacent to the first conductive semiconductor layer and a second conductive semiconductor layer adjacent to the active layer. The active layer may include a first quantum well layer, a second quantum well layer and a barrier layer between the first quantum well layer and the second quantum well layer. The first quantum well layer may include a first plurality of sub-barrier layers and a first plurality of sub-quantum well layers, and the second quantum well layer may include a second plurality of sub-barrier layers and a second plurality of sub-quantum well layers. A bandgap of the first quantum well layer may be different than a bandgap of the second quantum well layer.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: October 15, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hyo Kun Son
  • Patent number: 8552414
    Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hemantha Kumar Wickramasinghe, Kailash Gopalakrishnan
  • Publication number: 20130248902
    Abstract: A light emitting element has a substrate of gallium oxides and a pn-junction formed on the substrate. The substrate is of gallium oxides represented by: (AlXInYGa(1-X-Y))2O3 where 0?x?1, 0?y?1 and 0?x+y?1. The pn-junction has first conductivity type substrate, and GaN system compound semiconductor thin film of second conductivity type opposite to the first conductivity type.
    Type: Application
    Filed: May 24, 2013
    Publication date: September 26, 2013
    Applicant: KOHA CO., LTD.
    Inventors: Noboru Ichinose, Kiyoshi Shimamura, Yukio Kaneko, Encarnacion Antonia Garcia Villora, Kazuo Aoki
  • Patent number: 8541794
    Abstract: A nitride semiconductor device including a light emitting device comprises a n-type region of one or more nitride semiconductor layers having n-type conductivity, a p-type region of one or more nitride semiconductor layers having p-type conductivity and an active layer between the n-type region and the p-type region. In such devices, there is provided with a super lattice layer comprising first layers and second layers which are nitride semiconductors having a different composition respectively. The super lattice structure makes working current and voltage of the device lowered, resulting in realization of more efficient devices.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: September 24, 2013
    Assignee: Nichia Chemical Industries, Ltd.
    Inventors: Shinichi Nagahama, Masayuki Senoh, Shuji Nakamura
  • Patent number: 8536598
    Abstract: A high luminance semiconductor light emitting device and fabrication method thereof, wherein a metallic reflecting layer is formed using a non-transparent semiconductor substrate. The device includes a light emitting diode structure on a GaAs substrate structure bonded together using a first and a third metal layers. The substrate includes a GaAs layer, a first metal buffer layer on a surface of the GaAs layer, the first metal layer on the first metal buffer layer, and a second metal buffer layer and a second metal layer at a back side of the GaAs layer. The diode structure includes the third metal layer, a metal contact layer on the third metal layer, a p-type cladding layer on the metal contact layer, a multi-quantum well layer on the p-type cladding layer, an n-type cladding layer on the multi-quantum well layer, and a window layer on the n-type cladding layer.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: September 17, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Masakazu Takao, Mitsuhiko Sakai, Kazuhiko Senda