Abstract: A method of fabricating an array substrate for a liquid crystal display device includes: forming an initial photoresist (PR) pattern on a metallic material layer; etching the metallic material layer using the initial PR pattern as an etching mask to form the data line and a metallic material pattern, wherein the initial PR pattern is disposed on the data line; performing a first ashing process onto the initial PR pattern to partially remove the initial PR pattern so as to form a first ashed PR pattern, the first ashed PR pattern having a smaller width and a smaller thickness than the initial PR pattern such that end portions of the data line are exposed by the first ashed PR pattern; etching the intrinsic amorphous silicon layer and the impurity-doped amorphous silicon layer by a first dry-etching process; forming a source electrode and a drain electrode on the substrate.

Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.

Abstract: It is advantageous to create texture at the surface of a photovoltaic cell to reduce reflection and increase travel length of light within the cell. A method is disclosed to create texture at the surface of a silicon body by reacting a silicide-forming metal at the surface, where the silicide-silicon interface is non-planar, then stripping the silicide, leaving behind a textured surface. Depending on the metal and the conditions of silicide formation, the resulting surface may be faceted. The peak-to-valley height of this texturing will generally be between about 300 and about 5000 angstroms, which is well-suited for use in photovoltaic cells comprising a thin silicon lamina.

Abstract: Disclosed herein is a method of manufacturing a thin film transistor having a structure that a gate electrode and an oxide semiconductor layer are disposed with a gate insulating film interposed between the gate electrode and the oxide semiconductor layer, and a source/drain electrode is electrically connected to the oxide semiconductor layer, the method including: continuously depositing an aluminum oxide (Al2O3) layer as a protective film and an aluminum (Al) layer in this order on any of the source/drain electrode, the gate insulating film, and the oxide semiconductor layer by using sputtering.

Abstract: A seed crystal which includes mixed phase grains including an amorphous silicon region and a crystallite which is a microcrystal that can be regarded as a single crystal is formed on an insulating film by a plasma CVD method under a first condition that enables mixed phase grains having high crystallinity and high uniformity of grain sizes to be formed at a low density, and then a microcrystalline semiconductor film is formed to be stacked on the seed crystal by a plasma CVD method under a second condition that enables the mixed phase grains to grow to fill a space between the mixed phase grains.

Abstract: Provided are an organic light emitting display device and a method of manufacturing the same. The organic light emitting display device includes a thin-film transistor (TFT), which includes an active layer, a gate electrode, and source/drain electrodes; an organic electroluminescent device electrically connected to the TFT and includes a pixel electrode formed on the same layer as the gate electrode, an intermediate layer including an organic light emitting layer, and a counter electrode that are stacked in the order stated; and a capacitor, which includes a bottom electrode, which is formed on the same layer and of the same material as the active layer and is doped with an impurity; a top electrode formed on the same layer as the gate electrode; and a metal diffusion medium layer formed on the same layer as the source/drain electrodes and is connected to the bottom electrode.

Abstract: A method of fabricating an array substrate for an organic electroluminescent display device includes forming a semiconductor layer, a semiconductor dummy pattern, a first storage electrode and a first gate insulating layer on a substrate; forming a second gate insulating layer on the semiconductor layer and the first storage electrode; forming a gate electrode and a second storage electrode on the second gate insulating layer; forming ohmic contact layers by doping impurities into both sides of the semiconductor layer; forming an inter insulating layer on the gate electrode and the second storage electrode; forming source and drain electrodes and a third storage electrode on the inter insulating layer; forming a passivation layer on the source and drain electrodes and the third storage electrode; forming a first electrode and a fourth storage electrode on the passivation layer; and forming a spacer and a bank on the first electrode.

Abstract: An embodiment of the disclosed technology provides a driving device for a thin film transistor liquid crystal display (TFT-LCD) and a method for manufacturing the same. The driving device comprises at least one first TFT and at least one second TFT formed a base substrate, wherein load of the first TFT is larger than load of the second TFT, the first TFT is of a top-gate configuration, and the second TFT is of a bottom-gate configuration.

Abstract: Provided are a thin film transistor display panel, a liquid crystal display, and a manufacturing method therefor, that can prevent errors or omissions in rubbing due to a step between a pixel electrode and a data line, and the resulting light leakage, as well as increase the effective area ratio of a spacer and prevent shorts from occurring during at least some repair processes. The thin film transistor array panel includes: a first substrate; a gate line and a data line formed on the first substrate; a step preventing member formed on the data line to at least partially fill a volume positioned between the data line and a pixel electrode; and a spacer formed on the first substrate, wherein the spacer and the step preventing member comprise the same material.

Abstract: Provided is a polysilicon thin film transistor having a bottom gate structure using copper and a method of making the same. The polysilicon thin film transistor includes: a transparent insulation substrate; a seed layer that is formed in the same pattern as that of a gate electrode on the transparent insulation substrate, and that is used to form the gate electrode; the gate electrode that is formed of copper on the seed layer; a planarization layer that is formed on the transparent insulation substrate in the same level as that of the gate electrode in the vicinity of the gate electrode; a gate insulation film formed on the upper portion of the gate electrode and the planarization layer, respectively; and a polysilicon layer in which a channel region, a source region and a drain region are formed on the upper portion of the gate insulation film.

Abstract: A thin film transistor, a method of fabricating the same, and an organic light emitting diode display device including the same. The thin film transistor includes: a substrate; a semiconductor layer disposed on the substrate, including a channel region, source/drain regions, and a body contact region; a gate insulating layer disposed on the semiconductor layer so as to expose the body contact region; a gate electrode disposed on the gate insulating layer, so as to contact the body contact region; an interlayer insulating layer disposed on the gate electrode; and source/drain electrodes disposed on the interlayer insulating layer and electrically connected to the source/drain regions. The body contact region is formed in an edge of the semiconductor layer.

Abstract: A method of manufacturing an array substrate for an FFS mode LCD device includes forming a gate line and a gate electrode on a substrate, forming a pixel electrode in the pixel region, forming a gate insulating layer on the gate line, the gate electrode and the pixel electrode, forming a data line, a source electrode, a drain electrode, and a semiconductor layer on the gate insulating layer, the data line crossing the gate line to define the pixel region, the semiconductor layer disposed over the gate electrode, the source electrode and the drain electrode spaced apart from each other over the semiconductor layer, the drain electrode overlapping the pixel electrode, forming a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer including a drain contact hole and a pixel contact hole, and forming a connection pattern and a common electrode on the passivation layer, wherein the common electrode includes bar-shaped first openings in the pixel region, and the con

Abstract: The method of manufacturing the semiconductor device includes amorphizing a first region and a second region of a semiconductor substrate by an ion implantation, implanting a first impurity and a second impurity respectively in the first region and the second region, activating the implanted impurities to form a first impurity layer and a second impurity layer, epitaxially growing a semiconductor layer above the semiconductor substrate with the impurity layers formed on, growing a gate insulating film above the first region and the second region, and forming a first gate electrode above the gate insulating film in the first region and the second gate electrode above the gate insulating film in the second region.

Abstract: An EL display panel includes an organic EL device and a thin film semiconductor unit. The organic EL device includes a lower electrode, an organic light-emitting layer, and an upper electrode. The thin film semiconductor unit includes a first gate electrode, a gate insulating film, a first source electrode, a second drain electrode formed in a same layer as the first source electrode, a first power supply line formed in a same layer as the second drain electrode, and a first interlayer insulating film formed on the first source electrode and the second drain electrode. A gate line connected to the first gate electrode, a second power supply line formed in a same layer as the gate line and connected to the first power supply line, and an auxiliary line formed in a same layer as the second power supply line and connected to the upper electrode are included.

Abstract: An organic light emitting display device includes: a thin-film transistor (TFT) including an active layer, a gate electrode including a gate bottom electrode and a gate top electrode, a source electrode, and a drain electrode; an organic electroluminescent (EL) device electrically connected to the TFT and including a stack of a pixel electrode at the same layer as and including the same material as the gate bottom electrode, an intermediate layer including an emissive layer, and a counter electrode; a first pad electrode at the same layer as and including the same material as the gate bottom electrode; and a second pad electrode including a second pad bottom electrode at the same layer as and including the same material as the gate bottom electrode, and a second pad top electrode at the same layer as and including the same material as the gate top electrode.

Abstract: A thin film transistor and a manufacturing method thereof are provided. An insulating pattern layer having at least one protrusion is formed on a substrate. Afterwards, at least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. Later, the spacer and the amorphous semiconductor patterns are crystallized. Subsequently, the protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. Then, a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract: A method for fabricating an active device array substrate is provided. A first patterned semiconductor layer, a gate insulator, a first patterned conductive layer and a first dielectric layer is sequentially formed on a substrate. First contact holes exposing the first patterned semiconductor layer are formed in the first dielectric layer and the gate insulator. A second patterned conductive layer and a second patterned semiconductor layer disposed thereon are simultaneously formed on the first dielectric layer. The second conductive layer includes contact conductors and a bottom electrode. The second patterned semiconductor layer includes an active layer. A second dielectric layer having second contact holes is formed on the first dielectric layer, wherein a portion of the second contact holes exposes the active layer. A third patterned conductive layer electrically connected to the active layer through a portion of the second contact holes is formed on the second dielectric layer.

Abstract: A semiconductor device of the present invention is a semiconductor device including a thin film transistor and a thin film diode. A semiconductor layer (113) of the thin film transistor and a semiconductor layer (114) of the thin film diode are both crystalline semiconductor layers. The semiconductor layer (113) of the thin film transistor and the semiconductor layer (114) of the thin film diode respectively include portions formed by crystallizing the same amorphous semiconductor film. The thickness of the semiconductor layer (114) of the thin film diode is greater than the thickness of the semiconductor layer (113) of the thin film transistor. The difference between the thickness of the semiconductor layer (113) of the thin film transistor and the thickness of the semiconductor layer (114) of the thin film diode is greater than 25 nm.

Abstract: A method for fabricating a thin film transistor substrate includes: (a) forming a gate electrode on a substrate using a first photoresist layer; (b) forming an insulating film, an active semiconductor layer, a doped semiconductor layer, an ohmic contact metal film, a passivation film, and a second photoresist layer on the substrate to cover the gate electrode; (c) disposing a multi-tone mask over the second photoresist layer, followed by performing a lithography process to form the second photoresist layer into a patterned photoresist, which has different thicknesses at a location corresponding in position to the gate electrode and on two opposite sides of the location; and (d) performing etching using the patterned photoresist.

Abstract: It is an object of one embodiment of the present invention to manufacture a light-emitting display device by simplifying a manufacturing process of a transistor, without an increase in the number of steps as well as the number of photomasks as compared to those in the conventional case. A step for processing a semiconductor layer into an island shape is omitted by using a high-resistance oxide semiconductor which is intrinsic or substantially intrinsic for the semiconductor layer, used to form transistors. Formation of an opening in the semiconductor layer or an insulating layer formed over the semiconductor layer and etching of an unnecessary portion of the semiconductor layer are performed at the same time; thus, the number of photolithography steps is reduced.

Abstract: Disclosed is a transistor structure including: a first thin film transistor including, a first gate electrode; a first insulating film; a first semiconductor film; and a first light blocking film, and a second thin film transistor including, a second semiconductor film; the second insulating film; a second gate electrode; and a second light blocking film, wherein the first semiconductor film and the second semiconductor film include a first region and a second region along a thickness direction from the first insulating film side; and degree of crystallization of silicon of one of the first region or the second region is higher than the degree of crystallization of silicon of the other of the first region or the second region.

Abstract: A silicon film is crystallized in a predetermined direction by selectively adding a metal element having a catalytic action for crystallizing an amorphous silicon and annealing. In manufacturing TFT using the crystallized silicon film, TFT provided such that the crystallization direction is roughly parallel to a current-flow between a source and a drain, and TFT provided such that the crystallization direction is roughly vertical to a current-flow between a source and a drain are manufactured. Therefore, TFT capable of conducting a high speed operation and TFT having a low leak current are formed on the same substrate.

Abstract: A thin film transistor including a substrate, a semiconductor layer, a patterned doped semiconductor layer, a source and a drain, a gate insulation layer, and a gate is provided. The semiconductor layer is disposed on the substrate. The patterned doped semiconductor layer is disposed on opposite sides of the semiconductor layer. The source and the drain are disposed on the patterned doped semiconductor layer and the opposite sides of the semiconductor layer, wherein a part of the semiconductor layer covered by the source and the drain has a first thickness, a part of the semiconductor layer disposed between the source and the drain and not covered by the source and the drain has a second thickness ranging from 200 ? to 800 ?. The gate insulation layer is disposed on the source, the drain and the semiconductor layer. The gate is disposed on the gate insulation layer.

Abstract: A pixel structure is provided. A first insulating pattern is on the first polysilicon pattern. A second insulating pattern is on the second polysilicon pattern and separated from the first insulating pattern. An insulating layer covers the first and the second insulating patterns. A first gate and a second gate are on the insulating layer. A first covering layer covers the first and the second gates. A first source metal layer and a first drain metal layer are on the first covering layer and electrically connected to a first source region and a first drain region. A second source metal layer and a second drain metal layer are on the first covering layer and electrically connected to a second source region and a second drain region. A pixel electrode is electrically connected to the first drain metal layer.

Abstract: A thin film transistor display panel includes a substrate, a gate wire on the substrate and including a gate line and a gate electrode; a gate insulating layer on the gate wire; a semiconductor layer on the gate insulating layer; a data wire including a source electrode on the semiconductor layer, a drain electrode opposing the source electrode with respect to the gate electrode, and a data line; a passivation layer on the data wire having a contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the contact hole. The gate wire has a first region and second region where the gate line and the gate electrode are positioned, respectively. The thickness of the gate wire in the first region is greater than the thickness of the gate wire in the second region.

Abstract: Disclosed is a thin film transistor which includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode; a semiconductor layer which functions as a channel formation region; and a semiconductor layer including an impurity element imparting one conductivity type. The semiconductor layer exists in a state that a plurality of crystalline particles is dispersed in an amorphous silicon and that the crystalline particles have an inverted conical or inverted pyramidal shape. The crystalline particles grow approximately radially in a direction in which the semiconductor layer is deposited. Vertexes of the inverted conical or inverted pyramidal crystal particles are located apart from an interface between the gate insulating layer and the semiconductor layer.

Abstract: An object is to reduce a capacitance value of parasitic capacitance without decreasing driving capability of a transistor in a semiconductor device such as an active matrix display device. Further, another object is to provide a semiconductor device in which the capacitance value of the parasitic capacitance was reduced, at low cost. An insulating layer other than a gate insulating layer is provided between a wiring which is formed of the same material layer as a gate electrode of the transistor and a wiring which is formed of the same material layer as a source electrode or a drain electrode.

Abstract: In the thin-film transistor device: the stacked thickness of either a source electrode or a drain electrode and a corresponding one of silicon layers is the same value or a value close to the same value as the stacked thickness of a first channel layer and a second channel layer; the stacked thickness of the first channel layer and the second channel layer is the same in a region between the source electrode and the drain electrode and above the source electrode and the drain electrode; the first channel layer and the second channel layer are sunken in the region between the source electrode and the drain electrode, following a shape between the source electrode and the drain electrode; and the gate electrode has one region overlapping with the source electrode and an other region overlapping with the drain electrode.

Abstract: A semiconductor device in which a defect is suppressed and miniaturization is achieved is provided.

Abstract: A method of manufacturing a liquid crystal panel according to the present invention includes the steps of simultaneously forming a gate electrode of a TFT and a lower layer of a marking pad, simultaneously forming a gate insulating film of the TFT and a protective insulating film covering the lower layer, performing various film deposition processes and patterning processes while the lower layer is covered with the protective insulating film, exposing a main surface of the lower layer except for its periphery by removing at least a part of the protective insulating film, simultaneously forming a pixel electrode and an upper layer of the marking pad covering the main surface of the lower layer in a portion not covered with the protective insulating film, and providing marking by providing a through hole by irradiating the marking pad with laser beams. Thus, the marking pad including a metal film provided on a glass substrate for a liquid crystal panel can be prevented from corroding in a production process.

Abstract: A vertical transistor includes a semiconductor substrate provided with a pillar type active pattern over the surface thereof. A first tensile layer is formed over the semiconductor substrate and around the lower end portion of the pillar type active pattern, and a second tensile layer is formed over the upper end portion of the pillar type active pattern so that a tensile stress is applied in a vertical direction to the pillar type active pattern. A first junction region is formed within the surface of the semiconductor substrate below the first tensile layer and the pillar type active pattern. A gate is formed so as to surround at least a portion of the pillar type active pattern. A second junction region is formed within the upper end portion of the pillar type active pattern.

Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a seed over the insulating film by introducing hydrogen and a deposition gas into a first treatment chamber under a first condition and forming a microcrystalline semiconductor film over the seed by introducing hydrogen and the deposition gas into a second treatment chamber under a second condition: a second flow rate of the deposition gas is periodically changed between a first value and a second value; and a second pressure in the second treatment chamber is higher than or equal to 1.0×102 Torr and lower than or equal to 1.0×103 Torr.

Abstract: On a translucent substrate, an insulating film having a refractive index n and an amorphous silicon film are deposited successively. By irradiating the amorphous silicon film with a laser beam having a beam shape of a band shape extending along a length direction with a wavelength ?, a plurality of times from a side of amorphous silicon film facing the insulating film, while an irradiation position of the laser beam is shifted each of the plurality of times in a width direction of the band shape by a distance smaller than a width dimension of the band shape, a polycrystalline silicon film is formed from the amorphous silicon film. Forming the polycrystalline silicon film forms crystal grain boundaries which extend in the width direction and are disposed at a mean spacing measured along the length direction and ranging from (?/n)×0.95 to (?/n)×1.

Abstract: To provide a display device including a thin film transistor in which high electric characteristics and reduction in off-current can be achieved. The display device having a thin film transistor includes a substrate, a gate electrode provided over the substrate, a gate insulating film provided over the gate electrode, a microcrystalline semiconductor film provided over the gate electrode with the gate insulating film interposed therebetween, a channel protection layer which is provided over and in contact with the microcrystalline semiconductor film, an amorphous semiconductor film provided over the gate insulating film and on a side surface of the microcrystalline semiconductor film and the channel protection layer, an impurity semiconductor layer provided over the amorphous semiconductor film, and a source electrode and a drain electrode provided over and in contact with the impurity semiconductor layer.

Abstract: A method includes forming a non-continuous epitaxial layer over a semiconductor substrate. The substrate includes multiple mesas separated by trenches. The epitaxial layer includes crystalline Group III nitride portions over at least the mesas of the substrate. The method also includes depositing a dielectric material in the trenches. The method could also include forming spacers on sidewalls of the mesas and trenches or forming a mask over the substrate that is open at tops of the mesas. The epitaxial layer could also include Group III nitride portions at bottoms of the trenches. The method could further include forming gate structures, source and drain contacts, conductive interconnects, and conductive plugs over at least one crystalline Group III nitride portion, where at least some interconnects and plugs are at least partially over the trenches. The gate structures, source and drain contacts, interconnects, and plugs could be formed using standard silicon processing tools.

Abstract: A method for producing a semiconductor device includes a step of forming a first insulation film, a step of forming a separation layer in a base layer, a step of forming a light-blocking film on the surface of the first insulation film, a step of forming a second insulation film such that the light-blocking film is covered, a step of affixing the base layer provided with the light-blocking film to a substrate, a step of separating and removing along the separation layer a portion of the base layer affixed to the substrate, and a step of forming a semiconductor layer such that at least a portion thereof overlaps with the light-blocking film.

Abstract: In a transistor having a top-gate structure in which a gate electrode layer overlaps with an oxide semiconductor layer which forms a channel region with a gate insulating layer interposed therebetween, when a large amount of hydrogen is contained in the insulating layer, hydrogen is diffused into the oxide semiconductor layer because the insulating layer is in contact with the oxide semiconductor layer; thus, electric characteristics of the transistor are degraded. An object is to provide a semiconductor device having favorable electric characteristics. An insulating layer in which the concentration of hydrogen is less than 6×1020 atoms/cm3 is used for the insulating layer being in contact with oxide semiconductor layer which forms the channel region. Using the insulating layer, diffusion of hydrogen can be prevented and a semiconductor device having favorable electric characteristics can be provided.

Abstract: A thin-film semiconductor device includes, in order, a substrate, a gate electrode, a gate insulating film, a first channel layer, and a second channel layer. The second channel layer includes a protrusion between first top surface end portions. The protrusion has first lateral surfaces that each extend between one of the first top surface end portions and a top surface of the protrusion. An insulation layer is on the top surface of the protrusion. The insulation layer has second lateral surfaces that each extend to one of second top surface end portions of the insulation layer. Two contact layers are each on one of the second top surface end portions of the insulation layer, adjacent one of the second lateral surfaces of the insulation layer, adjacent one of the first lateral surfaces of the protrusion, and on one of the first top surface end portions of the second channel layer. A source electrode is on one of the two contact layers, and a drain electrode is on the other of the two contact layers.

Abstract: A thin film transistor (TFT) having improved characteristics, a method for fabricating the same, and an organic light emitting display device (OLED) including the same. The TFT is constructed with a substrate, a semiconductor layer disposed on the substrate and including a channel region, source and drain regions, a gate insulating layer disposed on the semiconductor layer, a gate electrode disposed on the gate insulating layer and corresponding to the channel region, an interlayer insulating layer disposed on the gate electrode, and source and drain electrodes electrically connected to the source and drain regions of the semiconductor layer. The channel region is made from polycrystalline silicon (poly-Si), and the source and drain regions are made from amorphous silicon (a-Si). The polycrystalline silicon of the channel region is formed by crystallizing amorphous silicon using Joule's heat generated by the gate electrode.

Abstract: Embodiments of a method are provided for fabricating a non-planar semiconductor device including a substrate having a plurality of raised crystalline structures formed thereon. In one embodiment, the method includes the steps of amorphorizing a portion of each raised crystalline structure included within the plurality of raised crystalline structures, forming a sacrificial strain layer over the plurality of raised crystalline structures to apply stress to the amorphized portion of each raised crystalline structure, annealing the non-planar semiconductor device to recrystallize the amorphized portion of each raised crystalline structure in a stress-memorized state, and removing the sacrificial strain layer.

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: forming a SiGe crystal layer on a semiconductor substrate, the SiGe crystal layer having a first plane and a second plane inclined with respect to the first plane; forming an amorphous Si film on the SiGe crystal layer; crystallizing a portion located adjacent to the first and second planes of the amorphous Si film by applying heat treatment using the first and second planes of the SiGe crystal layer as a seed, thereby forming a Si crystal layer; selectively removing or thinning a portion of the amorphous Si film that is not crystallized by the heat treatment; applying oxidation treatment to a surface of the Si crystal layer, thereby forming a gate insulating film on the surface of the Si crystal layer; and forming a gate electrode on the gate insulating film.

Abstract: A thin film transistor including: an active layer formed on a substrate; a gate insulating layer pattern formed on a predetermined region of the active layer; a gate electrode formed on a predetermined region of the gate insulating layer pattern; an etching preventing layer pattern covering the gate insulating layer pattern and the gate electrode; and a source member and a drain member formed on the active layer and the etching preventing layer pattern.

Abstract: Disclosed is a pixel layout structure capable of increasing the capability of detecting amorphous silicon (a-Si) residue defects and a method for manufacturing the same. Wherein, an a-Si dummy layer is disposed on either one side or both sides of each data line. The design of such an a-Si dummy layer is utilized, so that in an existing testing conditions (by making use of an existing automatic array tester in carrying out the test), in case that there exists an a-Si residue in a pixel, the pixel having defects can be detected through an enhanced capacitance coupling effect and an electron conduction effect. Therefore, through the application of the above-mentioned design, the capability of an automatic array tester can effectively be increased in detecting a defective pixel having a-Si residues.

Abstract: A semiconductor device includes a wiring embedded in an insulating layer, an oxide semiconductor layer over the insulating layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate electrode provided to overlap with the oxide semiconductor layer, and a gate insulating layer provided between the oxide semiconductor layer and the gate electrode. The insulating layer is formed so that part of a top surface of the wiring is exposed. The part of the top surface of the wiring is positioned higher than part of a surface of the insulating layer. The wiring in a region exposed from the insulating layer is electrically connected to the source electrode or the drain electrode. The root-mean-square roughness of a region which is part of the surface of the insulating layer and in contact with the oxide semiconductor layer is 1 nm or less.

Abstract: A thin film transistor (TFT) and a fabricating method thereof are provided. The TFT includes a channel layer, an ohmic contact layer, a dielectric layer, a source, a drain, a gate, and a gate insulating layer. The channel layer has an upper surface and a sidewall. The ohmic contact layer is disposed on a portion of the upper surface of the channel layer. The dielectric layer is disposed on the sidewall of the channel layer, and does not overlap with the ohmic contact layer. The source and the drain are disposed on portions of the ohmic contact layer and the dielectric layer. A portion of dielectric layer is not covered by the source or the drain. The gate is above or below the channel layer. The gate insulating layer is disposed between the gate and the channel layer.

Abstract: Disclosed are a compound for an organic electroluminescent device (organic EL device) which is improved in luminous efficiency, fully secured of driving stability, and of simple constitution and an organic EL device using said compound. The compound for an organic EL device has two indolocarbazole skeletons each of which is bonded to an aromatic group or two skeletons similar thereto. The organic EL device comprises a light-emitting layer disposed between an anode and a cathode piled one upon another on a substrate and said light-emitting layer comprises a phosphorescent dopant and the aforementioned compound for an organic EL device as a host material.

Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.

Abstract: Disclosed are an organic electroluminescent device (organic EL device) which is improved in luminous efficiency, fully secured of driving stability, and of simple constitution and a compound useful for the fabrication of said organic EL device. The compound for the organic EL device has an indolocarbazole structure or a structure similar thereto in the molecule wherein an aromatic group is bonded to the nitrogen atom in the indolocarbazole. The organic EL device has a light-emitting layer disposed between an anode and a cathode piled one upon another on a substrate and said light-emitting layer comprises a phosphorescent dopant and the aforementioned compound for an organic electroluminescent device as a host material.

Abstract: A method for manufacturing a display device includes forming an active layer by performing an SPC (solid phase crystallization) process on a first substrate; forming a cushioning layer of amorphous silicon (a-Si) on the active layer under an atmosphere containing about 90 to about 97% by flow rate of hydrogen (H2) and about 10 to about 3% by flow rate of silane (SiH4); forming an N-type impurity layer on the cushioning layer; forming a metal layer to cover the N-type impurity layer; forming a source and drain by removing the metal film by a first etching method; and separating the N-type impurity layer and the cushioning layer by a second etching method.

Abstract: The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 1018/cm3, and a thin film transistor using such an amorphous oxide. In a thin film transistor having a source electrode 6, a drain electrode 5, a gate electrode 4, a gate insulating film 3, and a channel layer 2, an amorphous oxide having an electron carrier concentration less than 1018/cm3 is used in the channel layer 2.