Abstract: Disclosed is a semiconductor light-emitting device wherein a pn junction is formed by forming, as a p-type layer (11), a semiconductor thin film which is composed of a ZnO compound doped with nitrogen on an n-type ZnO bulk single crystal substrate (10) whose resistance is lowered by being doped with donor impurities. It is preferable to form the p-type layer (11) on a zinc atom containing surface of the n-type ZnO bulk single crystal substrate (10).

Abstract: A system and associated process for vapor deposition of a thin film layer on a photovoltaic (PV) module substrate is includes establishing a vacuum chamber and introducing the substrates individually into the vacuum chamber. A conveyor system is operably disposed within the vacuum chamber and is configured for conveying the substrates in a serial arrangement through a vapor deposition apparatus within the vacuum chamber at a controlled constant linear speed. A post-heat section is disposed within the vacuum chamber immediately downstream of the vapor deposition apparatus in the conveyance direction of the substrates. The post-heat section is configured to maintain the substrates conveyed from the vapor deposition apparatus in a desired heated temperature profile until the entire substrate has exited the vapor deposition apparatus.

Abstract: To provide a manufacturing method for an epitaxial wafer that alleviates distortions on a back surface thereof due to sticking between a wafer and a susceptor, thereby preventing decrease in flatness thereof due to a lift pin. A manufacturing method for an epitaxial wafer according to the present invention includes: an oxide film forming step in which an oxide film is formed on a back surface thereof; an etching step in which a hydrophobic portion exposing a back surface of the semiconductor wafer is provided by partially removing the oxide film; a wafer placing step in which the semiconductor wafer is placed; and an epitaxial growth step in which an epitaxial layer is grown on a main surface of the semiconductor wafer; and the diameter of the lift pin installation circle provided on a circle on a bottom face of a susceptor is smaller than that of the hydrophobic portion.

Abstract: Methods for formation of epitaxial layers containing n-doped silicon are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of the n-doped epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source, a carbon source and an n-dopant source. An epitaxial layer may have considerable tensile stress which may be created in a significant amount by a high concentration of n-dopant. A layer having n-dopant may also have substitutional carbon. Phosphorus as an n-dopant with a high concentration is provided. A substrate having an epitaxial layer with a high level of n-dopant is also disclosed.

Abstract: A method of making a semiconductor device includes providing an insulating layer containing a plurality of openings, forming a first semiconductor layer in the plurality of openings in the insulating layer and over the insulating layer, and removing a first portion of the first semiconductor layer, such that first conductivity type second portions of the first semiconductor layer remain in lower portions of the plurality of openings in the insulating layer, and upper portions of the plurality of openings in the insulating layer remain unfilled. The method also includes forming a second semiconductor layer in the upper portions of the plurality of openings in the insulating layer and over the insulating layer, and removing a first portion of the second semiconductor layer located over the insulating layer.

Abstract: Provided herein are multicomponent semiconductor films having a broad range of bandgaps and charge carrier characteristics. The semiconductor films include copper, zinc, tin, at least one substitutional metal and at least one chalcogen. Substitutional metals include those capable of substituting for a portion of copper, zinc, or both in the semiconductor films. Also disclosed are methods for making the films, including single-bath electrodeposition methods, and devices incorporating the films, including photovoltaic devices.

Abstract: A method for manufacturing GaN-based film LED based on masklessly transferring photonic crystal structure is disclosed. Two dimensional photonic crystals are formed on a sapphire substrate. Lattice quality of GaN-based epitaxy on the sapphire substrate is improved, and the internal quantum efficiency of GaN-based LED epitaxy is increased. After the GaN-based film is transferred onto heat sink substrate, the two dimensional photonic crystals structure is masklessly transferred onto the light exiting surface of the GaN-based film by using different etching rates between the GaN material and the SiO2 mask, so that light extraction efficiency of the GaN-based LED is improved. That is, the GaN-based film LED according to the invention has a relatively high illumination efficiency and heat sink.

Abstract: An amorphous oxide containing hydrogen (or deuterium) is applied to a channel layer of a transistor. Accordingly, a thin film transistor having superior TFT properties can be realized, the superior TFT properties including a small hysteresis, normally OFF operation, a high ON/OFF ratio, a high saturated current, and the like. Furthermore, as a method for manufacturing a channel layer made of an amorphous oxide, film formation is performed in an atmosphere containing a hydrogen gas and an oxygen gas, so that the carrier concentration of the amorphous oxide can be controlled.

Abstract: A method of producing a semiconductor optical device includes a first step of growing a stacked semiconductor layer including a first III-V group compound semiconductor layer for an active layer on a substrate; a second step of forming a silicon oxide film on the stacked semiconductor layer, the silicon oxide film having a predetermined film stress and a predetermined thickness; a third step of forming a strip-shaped groove in the silicon oxide film by etching the silicon oxide film, using a resist pattern formed on the silicon oxide film, until a surface of the stacked semiconductor layer is exposed; and a fourth step of growing a second III-V group compound semiconductor layer in the groove using the silicon oxide film as a selective mask.

Abstract: In the method for manufacturing the infrared image sensor, first, a thermal insulation layer (33) is made by forming a silicon dioxide film (31) on a first area (A1) followed by forming a silicon nitride film (32) on the silicon dioxide film (31). The silicon dioxide film (31) has compression stress. The first area (A1) is reserved in a surface of a silicon substrate (1) for forming an infrared detection element (3). The silicon nitride film (32) has tensile stress. Next, a well region (41) is formed in a second area (A2) reserved in the surface of the silicon substrate (1) for forming a MOS transistor (4). After that, a gate insulation film (45) of the MOS transistor (4) is formed by means of thermal oxidation of the surface of the silicon substrate (1). Thereafter, a temperature detection element (36) is formed on the thermal insulation layer (33). Subsequently, a drain region (43) and a source region (44) of the MOS transistor (4) are formed in the well region (41).

Abstract: An organic light emitting display device and a method for manufacturing the same. The organic light emitting display device includes: an insulating layer formed on a substrate; a resistance layer of oxide semiconductor formed on the insulating layer; a wiring layer connected to both side portions of the resistance layer; an organic layer formed on the upper portion including the resistance layer and the wiring layer; and a capping layer formed on the organic layer to be overlapped with the resistance layer.

Abstract: A method of manufacturing a semiconductor for a transistor that includes forming a precursor layer by coating a surface of an insulation substrate with a precursor solution for an oxide semiconductor, forming an oxide semiconductor by oxidizing a portion of the precursor layer, and removing a remaining precursor layer except for the oxide semiconductor.

Abstract: A composition comprises a semiconductor substrate having a crystallographic plane oriented parallel to a surface of the substrate and at least one planar semiconductor nanowire epitaxially disposed on the substrate, where the nanowire is aligned along a crystallographic direction of the substrate parallel to the crystallographic plane. To fabricate a planar semiconductor nanowire, at least one nanoparticle is provided on a semiconductor substrate having a crystallographic plane oriented parallel to a surface of the substrate. The semiconductor substrate is heated within a first temperature window in a processing unit. Semi-conductor precursors are added to the processing unit, and a planar semiconductor nanowire is grown from the nanoparticle on the substrate within a second temperature window. The planar semiconductor nanowire grows in a crystallographic direction of the substrate parallel to the crystallographic plane.

Abstract: A thin film transistor array panel includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a gate insulating layer disposed on the gate line; an semiconductive oxide layer disposed on the gate insulating layer; a data line disposed on the semiconductive oxide layer and including a source electrode; a drain electrode facing the source electrode on the semiconductive oxide layer; and a passivation layer disposed on the data line. The semiconductive oxide layer is patterned with chlorine (Cl) containing gas which alters relative atomic concentrations of primary semiconductive characteristic-providing elements of the semiconductive oxide layer at least at a portion where a transistor channel region is defined.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: An amorphous oxide containing hydrogen (or deuterium) is applied to a channel layer of a transistor. Accordingly, a thin film transistor having superior TFT properties can be realized, the superior TFT properties including a small hysteresis, normally OFF operation, a high ON/OFF ratio, a high saturated current, and the like. Furthermore, as a method for manufacturing a channel layer made of an amorphous oxide, film formation is performed in an atmosphere containing a hydrogen gas and an oxygen gas, so that the carrier concentration of the amorphous oxide can be controlled.

Abstract: A method of forming a thin-film device includes forming an oxide-semiconductor film formed on the first electrical insulator, and forming a second electrical insulator formed on the oxide-semiconductor film, the oxide-semiconductor film defining an active layer. The oxide-semiconductor film is comprised of a first interface layer located at an interface with the first electrical insulating insulator, a second interface layer located at an interface with the second electrical insulator, and a bulk layer other than the first and second interface layers. The method further includes oxidizing the oxide-semiconductor film to render a density of oxygen holes in at least one of the first and second interlayer layers is smaller than a density of oxygen holes in the bulk layer.

Abstract: Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.

Abstract: A graphene device includes a graphene layer and a back gate electrode connected to apply a global electrical bias to the graphene from a first surface of the graphene. At least two graphene device electrodes are each connected to a corresponding and distinct region of the graphene at a second graphene surface. A dielectric layer blanket-coats the second graphene surface and the device electrodes. At least one top gate electrode is disposed on the dielectric layer and extends over a distinct one of the device electrodes and at least a portion of a corresponding graphene region. Each top gate electrode is connected to apply an electrical charge carrier bias to the graphene region over which that top gate electrode extends to produce a selected charge carrier type in that graphene region. Such a carbon structure can be exposed to a beam of electrons to compensate for extrinsic doping of the carbon.

Abstract: A low-defect-density crystalline structure comprising a first crystalline material, a layer of second crystalline material epitaxially grown on the first crystalline material, and a layer of third crystalline material epitaxially grown on the second layer such that the second layer is positioned between the first crystalline material and the third crystalline material. The second and third crystalline materials cooperate to form a desirable relationship. The crystalline structures of the second crystalline material and third crystalline material have a higher crystalline compatibility than the first crystalline material and third crystalline material. The layer of second crystalline material is sufficiently thick to form the desirable relationship with the third crystalline material but sufficiently thin for the layer of second crystalline material to be strained. The layer of third crystalline material is grown to a thickness beyond a thickness had the third layer been grown on an unstrained second layer.

Abstract: Methods, materials, apparatus and systems are described for implementing high-performance arsenic (As)-doped indium oxide (In2O3) nanowires for transparent electronics, including their implementation in transparent thin-film transistors (TTFTs) and transparent active-matrix organic light-emitting diodes (AMOLED) displays. In one implementation, a method of fabricating n-type dopant-doped metal oxide nanowires includes dispersing nanoparticle catalysts on a Si/SiO2 substrate. n-type dopant-doped metal oxide nanowires are grown on the Si/SiO2 substrate using a laser ablation process.

Abstract: Methods of forming planar zinc-oxide based epitaxial layers, associated heterostructures, and devices are provided.

Abstract: The invention, in one aspect, provides a method for fabricating a semiconductor device, which includes conducting an etch through an opening in an emitter layer to form a cavity from an underlying oxide layer that exposes a doped tub. A first silicon/germanium (SiGe) layer, which has a Ge concentration therein, is formed within the cavity and over the doped tub by adjusting a process parameter to induce a strain in the first SiGe layer. A second SiGe layer is formed over the first SiGe layer, and a capping layer is formed over the second SiGe layer.

Abstract: High surface area electrodes are described here. The electrodes comprise a conductive substrate and a mesh of nanostructures disposed on the conductive substrate. The nanostructures are coated with conductive or semiconducting nanoparticles to form a high surface area electrode. Methods for making high surface area electrodes are also provided. Further, energy storage devices incorporating the high surface area electrodes are described. Related systems incorporating energy storage devices are also disclosed.

Abstract: Si(1-v-w-x)CwAlxNv crystals in a mixed crystal state are formed. A method for manufacturing an easily processable Si(1-v-w-x)CwAlxNv substrate, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer are provided. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer 12 (0<v<1, 0<w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate 11 by a pulsed laser deposition method.

Abstract: A method for producing nanostructures (1) on a metal oxide substrate (2) includes the following steps: a) forming metal aggregates (3) on the metal oxide substrate (2); and b) vapor phase growing nanostructures (1) on the metal oxide substrate (2) covered with metal aggregates, the substrate being heated in the presence of one or more precursor gases, and the vapor phase growth of nanostructures (1) being catalyzed by the metal aggregates (3). The metal aggregate formation stage a) includes an operation for reducing the surface of the metal oxide substrate by reductive plasma treatment, causing droplets of metal aggregates (3) to form on the substrate (2), the metal aggregate formation stage a) and the nanostructure growth stage b) being carried out in series in a single shared plasma reactor chamber (4), the nanostructure growth being directly carried out on the droplets of metal aggregates (3).

Abstract: A method of manufacturing a semiconductor device includes steps of forming a gate electrode over a light-transmitting substrate, forming a gate insulating layer containing an inorganic material over the gate electrode and the substrate, forming an organic layer containing a photopolymerizable reactive group over the gate insulating layer, polymerizing selectively the organic layer by irradiating the organic layer with light from back side of the substrate, using the gate electrode as a mask, forming an organic polymer layer by removing a residue of the organic layer, being other than polymerized, forming an organosilane film including a hydrolytic group over the gate insulating layer in a region other than a region in which the organic polymer layer is formed, forming source and drain electrodes by applying a composition containing a conductive material over the organic polymer layer, and forming a semiconductor layer over the gate electrode, the source and drain electrodes.

Abstract: A method for fabricating a hollow nanotube structure is disclosed. The method includes the steps of providing a substrate, developing a plurality of nanowires on the substrate with a predetermined size on the seed layer at relatively low temperature by a hydro-thermal growth method, forming an outer covering layer on the surfaces of the nanowires, selectively etching an upper end of the outer coating layer to expose an upper end of the nanowires and removing the nanowires to remain the hollow outer coating layer to form a plurality of hollow nanotubes. The method can simplify the nanotube manufacturing process, increase the dimension precision of the nanotubes and enhance the photoelectric properties of micro-electro-mechanical elements.

Abstract: An apparatus for depositing a solid film onto a substrate from a reagent solution includes reservoirs of reagent solutions maintained at a sufficiently low temperature to inhibit homogeneous reactions within the reagent solutions. The chilled solutions are dispensed through showerheads, one at a time, onto a substrate. One of the showerheads includes a nebulizer so that the reagent solution is delivered as a fine mist, whereas the other showerhead delivers reagent as a flowing stream. A heater disposed beneath the substrate maintains the substrate at an elevated temperature at which the deposition of a desired solid phase from the reagent solutions may be initiated. Each reagent solution contains at least one metal and either S or Se, or both. At least one of the reagent solutions contains Cu. The apparatus and its associated method of use are particularly suited to forming films of Cu-containing compound semiconductors.

Abstract: Provided are a method of manufacturing a transparent N-doped p-type ZnO semiconductor layer using a surface chemical reaction between precursors containing elements constituting thin layers, and a thin film transistor (TFT) including the p-type ZnO semiconductor layer. The method includes the steps of: preparing a substrate and loading the substrate into a chamber; injecting a Zn precursor and an oxygen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the oxygen precursor using an atomic layer deposition (ALD) technique to form a ZnO thin layer on the substrate; and injecting a Zn precursor and an nitrogen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the nitrogen precursor to form a doping layer on the ZnO thin layer.

Abstract: Provided is a method of manufacturing a sensor structure, where vertically-well-aligned nanotubes are formed and the sensor structure having an excellent performance can be manufactured at the room temperature at low cost by using the nanotubes. The method of manufacturing a sensor structure includes: (a) forming a lower electrode on a substrate; (b) forming an organic template having a pore structure on the lower electrode; (c) forming a metal oxide thin film in the organic template; (d) forming a metal oxide nanotube structure, in which nanotubes are vertically aligned and upper portions thereof are connected to each other, by removing the organic template through a dry etching method; and (e) forming an upper electrode on the upper portions of the nanotubes.

Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device including a transistor with stable electric characteristics. A method for manufacturing a semiconductor device includes the steps of: forming a gate electrode over a substrate having an insulating surface; forming a gate insulating film over the gate electrode; forming an oxide semiconductor film over the gate insulating film; irradiating the oxide semiconductor film with an electromagnetic wave such as a microwave or a high frequency; forming a source electrode and a drain electrode over the oxide semiconductor film irradiated with the electromagnetic wave; and forming an oxide insulating film, which is in contact with part of the oxide semiconductor film, over the gate insulating film, the oxide semiconductor film, the source electrode, and the drain electrode.

Abstract: A method for fabricating a field-effect transistor having a gate electrode, a source electrode, a drain electrode, and an active layer forming a channel region, the active layer having an oxide semiconductor mainly containing magnesium and indium is disclosed. The method includes a deposition step of depositing an oxide film, a patterning step of patterning the oxide film by processes including etching to obtain the active layer, and a heat-treatment step of heat-treating the obtained active layer subsequent to the patterning step.

Abstract: A method of manufacturing an electronic device includes: preparing a film-attached substrate including a substrate, and an oxide semiconductor film containing In, Ga, and Zn and a metal film containing at least one of W or Mo provided in this order on the substrate; and wet-etching the metal film of the film-attached substrate using an etching liquid of which a main component is hydrogen peroxide under conditions such that an etching selection ratio between the metal film and the oxide semiconductor film (etching rate of the metal film/etching rate of the oxide semiconductor film) is 100 or higher.

Abstract: A highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics, and a manufacturing method thereof. In the manufacturing method of the semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region is an oxide semiconductor layer, heat treatment which reduces impurities such as moisture to improve the purity of the oxide semiconductor layer and oxidize the oxide semiconductor layer (heat treatment for dehydration or dehydrogenation) is performed. Not only impurities such as moisture in the oxide semiconductor layer but also those existing in a gate insulating layer are reduced, and impurities such as moisture existing in interfaces between the oxide semiconductor layer and films provided over and under and in contact with the oxide semiconductor layer are reduced.

Abstract: A method of forming an organic thin film transistor comprising source and drain electrodes with a channel region therebetween, a gate electrode, a dielectric layer disposed between the source and drain electrodes and the gate electrode, and an organic semiconductor disposed in at least the channel region between the source and drain electrodes, said method comprising: seeding a surface in the channel region with crystallization sites prior to deposition of the organic semiconductor; and depositing the organic semiconductor onto the seeded surface whereby the organic semiconductor crystallizes at the crystallization sites forming crystalline domains in the channel region.

Abstract: An oxide semiconductor target of a ZTO (zinc tin complex oxide) type oxide semiconductor material of an appropriate (Zn/(Zn+Sn)) composition having high mobility and threshold potential stability and with less restriction in view of the cost and the resource and with less restriction in view of the process, and an oxide semiconductor device using the same, in which a sintered Zn tin complex oxide with a (Zn/(Zn+Sn)) composition of 0.6 to 0.8 is used as a target, the resistivity of the target itself is at a high resistance of 1 ?cm or higher and, further, the total concentration of impurities is controlled to 100 ppm or less.

Abstract: The semiconductor device has: a ZnO-containing substrate containing Li; a zinc silicate layer formed above the ZnO-containing substrate; and a semiconductor layer epitaxially grown relative to the ZnO-containing substrate via the zinc silicate layer.

Abstract: A nitride semiconductor single crystal substrate, a manufacturing method thereof and a method for manufacturing a vertical nitride semiconductor device using the same. According to an aspect of the invention, in the nitride semiconductor single crystal substrate, upper and lower regions are divided along a thickness direction, the nitride single crystal substrate having a thickness of at least 100 ?m. Here, the upper region has a doping concentration that is five times or greater than that of the lower region. Preferably, a top surface of the substrate in the upper region has Ga polarity. Also, according to a specific embodiment of the invention, the lower region is intentionally un-doped and the upper region is n-doped. Preferably, each of the upper and lower regions has a doping concentration substantially identical in a thickness direction.

Abstract: The present invention is directed to methods for depositing doped and/or alloyed semiconductor layers, an apparatus suitable for the depositing, and products prepared therefrom.

Abstract: Devices and methods of fabricating a conductive pattern of such devices comprise a non-single crystalline semiconductor pattern formed on a single crystalline semiconductor substrate, an insulating spacer formed on a sidewall of the non-single crystalline semiconductor pattern, the non-single crystalline semiconductor pattern selectively recessed using a cyclic selective epitaxial growth (SEG) process, and a silicide layer formed on the recessed non-single crystalline semiconductor pattern.

Abstract: In manufacturing a semiconductor device, a first chamber is provided. An opening couples the first chamber to a first environment through which at least one substrate can pass. A first seal environmentally isolates the first chamber from the first environment. A process chamber is coupled to the first chamber. Another seal environmental isolates the first and the process chambers. The substrate is placed within the first chamber, and the first chamber and the outside environment are isolated. The second opening is opened, and the substrate moves into the semiconductor process chamber. The first chamber is again environmentally isolated from the second volume. A semiconductor processing step is performed on the substrate within the processing chamber. While the substrate is processed, the substrate is rotated and translated through the processing chamber.

Abstract: The present invention advantageously provides for, in different embodiments, low-cost deposition techniques to form high-quality, dense, well-adhering Group IBIIIAVIA compound thin films with macro-scale as well as micro-scale compositional uniformities. It also provides methods to monolithically integrate solar cells made on such compound thin films to form modules. In one embodiment, there is provided a method of growing a Group IBIIIAVIA semiconductor layer on a base, and includes the steps of depositing on the base a nucleation and/or a seed layer and electroplating over the nucleation and/or the seed layer a precursor film comprising a Group IB material and at least one Group IIIA material, and reacting the electroplated precursor film with a Group VIA material. Other embodiments are also described.

Abstract: A vanadium dioxide nanowire grown long and thin along a [110] direction is disclosed.

Abstract: Coated substrates and methods for coating substrates, for example, a self-assembly method, disclosed herein are useful for, for example, photovoltaic cells.

Abstract: Provided are a ZnO-based substrate having a high-quality surface suitable for crystal growth, a method for processing the ZnO-based substrate, and a ZnO-based semiconductor device. The ZnO-based substrate is formed such that any one of a carboxyl group and a carbonate group is substantially absent in a principal surface on a crystal growth side. Also, in order for a carboxyl group or a carbonate group to be substantially absent, any one of oxygen radicals, oxygen plasma and ozone is brought into contact with the surface of the ZnO-based substrate before the crystal growth is started. Consequently, cleanness of the surface of the ZnO substrate is enhanced, thereby enabling fabrication of a high-quality ZnO-based thin film on the substrate.

Abstract: There is provided a method of manufacturing a field-effect transistor, in which on a electroconductive layer including a source electrode, a drain electrode and pixel electrode formed by a conductive layer-forming, an inorganic insulating layer containing an inorganic material as a main component is formed so as to cover the electroconductive layer and an oxide semiconductive layer, and after a photoresist film is formed on the inorganic insulating layer and is exposed in a pattern shape, a resist pattern is formed by being developed using a developer in development, and by removing the area exposed from the resist pattern in the inorganic insulating layer by using the developer as an etching liquid, a part of the electroconductive layer is exposed, thereby forming a contact hole; a field-effect transistor, a display device and an electromagnetic wave detector.

Abstract: An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. A thin film transistor using an oxide semiconductor layer is formed in such a manner that buffer layers having higher conductivity than the oxide semiconductor layer are formed over the oxide semiconductor layer, source and drain electrode layers are formed over the buffer layers, and the oxide semiconductor layer is electrically connected to the source and drain electrode layers with the buffer layers interposed therebetween. In addition, the buffer layers are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere, whereby the buffer layers having higher conductivity than the oxide semiconductor layer are obtained.

Abstract: A nitride semiconductor chip is provided that offers enhanced luminous efficacy as a result of an improved EL emission pattern. The nitride semiconductor laser chip (nitride semiconductor chip) has an n-type GaN substrate having as a principal growth plane a plane having an off-angle in the a-axis direction relative to the m plane, and a nitride semiconductor layer formed on the principal growth plane of the n-type GaN substrate. The n-type GaN substrate includes a depressed portion (carved region), which is carved from the principal growth plane in the thickness direction, and an uncarved region, which is a region not carved. The nitride semiconductor layer formed on the n-type GaN substrate has a gradient thickness region whose thickness decreases in a gradient fashion toward the depressed portion (carved region) and an emission portion formation region whose thickness varies very little. In the emission portion formation region 6, a ridge portion is formed.

Abstract: A method for preparing a metal sulfide thin film using ALD and structures incorporating the metal sulfide thin film. The method includes providing an ALD reactor, a substrate, a first precursor comprising a metal and a second precursor comprising a sulfur compound. The first and the second precursors are reacted in the ALD precursor to form a metal sulfide thin film on the substrate. In a particular embodiment, the metal compound comprises Bis(N,N?-di-sec-butylacetamidinato)dicopper(I) and the sulfur compound comprises hydrogen sulfide (H2S) to prepare a Cu2S film. The resulting metal sulfide thin film may be used in among other devices, photovoltaic devices, including interdigitated photovoltaic devices that may use relatively abundant materials for electrical energy production.