Abstract: A semiconductor device is designed such that a semiconductor sensor chip having a diaphragm for detecting pressure variations based on the displacement thereof is fixed onto the upper surface of a substrate having a rectangular shape, which is covered with a cover member so as to form a hollow space embracing the semiconductor sensor chip between the substrate and the cover member. Herein, the substrate is sealed with a molded resin such that chip connection leads packaging leads are partially exposed externally of the molded resin; the chip connection leads are electrically connected to the semiconductor sensor chip and are disposed in line along one side of the semiconductor sensor chip; and the packaging leads are positioned opposite the chip connection leads by way of the semiconductor sensor chip. Thus, it is possible to downsize the semiconductor device without substantially changing the size of the semiconductor sensor chip.

Abstract: According to one embodiment, an electronic apparatus comprises a frame with a hollow portion formed inside thereof, a shield coating applied to the inner surface of the frame, a plurality of connection terminals having lead portions provided on the outside surface of the frame, and a module substrate which mounts circuit components on the front and rear surfaces thereof and which is placed on the frame in a state where at least the rear side circuit components are housed in the hollow portion with the circuit components on the front and rear surfaces connected to the connection terminals.

Abstract: A device according to the present invention includes a MEMS device supported on a first side of a die. A first side of an isolator is attached to the first side of the die. A package is attached to the first side of the isolator, with at least one electrically conductive attachment device attaching the die to the isolator and attaching the isolator to the package. The isolator may include isolation structures and a receptacle.

Abstract: The invention relates to an RFID medium 1 in which an interposer 10 having a semiconductor chip 11 mounted on a sheet-like chip holding member 13 is bonded to a sheet-like base circuit sheet 20. The interposer 10 has the IC chip 11 mounted on a substantially planar surface of the chip holding member 13, and an interposer terminal that is electrically extended from a terminal of the IC chip 11. The base circuit sheet 20 has a base terminal 22 electrically connected to the interposer terminal 12, and has a through chip housing portion 210 for housing the semiconductor chip 11 on the interposer 10.

Abstract: A method of manufacturing a package board is disclosed. The method is for manufacturing a package board that has a pad electrically connected with a component, and includes: forming an indentation, which is in correspondence with the pad, in one side of a first insulating layer; filling a metal paste in the indentation; mounting the component on the first insulating layer in correspondence with a location of the indentation; and hardening the metal paste. Using this method, damage to the component can be prevented during the forming of vias, as the component is mounted after filling paste in an indentation formed in an insulating layer.

Abstract: An apparatus and method for sensor architecture based on bulk machining of silicon wafers and fusion bond joining which provides a nearly all-silicon, hermetically sealed, microelectromechanical system (MEMS) device. An example device includes a device sensor mechanism formed in an active semiconductor layer and separated from a handle layer by a dielectric layer, and a silicon cover plate having a handle layer with a dielectric layer being bonded to portions of the active layer. Pit are included in one of the handle layers and corresponding dielectric layers to access electrical leads on the active layer. Another example includes set backs from the active components formed by anisotropically etching the handle layer while the active layer has been protectively doped.

Abstract: Provided is a wafer-level image sensor module including a wafer; an image sensor mounted on the wafer; a transparent member installed above the top surface of the wafer so as to seal the image sensor; a plurality of vias formed in the wafer so as to be positioned outside the transparent member; a plurality of upper pads formed on the upper ends of the respective vias; an encapsulation portion formed on the top surface of the wafer so as to be positioned outside the transparent member; and a plurality of external connection members that are electrically connected to the lower ends of the respective vias.

Abstract: A packaged semiconductor device (450) includes a semiconductor chip (400) having at least one selectively thinned substrate (cavity) region (410). A package (460) is provided for mounting, enclosing and electrically connecting the chip (400) to the outside world, and structure for applying external stress (470) to induce strain in the thinned substrate region (410). The external stress is preferably adjustable, such as by varying the gas flow (or a vacuum) applied through a pressure valve.

Abstract: A circuit board structure and a fabrication method thereof are disclosed. The circuit board structure includes a carrying board having a first and an opposite second surface and having at least one through cavity formed therein; a semiconductor chip disposed in the through cavity of the carrying board; an adhesive material filling the gap between the through cavity of the carrying board and the semiconductor chip to fix the semiconductor chip in the through cavity; and a reinforcing layer disposed on the second surface of the carrying board and the inactive surface of the semiconductor chip, thereby increasing the strength of the carrying board as well as the reliability of the circuit board.

Abstract: Semiconductor module comprising semiconductor chips in a plastic housing in separate regions and method for producing the same The invention relates to a semiconductor module (9) comprising semiconductor chips (1, 2) in a plastic housing (3) in separate regions (4, 5), and to a method for producing the same. In this case, the semiconductor module (9) has adjacent regions (4, 5) on a common wiring substrate (7) in a common plastic housing composition (6), said regions being thermally decoupled by a thermal barrier (8). Semiconductor chips whose evolution of heat loss differs are arranged in these thermally separate regions (4, 5), the thermal barrier (8) ensuring that the function of the more thermally sensitive semiconductor chip (2) is not impaired by the heat-loss-generating semiconductor chip (1).

Abstract: A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit pattern on one side of a seed layer by use of a first dry film; (b) laminating a second dry film on the first dry film, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer. The method in accordance with the present invention can mount a plurality of integrated circuits by reducing the thickness of a substrate on a package on package.

Abstract: A power semiconductor module comprising a housing of a first plastic, at least one substrate carrier with a circuit constructed thereon and electric terminating elements extending therefrom. The housing includes attachment means for its permanent connection with the substrate carrier. The housing has a permanently elastic sealing device of a second plastic which is formed integrally with the housing and encircles and is directed towards a first inner main surface of the substrate carrier. A method for constructing such a module includes the steps of constructing a housing of a first mechanically stable plastic and a sealing device of a second permanently elastic plastic; disposing the at least one substrate carrier on the housing; and permanently connecting the housing to the substrate carrier.

Abstract: A method for manufacturing a cover assembly including a transparent window portion and a frame of gas-impervious material that can be hermetically attached to a micro-device package base to form a hermetically sealed micro-device package. First a frame of gas-impervious material is provided the frame having a continuous sidewall defining a frame aperture there through. The sidewall includes a frame seal-ring area circumscribing the frame aperture. A sheet of a transparent material is also provided, the sheet having a window portion defined thereupon. The window portion has finished top and bottom surfaces. A sheet seal-ring area is prepared on the sheet, the sheet seal-ring area circumscribing the window portion. The frame is positioned against the sheet such that at least a portion of the frame seal-ring area and at least a portion of the sheet seal-ring area contact one another along a continuous junction region that circumscribes the window portion.

Abstract: Methods for manufacturing an integrated wafer scale package that reduces a potential misalignment between a chip and a pocket of a carrier substrate. According to one aspect of the present invention, a method for manufacturing a semiconductor device includes a photoresist layer disposed on a carrier substrate, a chip placed onto a surface of the photoresist layer. The photoresist layer is patterned using the chip as a mask. The chip is removed from the photoresist layer after the patterning step. A pocket is formed in the carrier substrate, and the chip that was removed is placed into the pocket formed in the carrier substrate.

Abstract: A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to encapsulate the chip and the passive component, wherein the cutaway corner of the encapsulant is spaced apart from the slanted side of the opening by a predetermined distance. A singulation process is performed to cut the encapsulant to form a package with a chamfer. The package is embedded in a lid to form the semiconductor device, wherein a portion of the substrate located between the slanted side of the opening and the cutaway corner of the encapsulant is exposed from the encapsulant to form an exposed portion. The present invention also provides a carrier for the semiconductor device.

Abstract: A packaged device includes a package having an inner surface defining a closed internal space, a device chip fixed to the package in the internal space, and a parylene film covering at least a part of the inner surface of the package and/or at least a part of a surface of the device chip.

Abstract: An electronic component package, includes a package substrate portion constructed by a silicon substrate in which a through hole is provided, an insulating layer formed on both surface sides of the silicon substrate and an inner surface of the through hole, and a through electrode filled in the through hole, and a frame portion provided upright on a peripheral portion of the package substrate portion to constitute a cavity on the silicon substrate, wherein an upper surface of the through electrode in the cavity is planarized such that a height of the through electrode is set equal to a height of the insulating layer. The frame portion is joined to the package substrate portion by the low-temperature joining utilizing the plasma process after the through electrode is planarized.

Abstract: Methods of making a microelectromechanical system (MEMS) device are described. In some embodiments, the method includes forming a sacrificial layer over a substrate, treating at least a portion of the sacrificial layer to form a treated sacrificial portion, forming an overlying layer over at least a part of the treated sacrificial portion, and at least partially removing the treated sacrificial portion to form a cavity situated between the substrate and the overlying layer, the overlying layer being exposed to the cavity.

Abstract: A semiconductor module structure and a method of forming the semiconductor module structure are disclosed. The structure incorporates a die mounted on a substrate and covered by a lid. A thermal compound is disposed within a thermal gap between the die and the lid. A barrier around the periphery of the die extends between the lid and the substrate, contains the thermal compound, and flexes in response to expansion and contraction of both the substrate and the lid during cycling of the semiconductor module. More particularly, either the barrier is formed of a flexible material or has a flexible connection to the substrate and/or to the lid. The barrier effectively contains the thermal compound between the die and the lid and, thereby, provides acceptable and controlled coverage of the thermal compound over the die for heat removal.

Abstract: A stress-isolated MEMS device (14) includes a platform (26) suspended over a substrate wafer (24). In one embodiment, the platform (26) is suspended by springs (38), but other suspension techniques may also be used. A transducer (28) is formed over the platform (26). The transducer (28) includes immovable portions (50) and movable portions (52). The transducer (28) and platform (26) are sealed within a cavity (62) formed within a cap support (30) between a cap wafer (32) and the substrate wafer (24). A leadframe (22) is affixed to the substrate wafer (24). The cap wafer (32) and other portions of the device (14) become embedded in a package material (20) so that a substantially solid boundary forms between the cap wafer (32) and the package material (20).

Abstract: Provided are a wafer level package and a wafer level packaging method, which are capable of performing an attaching process at a low temperature and preventing contamination of internal devices. In the wafer level package, a device substrate includes a device region, where a device is formed, and internal pads on the top surface. The internal pads are electrically connected to the device. A cap substrate includes a getter corresponding to the device on the bottom surface. A plurality of sealing/attaching members are provided between the device substrate and the cap substrate to attach the device substrate and the cap substrate and seal the device region and the getter. The sealing/attaching members are formed of polymer. A plurality of vias penetrate the cap substrate and are connected to the internal pads.

Abstract: A microelectronic package including a dielectric layer having top and bottom surfaces, the dielectric layer having terminals exposed at the bottom surface; a metallic wall bonded to the dielectric layer and projecting upwardly from the top surface of the dielectric layer and surrounding a region of the top surface; a metallic lid bonded to the wall and extending over the region of the top surface so that the lid, the wall and the dielectric layer cooperatively define an enclosed space; and a microelectronic element disposed within the space and electrically connected to the terminals.

Abstract: By joining a lid member to a base member, internal electrodes put in contact with the lid member and an electronic device connected to the internal electrodes are placed in an internal space located in between the base member and the lid member. Then, by performing etching from a surface of the lid member on the side opposite from the base member by a prescribed method, through holes that reach the surface of the internal electrodes are formed. A conductive material is given to the through holes, and external electrodes connected to the internal electrodes are formed in a plane, completing a thin type electronic device package.

Abstract: A wafer level packaging cap for covering a device wafer with a device thereon and a fabrication method thereof are provided. The method includes operations of forming a plurality of connection grooves on a wafer, forming a seed layer on the connection grooves, forming connection parts by filling the connection grooves with a metal material, forming cap pads on a top surface of the wafer to be electrically connected to the connection parts, bonding a supporting film with the top surface of the wafer on which the cap pads are formed, forming a cavity on a bottom surface of the wafer to expose the connection parts through the cavity, and forming metal lines on the bottom surface of the wafer to be electrically connected to the connection parts.

Abstract: In accordance with the present invention, accurate and easily controlled sloped walls may be formed using. AlN and preferably a heated TMAH for such purpose as the fabrication of MEMS devices, wafer level packaging and fabrication of fluidic devices. Various embodiments are disclosed.

Abstract: An electronic component package includes a dielectric substrate having a first surface where an electronic component is sealed. A first signal line connecting to the electronic component and a first ground conductor are formed on the first surface of the dielectric substrate. A second signal line connected to an outside connection electrode and a second ground conductor are formed on a second surface of the dielectric substrate. The first ground conductor and the second ground conductor are connected by a plurality of ground conductor via-holes. A substrate-buried signal line connected to the first signal line and the second signal line is provided inside of the dielectric substrate so as to be put between the first ground conductor and the second ground conductor above and below and between the ground conductor via-holes on the right and left.

Abstract: Aluminum or aluminum alloy on each of a pair of semiconductor wafers is thermocompression bonded. Aluminum-based seal rings or electrical interconnects between layers may be thus formed. On a MEMS device, the aluminum-based seal ring surrounds an area occupied by a movably attached microelectromechanical structure. According to a manufacturing method, wafers have an aluminum or aluminum alloy deposited thereon are etched to form an array of aluminum-based rings. The wafers are placed so as to bring the arrays of aluminum-based rings into alignment. Heat and compression bonds the rings. The wafers are singulated to separate out the individual semiconductor devices each with a bonded aluminum-based ring.

Abstract: A method for manufacturing semiconductor packages is provided. The upper surface of a substrate has a plurality of slots and surface mount devices are positioned across the slots. In this circumstance, the space below the surface mount devices can be filled up with sealant as a result of the arrangement of the slots. This can avoid the occurrence of the melted solders to bridge to each other and of the tomb stone effect of the surface mount devices.

Abstract: According to an exemplary embodiment, a system-in-package includes at least one semiconductor die situated over a package substrate. The system-in-package further includes a wall structure situated on the at least one semiconductor die. The system-in-package further includes an integrated passive cap situated over the wall structure, where the integrated passive cap includes at least one passive component. The wall structure and the integrated passive cap form an air cavity over the at least one semiconductor die. The system-in-package can further include at least one bond pad situated on a cap substrate. The at least one bond pad on the cap substrate of the integrated passive cap can be electrically connected to a substrate bond pad on the package substrate.

Abstract: A plurality of individual MEMS packages are formed as a contiguous unit and each of the plurality of individual MEMS packages include at least one acoustic port. One or more separation boundaries from where to separate adjacent ones of the plurality of individual MEMS packages are determined. Each of the plurality of individual MEMS packages are subsequently separated from the others according to the one or more separation boundaries to provide separate and distinct individual MEMS packages. Each acoustic port disposed within each separate and distinct individual MEMS package is exposed due to the separating so as to allow sound energy to enter each separate and distinct individual MEMS package.

Abstract: A semiconductor device includes an outer resin case having a peripheral wall and terminal mounting holes formed in the peripheral wall, and a layer assembly provided in the outer resin case. The layer assembly includes a semiconductor chip, an insulating circuit board on which the semiconductor chip is mounted, and a heat-dissipating metal base. External terminals having leg portions are arranged in mounting holes of the peripheral wall, and are press-fitted into the terminal-mounting holes. Bonding wires connect the terminal leg portions and a conductive pattern of the insulating circuit board or the semiconductor chip.

Abstract: Variations in fastening positions of semiconductor elements are eliminated by forming protrusions on a die pad so as to enclose the semiconductor elements before an adhesive that fastens the semiconductor elements to the die pad is wetted and spread.

Abstract: The invention discloses a subminiature electronic device with a hermetic cavity and method of manufacturing the same. It particularly relates to a chip type or chip scale packaged electronic device produced in substrate level. Firstly, a sacrificial layer is coated onto each of the identical microstructures disposed on a large substrate. A protective layer containing glass powders is then applied to encapsulate the sacrificial layer. Afterwards, the sacrificial layer is removed so as to form a cavity between the microstructure and the protective layer. The whole protective layer is then melted at elevated temperature to seal the cavity in an environment of specific gas. Finally, the large substrate is diced into a plurality of individual devices with a hermetic cavity over the microstructure. The applicable fields include micro-electronic circuits, micro-vibration systems, micro electrical-mechanical systems (MEMS), and gas discharge apparatuses.

Abstract: Hermetically sealed packages having organic electronic devices are presented. A number of sealing mechanisms are provided to hermetically seal the package to protect the organic electronic device from environmental elements. A metal alloy sealant layer is employed proximate to the organic electronic device. Alternatively, a metal alloy sealant layer in combination with primer layer may also be implemented. Further, superstrates and edge wraps may be provided to completely surround the organic electronic device.

Abstract: A micromachined sensor and a process for fabrication and vertical integration of a sensor and circuitry at wafer-level. The process entails processing a first wafer to incompletely define a sensing structure in a first surface thereof, processing a second wafer to define circuitry on a surface thereof, bonding the first and second wafers together, and then etching the first wafer to complete the sensing structure, including the release of a member relative to the second wafer. The first wafer is preferably a silicon-on-insulator (SOI) wafer, and the sensing structure preferably includes a member containing conductive and insulator layers of the SOI wafer. Sets of capacitively coupled elements are preferably formed from a first of the conductive layers to define a symmetric capacitive full-bridge structure.

Abstract: A broadband surface mounting package includes a housing having a flat bottom wall forming parallel first and second surfaces. An integral wall forms, with the bottom wall, an enclosure having a top opening to provide access to an interior compartment or cavity to receive a microwave component. The second surface is arranged to contact a printed circuit board (PCB) for attachment to lands or pads on the PCB. Cylindrical holes in the enclosure each defines an axis parallel to the bottom wall, and has a dimension, generally transverse to the bottom wall, to extend from the second surface to at least the first surface, and has an axial length sufficient to provide a through hole in the wall and a gap within the bottom wall proximate to and inwardly from the wall.

Abstract: A stacked package includes a printed circuit board (PCB), a plurality of semiconductor chips, plugs and a controller. The semiconductor chips are sequentially stacked on the PCB. The plugs electrically connect each of the semiconductor chips to the PCB. The controller is disposed in any one of the semiconductor chips. The controller is electrically coupled to the plugs. Thus, the controller may be built in the semiconductor chip by a separate process so that a mechanical impact generated in a process for bonding the controller is not applied to the semiconductor chips. Further, a mechanical impact applied to the controller, which is generated in a process for forming a protection member, may be reduced.

Abstract: A semiconductor card package and a method of manufacturing the semiconductor cared package are provided. The package may include a housing having a cavity. The cavity may have a size corresponding to at least one standard semiconductor package. External terminals may be exposed on the outside of the housing. Internal terminals may be disposed in the cavity. At least one internal semiconductor package may be inserted into the cavity. The internal semiconductor package includes I/O terminals. Each of the I/O terminals is connected to a corresponding one of the internal terminals.

Abstract: A package includes a substrate provided with a passing opening and a MEMS device. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated sensitive to the chemical/physical variations of a fluid. The active surface of the MEMS device faces the substrate and is spaced therefrom, the sensitive portion being aligned to the passing opening. A protective package incorporates the MEMS device and the substrate, leaving at least the sensitive portion of the MEMS device exposed through the passing opening of the substrate.

Abstract: The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink.

Abstract: The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die disposed within the die receiving through hole; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; and a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure.

Abstract: A semiconductor device (1) of the present invention includes a semiconductor element (103) including electrode parts (104), and a wiring substrate (108) including an insulation layer (101), electrode-part-connection electrodes (102) provided in the insulation layer (101), and external electrodes (107) that is provided in the insulation layer (101) and that is connected electrically with the electrode-part-connection electrodes (102), in which the electrode parts (104) and the electrode-part-connection electrodes (102) are connected electrically with each other. The insulation layer (101) has an elastic modulus measured according to JIS K6911 of not less than 0.1 GP a and not more than 5 GPa, and the electrodes (104) and the electrode-part-connection electrodes (102) are connected by metal joint.

Abstract: A semiconductor package includes a semiconductor chip, a first substrate layer and a second substrate layer. The semiconductor chip has an active surface and a plurality of pads disposed on the active surface. The first substrate layer is formed on the active surface of the semiconductor chip and has a plurality of first contacts electrically connected to the pads of the semiconductor chip. The second substrate layer is substantially smaller than the first substrate layer, is formed on the first substrate layer, and has a plurality of second contacts electrically connected to the first contacts of the first substrate layer.

Abstract: The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment. The transfer mold is then filled with molding compound.

Abstract: A method is described for mounting semiconductor chips and a corresponding semiconductor chip system. The method may include providing a semiconductor chip having a surface that includes a diaphragm region and a peripheral region, the peripheral region having a mounting region, and a cavity being disposed underneath the diaphragm region, which extends into the mounting region and ends there in an opening. The method may also include providing a substrate which has a surface having a recess; mounting the mounting region of the semiconductor chip in flip-chip technology onto the surface of the substrate in such a way that an edge of the recess lies between the mounting region and the diaphragm region and the opening faces in the direction of the substrate.

Abstract: A method (200) is provided for reducing stresses applied to one or more bonded interconnects (106) of a substrate (103) and a PCB (Printed Circuit Board) (104). The method comprises the steps of coupling (204) a compound (108) on a top surface of the substrate, wherein the compound has the property of expanding when a heat profile is applied thereto, coupling (206) a cover (102) to the PCB that overhangs at least a portion of the compound, and applying (208) the heat profile to the compound and optionally the cover and/or PCB. More than one apparatus implementing the method is also included.

Abstract: A method for packaging a micro device includes encapsulating a micro device in a chamber on a substrate, wherein the chamber is defined by spacer walls and an encapsulation cover, removing a portion of the encapsulation cover and portions of the spacer walls to expose a surfaces of the spacer walls, and forming a layer of a sealing material on the exposed surfaces of the spacer walls to hermetically seal the micro device in the chamber.

Abstract: An encapsulated device includes a micro device on a substrate, a cover bonded to the substrate thereby forming a chamber to encapsulate the micro device, and a desiccant material on the cover and in the chamber. An anti-stiction material is absorbed in the desiccant material.

Abstract: The present invention is related in general to a wafer-level packaging technique for micro-electro-mechanical systems (MEMS). A cap structure is provided encapsulating a MEMS element formed on a base substrate. A channel communicates etching holes provided on said cap structure, for the passage of an etching fluid to a chamber in which the MEMS element is housed. The holes are arranged in such a manner that they do not overlap, which allows the provision of a large number of etching holes above the MEMS element, but prevents a sealing material from reaching the MEMS element. The invention provides a low cost wafer-level packaging technique for MEMS devices, that reduces the total etching time of the sacrificial material and provides a reinforced protective cap structure for the MEMS package.

Abstract: A method for manufacturing a semiconductor package with a laminated chip cavity is disclosed. A board and a metal foil having a layer of adhesive resin are provided. The metal foil is laminated with the board to make the adhesive resin be attached to the board. Next, a through opening is formed to pass through the board, the adhesive resin and the metal foil. Next, the metal foil is removed to expose an adhesive surface of the adhesive resin on the board so as to attach a carrier plate, thereby forming a chip cavity.