Organic, E.g., Plastic, Epoxy (epo) Patents (Class 257/E23.119)
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Publication number: 20100171214Abstract: A marking method is provided for putting markings on the surface of a packaged semiconductor device. The semiconductor device includes a semiconductor chip and a resin package for covering the semiconductor chip. The method includes the steps of forming a groove in the obverse surface of the resin package, and filling the groove with a resin that is visually distinguishable from the resin package.Type: ApplicationFiled: January 4, 2010Publication date: July 8, 2010Applicant: ROHM CO., LTD.Inventor: Hideaki YAMAJI
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Patent number: 7749815Abstract: In one embodiment, a method for forming a tungsten-containing material on a substrate is provided which includes positioning a substrate containing a metal nitride barrier layer within a process chamber and exposing the substrate to a reagent gas containing diborane to form a reagent layer on the metal nitride barrier layer. The method further provides exposing the substrate sequentially to a tungsten precursor and a reductant to form a nucleation layer during an atomic layer deposition (ALD) process and subsequently depositing a bulk layer over the nucleation layer. The bulk layer may contain copper, but generally contains tungsten deposited by a chemical vapor deposition (CVD) process. In some examples, the bulk layer may be used to fill apertures within the substrate.Type: GrantFiled: June 26, 2007Date of Patent: July 6, 2010Assignee: Applied Materials, Inc.Inventor: Jeong Soo Byun
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Patent number: 7750452Abstract: A semiconductor package includes a substrate or leadframe structure. A plurality of interconnected dies, each incorporating a plurality of through-hole vias (THVs) disposed along peripheral surfaces of the plurality of dies, are disposed over the substrate or leadframe structure. The plurality of THVs are coupled to a plurality of bond pads through a plurality of a metal traces. A top surface of a first THV is coupled to a bottom surface of a second THV. An encapsulant is formed over a portion of the substrate or leadframe structure and the plurality of dies.Type: GrantFiled: June 26, 2007Date of Patent: July 6, 2010Assignee: STATS ChipPAC, Ltd.Inventors: Byung Tai Do, Heap Hoe Kuan, Seng Guan Chow
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Publication number: 20100164127Abstract: The present invention relates to an epoxy resin composition for photosemiconductor element encapsulation, the epoxy resin composition including the following components (A) to (D): (A) an epoxy resin having two or more epoxy groups in one molecule thereof, (B) an acid anhydride curing agent, (C) a curing accelerator, and (D) an alcohol compound having three or more primary hydroxyl groups in one molecule thereof.Type: ApplicationFiled: April 16, 2008Publication date: July 1, 2010Applicant: NITTO DENKO CORPORATIONInventor: Hiroshi Noro
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Publication number: 20100148379Abstract: An epoxy resin composition for semiconductor encapsulation, which comprises: (A) an epoxy resin having at least two epoxy groups in a molecule thereof; (B) a compound having at least two phenolic hydroxyl groups in a molecule thereof; and (C) particles of a compound represented by general formula (1), the particles having a maximum particle diameter of not greater than 30 ?m and a standard deviation of not greater than 5 ?m, the particles being dispersed in the epoxy resin composition: wherein X1 to X5, which may be the same or different, are each a hydrogen atom, an alkyl group having 1 to 9 carbon atoms, or a fluorine atom. The epoxy resin composition is an encapsulation material excellent in pot life, fluidity and curability, and has a lower chloride ion content. The epoxy resin composition provides a highly reliable semiconductor device excellent in moisture resistant reliability.Type: ApplicationFiled: May 14, 2008Publication date: June 17, 2010Applicant: NITTO DENKO CORPORATIONInventors: Hiroshi Noro, Naohide Takamoto, Eiji Toyoda
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Publication number: 20100148380Abstract: A thermosetting epoxy resin composition comprising (A) a reaction mixture of a triazine derivative epoxy resin and an acid anhydride at a ratio of the epoxy group equivalent to the acid anhydride equivalent of 0.6 to 2.0; (B) an internal mold release agent; (C) a reflective material; (D) an inorganic filler; and (E) a curing catalyst. The internal mold release agent of component (B) comprises a carboxylate ester represented by: R11—COO—R12??(1) wherein R11 and R12 are CnH2n+1 and n is 1 to 30 and a compound represented by: wherein R1, R2, and R3 are selected from H, —OH, —OR, and —OCOCaHb with the proviso that at least one includes —OCOCaHb; R is CnH2n+1 (wherein n is an integer of 1 to 30), a is 10 to 30, and b is 17 to 61.Type: ApplicationFiled: December 14, 2009Publication date: June 17, 2010Inventors: Masaki Hayashi, Yusuke Taguchi, Kazutoshi Tomiyoshi, Tomoyoshi Tada
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Publication number: 20100148381Abstract: A semiconductor device is disclosed. One aspect provides a semiconductor device that includes a semiconductor chip including a first face and a second face opposite the first face, an encapsulant including inorganic particles encapsulating the semiconductor chip, a first metal layer attached to the first face of the semiconductor chip, a second metal layer attached the second face of the semiconductor chip, and electrically conducting material configured to connect the first metal layer with the second metal layer.Type: ApplicationFiled: December 17, 2008Publication date: June 17, 2010Applicant: Infineon Technologies AGInventors: Joachim Mahler, Edward Fuergut, Manfred Mengel, Ivan Nikitin
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Patent number: 7719097Abstract: A semiconductor device includes a semiconductor element, a transparent member separated from the semiconductor element by a designated length and facing the semiconductor element, a sealing member sealing an edge surface of the transparent member and an edge part of the semiconductor element, and a shock-absorbing member provided between the edge surface of the transparent member and the sealing member and easing a stress which the transparent member receives from the sealing member or the semiconductor element.Type: GrantFiled: February 10, 2006Date of Patent: May 18, 2010Assignee: Fujitsu Microelectronics LimitedInventor: Naoyuki Watanabe
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Publication number: 20100091630Abstract: A plurality of parallel rib prototypes are provided on a flat base plate. A plurality of semiconductor elements are placed in each trench between adjacent ones of the rib prototypes, and a transparent member is bonded to each of the semiconductor elements. Electrode pads of the semiconductor elements are wire bonded to connection electrodes. The trenches are then filled with an encapsulating resin. Thereafter, middle portions, in the longitudinal direction, of the rib prototypes are cut with a dicing saw, and adjacent ones of the semiconductor elements are separated from each other, thereby obtaining semiconductor devices.Type: ApplicationFiled: March 10, 2008Publication date: April 15, 2010Inventors: Junya Furuyashiki, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
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Publication number: 20100044888Abstract: A bis(aminophenol) derivative having substituents at positions adjacent to two amino groups is provided. The bis(aminophenol) derivative is used as a raw material of a polyamide resin for a positive-tone photosensitive resin composition. A polyamide resin comprising bis(aminophenol) and a structure derived from a carboxylic acid is also provided, the bis(aminophenol) having substituents at positions adjacent to the two amino groups. A positive-tone photosensitive resin composition comprising a polybenzooxazole precursor resin, exhibiting high sensitivity and a high cyclization rate even when cured at a low temperature is provided. Also provided is a positive-tone photosensitive resin composition comprising a polyamide resin having an imide structure, an imide precursor structure, or an amide acid ester structure. The composition exhibits high sensitivity and produces a cured product having low water absorption even when cured at a low temperature.Type: ApplicationFiled: October 23, 2007Publication date: February 25, 2010Applicant: SUMITOMO BAKELITE COMPANY LIMITEDInventor: Koji Terakawa
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Patent number: 7663218Abstract: A semiconductor component including a surface-mount housing and a method for producing the same are described herein. The semiconductor component includes lead pieces embedded into a plastic housing composition and arranged on an underside of the housing. External contact areas of the lead pieces are free of the plastic housing composition. A structured solderable coating is arranged on the external contact areas that have been kept free of the plastic housing composition, the coating includes a plurality of electrically conductive and mechanically elastic contact elements.Type: GrantFiled: August 16, 2007Date of Patent: February 16, 2010Assignee: Infineon Technologies AGInventors: Michael Bauer, Edward Fuergut, Simon Jerebic, Hermann Vilsmeier
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Publication number: 20100032823Abstract: A semiconductor device includes: a semiconductor substrate having an active area formed on a major surface of the semiconductor substrate; an interlayer insulating film and a wiring layer formed on predetermined regions of the active area; and a sealing resin film covering the interlayer insulating film, the wiring layer, and the major surface of the semiconductor substrate and filling a groove surrounding the active area. The sealing resin film 9 and a junction made of the sealing resin film filled in the groove are formed to be continuous with each other. Thus, the occurrence of a separation of the sealing resin and the inward propagation thereof are prevented.Type: ApplicationFiled: August 3, 2009Publication date: February 11, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Takahiro Ide
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Publication number: 20100019399Abstract: Disclosed is a polyorganosiloxane composition containing the following components (a)-(c). (a) 100 parts by mass of a polyorganosiloxane obtained by mixing at least one silanol compound represented by the general formula (1) below, at least one alkoxysilane compound represented by the general formula (2) below, and at least one catalyst selected from the group consisting of compounds represented by the general formula (3) below, compounds represented by the general formula (4) below and Ba(OH)2, and polymerizing the mixture without actively adding water thereinto [chemical formula 1] R2Si(OH)2 (1) [chemical formula 2] R?Si(OR?)3 (2) (chemical formula 3] M(OR??)4 (3) [chemical formula 4] M?(OR??)3 (4) (b) 0.1-20 parts by mass of a photopolymerization initiator (c) 1-100 parts by mass of a compound other than the component (a) having two or more photopolymerizable unsaturated bonding groups.Type: ApplicationFiled: September 28, 2007Publication date: January 28, 2010Inventors: Masashi Kimura, Masato Mikawa, Hideyuki Fujiyama, Takaaki Kobayashi, Tomohiro Yorisue
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Patent number: 7649272Abstract: An electrical component is placed on a substrate. At least one film comprising a plastic material is connected to the component and to the substrate in such a way that a surface contour defined by the component and the substrate is represent is represented in a surface contour of the part of the film. Said film is laminated onto the component and the substrate in such a way that the film follows the topology of the arrangement consisting of the component and the substrate. Said film is in contact with the component and the substrate in a positive and non-positive manner, and comprises a composite material containing a filler that is different to the plastic material. The processability and electrical properties of the film are influenced by the filler or the composite material obtained thereby. In this way, other functions can be integrated into the film. Said component is, for example, a power semiconductor component. An electrically insulating and thermoconductive film is used, for example.Type: GrantFiled: July 12, 2004Date of Patent: January 19, 2010Assignee: Siemens AktiengesellschaftInventors: Franz Auerbach, Karl Weidner
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Publication number: 20100007007Abstract: A semiconductor package includes: a semiconductor chip having a first surface, and a second surface that is opposite to the first surface and allows a semiconductor device to be formed thereon; bonding pads disposed on the second surface of the semiconductor chip; and a metal ion barrier layer disposed on the first surface of the semiconductor chip, and preventing metal ions from penetrating into the semiconductor chip through the first surface of the semiconductor chip. Accordingly, the semiconductor package can obtain a superior semiconductor device by minimizing moisture absorption and effectively blocking the penetration of metal ions.Type: ApplicationFiled: July 2, 2009Publication date: January 14, 2010Applicant: Samsung Electronics Co., LtdInventors: Sung-hwan YOON, Jai-kyeong Shin, Yong-nam Koh, Hyoung-suk Kim, In-ku Kang, Ho-jin Lee, Sang-wook Park, Joong-kyo Kook, Min-young Son, Soong-yong Hur
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Patent number: 7642641Abstract: A semiconductor component includes a semiconductor chip provided with a passivation layer that covers the topmost interconnect structure of the semiconductor chip whilst leaving contact areas free. The passivation layer is in direct adhesive contact with the plastic housing composition of the semiconductor component. The passivation layer includes a polymer with embedded mineral-ceramic nanoparticles.Type: GrantFiled: May 31, 2007Date of Patent: January 5, 2010Assignee: Infineon Technologies AGInventors: Joachim Mahler, Ralf Otremba, Bernd Betz, Khalil Hosseini
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Patent number: 7629695Abstract: A stacked electronic component comprises a first electronic component adhered on a substrate via a first adhesive layer, and a second electronic component adhered by using a second adhesive layer thereon. The second adhesive layer has a two-layer structure formed by a same material and having different modulus of elasticity. The second adhesive layer of the two-layer structure has a first layer disposed at the first electronic component side and a second layer disposed at the second electronic component side. The first layer softens or melts at an adhesive temperature. The second layer maintains a layered shape at the adhesive temperature. According to the stacked electronic component, occurrences of an insulation failure and a short circuiting are prevented, and in addition, a peeling failure between the electronic components, an increase of a manufacturing cost, and so on, can be suppressed.Type: GrantFiled: May 19, 2005Date of Patent: December 8, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Atsushi Yoshimura, Naoyuki Komuta, Hideo Numata
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Publication number: 20090289376Abstract: The present invention discloses a light-proof chip packaging structure, which comprises an electronic substrate, at least one semiconductor chip installed on the electronic substrate, and a light-proof film. The light-proof film comprises a main portion, which is substantially conformable to cover all the non-concealed faces of the semiconductor chip. The light-proof film also has an extension portion, which extends from the main portion and covers the areas neighboring the semiconductor chip. The light-proof film comprises a metallic layer capable of blocking light and an insulating layer interposing between the metallic layer and the semiconductor chip. The present invention can effectively reduce the gaps between the semiconductor chip and the light-proof film, whereby no bubble is formed in encapsulating the electronic substrate, thus reducing the possibility of damaging the packing structure.Type: ApplicationFiled: May 22, 2008Publication date: November 26, 2009Inventors: Ming-Chih CHIEN, Jung-Hsiu Chen
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Publication number: 20090267225Abstract: In a semiconductor integrated circuit sandwiched between a pair of a first impact resistance layer and a second impact resistance layer, an impact diffusion layer is provided between the semiconductor integrated circuit and the second impact resistance layer. By provision of the impact resistance layer against the external stress and the impact diffusion layer for diffusing the impact, force applied to the semiconductor integrated circuit per unit area is reduced, so that the semiconductor integrated circuit is protected. The impact diffusion layer preferably has a low modulus of elasticity and high breaking modulus.Type: ApplicationFiled: April 24, 2009Publication date: October 29, 2009Inventor: Shingo Eguchi
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Publication number: 20090261484Abstract: A liquid resin composition for use as a sealing resin which reduces wear on a dicing blade or grinder employed for signularization or grinding. The liquid resin composition includes hollow and/or porous particles as a filler, and is adapted in use to be applied on a substrate constituting a semi-conductor device or electronic part.Type: ApplicationFiled: May 5, 2009Publication date: October 22, 2009Inventors: Naoki Kanagawa, Yasutaka Miyata
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Patent number: 7605474Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.Type: GrantFiled: June 30, 2006Date of Patent: October 20, 2009Assignee: Industrial Technology Research InstituteInventors: Ruoh Huey Uang, Yu Chih Chen, Ren Jen Lin, Syh Yuh Cheng
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Publication number: 20090230570Abstract: The present invention provides a resin composition for sealing a semiconductor device. The resin composition is in liquid state at room temperature, and can be supplied from a dispenser. The composition is advantageous in regard to molding time, viscosity, moldability and adhesion. This resin composition indispensably comprises a bisphenol type epoxy resin having a polymerization degree of 3 or less, a particular phenol resin or a particular acid anhydride, a catalyst (A) such as 1-cyanoethyl-2-undecylimidazolium trimellitate, a catalyst (B) such as 1-cyanoethyl-2-ethyl-4-methylimidazol, and spherical fused silica particles. The weight ratio (A/B) between the catalysts (A) and (B) is in the range of 9/1 to 4/6.Type: ApplicationFiled: March 10, 2009Publication date: September 17, 2009Inventors: Taro Fukaya, Shinetsu Fujieda, Tatsuoki Kohno
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Publication number: 20090233228Abstract: The present invention provides a positive photosensitive resin composition, characterized by comprising 1 to 50 parts by mass of a photo-acid generator and 0.01 to 70 parts by mass of a terpene compound in combination with 100 parts by mass of a hydroxypolyamide having repeating units. A terpene compound can be combined with a hydroxypolyamide having a particular structure to provide a positive photosensitive resin composition excellent in positive lithography performance such as sensitivity and resolution.Type: ApplicationFiled: October 20, 2006Publication date: September 17, 2009Applicant: ASAHI KASEI EMD CORPORATIONInventor: Satoshi Shibui
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Publication number: 20090227072Abstract: A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points. Also, a flip chip package is made by the method. In some embodiments the metallurgical connection includes an alloy of gold and tin at the interface between the bumps and the interconnect points.Type: ApplicationFiled: May 26, 2009Publication date: September 10, 2009Applicant: STATS CHIPPAC, LTD.Inventors: Nazir Ahmad, Young-Do Kweon, Samuel Tam, Kyung-Moon Kim, Rajendra D. Pendse
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Patent number: 7579215Abstract: A method for fabricating a low cost integrated circuit package (600) includes separating a processed silicon wafer into a plurality of individual die (601) and then positioning the die (603) on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered (605) with one or more epoxy materials to form a group of embedded die packages. One or more pads on the die are then exposed (615) and subsequently connected (617) to an I/O connection in a die I/O connection area. Each of the die are then separated (619) forming singular embedded die packages from the secondary substrate. The method provides a manufacturing process to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.Type: GrantFiled: March 30, 2007Date of Patent: August 25, 2009Assignee: Motorola, Inc.Inventor: Thomas J. Swirbel
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Publication number: 20090166897Abstract: An encapsulation resin composition for preapplication, comprising (a) an epoxy resin, and (b) a curing agent having flux activity, wherein the tack after B-staging is at least 0 gf/5 mm? and at most 5 gf/5 mm?, and the melt viscosity at 130° C. is at least 0.01 Pa·s and at most 1.0 Pa·s; a preapplied encapsulated component and semiconductor device using the composition, and a process of fabrication thereof. The resin composition is less susceptible to air entrapment during provisional placement of semiconductor chips, and excels in workability and reliability.Type: ApplicationFiled: May 30, 2006Publication date: July 2, 2009Inventors: Satoru Katsurayama, Yushi Sakamoto, Masaya Koda
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Publication number: 20090140411Abstract: The present invention provides a resin-sealed semiconductor device, which includes a semiconductor element; a plurality of terminal members, each surrounding the semiconductor element and including an external terminal portion, an internal terminal portion and a connecting portion; bonding wires, each connecting the semiconductor element with the internal terminal portion; and a resin-sealing portion sealing the semiconductor element, terminal members and bonding wires. Each terminal member is composed of an inner thinned portion forming the internal terminal portion and an outer thickened portion forming the external terminal portion. A rear face of each internal terminal portion, and a front face, a rear face and an outer side face of each external terminal portion are exposed to the outside from the resin-sealing portion, respectively.Type: ApplicationFiled: June 22, 2007Publication date: June 4, 2009Applicant: Dai Nappon Printing Co., LtdInventors: Masachika Masuda, Chikao Ikenaga, Koji Tomita
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Patent number: 7527991Abstract: In a light emitting apparatus comprising a light emitting device, a fluorescent substance capable of absorbing at least a portion of light emitted by the light emitting device and emitting light having a different wavelength, and a color converting member which contains the fluorescent substance and directly coat the light emitting device, the color converting member contains at least an epoxy resin derived from triazine and a mixing ratio of the epoxy resin derived from triazine to the acid anhydride curing agent in the color converting member is from 100:80 to 100:240.Type: GrantFiled: May 20, 2005Date of Patent: May 5, 2009Assignee: Nichia CorporationInventors: Masanobu Sato, Tomoya Tsukioka, Masafumi Kuramoto
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Publication number: 20090096114Abstract: An epoxy resin composition for encapsulating a semiconductor chip according to this invention comprises (A) a crystalline epoxy resin, (B) a phenol resin represented by general formula (1): wherein R1 and R2 are independently hydrogen or alkyl having 1 to 4 carbon atoms and two or more R1s or two or more R2s are the same or different; a is integer of 0 to 4; b is integer of 0 to 4; c is integer of 0 to 3; and n is average and is number of 0 to 10, (C) a (co)polymer containing butadiene-derived structural unit or its derivative, and (D) an inorganic filler in the amount of 80 wt % to 95 wt % both inclusive in the total epoxy resin composition.Type: ApplicationFiled: November 13, 2008Publication date: April 16, 2009Inventors: Takahiro Kotani, Hidetoshi Seki, Masakatsu Maeda, Kazuya Shigeno, Yoshinori Nishitani
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Publication number: 20090065590Abstract: A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.Type: ApplicationFiled: September 4, 2008Publication date: March 12, 2009Inventors: Tomoyuki AOKI, Takuya TSURUME, Hiroki ADACHI, Nozomi HORIKOSHI, Hisashi OHTANI
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Patent number: 7485964Abstract: A dielectric material formed by contacting a low dielectric constant polymer with liquid or supercritical carbon dioxide, under thermodynamic conditions which maintain the carbon dioxide in the liquid or supercritical state, wherein a porous product is formed. Thereupon, thermodynamic conditions are changed to ambient wherein carbon dioxide escapes from the pores and is replaced with air.Type: GrantFiled: April 6, 2006Date of Patent: February 3, 2009Assignee: International Business Machines CorporationInventors: John M. Cotte, Kenneth John McCullough, Wayne Martin Moreau, Kevin Petrarca, John P. Simons, Charles J. Taft, Richard Volant
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Publication number: 20080318055Abstract: An electronic component includes a base insulative layer having a first surface and a second surface; an electronic device having a first surface and a second surface, and the electronic device being secured to the base insulative layer; an adhesive layer disposed between the first surface of the electronic device and the second surface of the base insulative layer; and a removable layer disposed between the first surface of the electronic device and the second surface of the base insulative layer. The base insulative layer secures to the electronic device through the removable layer. The removable layer is capable of releasing the base insulative layer from the electronic device. The removal may be done without damage to a predetermined part of the electronic component.Type: ApplicationFiled: June 21, 2007Publication date: December 25, 2008Applicant: GENERAL ELECTRIC COMPANYInventors: Raymond Albert Fillion, David Richard Esler, Jeffrey Scott Erlbaum, Ryan Christopher Mills, Charles Gerard Woychik
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Publication number: 20080318054Abstract: An electronic component includes a base insulative layer having a first surface and a second surface; an electronic device having a first surface and a second surface, and the electronic device being secured to the base insulative layer; an adhesive layer disposed between the first surface of the electronic device and the second surface of the base insulative layer; and a removable layer disposed between the first surface of the electronic device and the second surface of the base insulative layer. The base insulative layer secures to the electronic device through the removable layer. The removable layer releases the base insulative layer from the electronic device at a sufficiently low temperature.Type: ApplicationFiled: June 21, 2007Publication date: December 25, 2008Applicant: GENERAL ELECTRIC COMPANYInventors: Raymond Albert Fillion, Ryan Christopher Mills
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Publication number: 20080303140Abstract: To provide a semiconductor device which can increase reliability with respect to external force, especially pressing force, while the circuit size or the capacity of memory is maintained. A pair of structure bodies each having a stack of fibrous bodies of an organic compound or an inorganic compound, which includes a plurality of layers, especially three or more layers, is impregnated with an organic resin, and an element layer provided between the pair of structure bodies are included. The element layer and the structure body can be fixed to each other by heating and pressure bonding. Further, a layer for fixing the element layer and the structure body may be provided. Alternatively, the structure body fixed to an element layer can be formed in such a way that after a plurality of fibrous bodies is stacked over the element layer, the fibrous bodies are impregnated with an organic resin.Type: ApplicationFiled: May 29, 2008Publication date: December 11, 2008Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisashi Ohtani, Eiji Sugiyama
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Publication number: 20080258318Abstract: Disclosed herewith is a semiconductor device capable of suppressing the peeling-off that might occur between an island and a resin layer due to a difference of the shrinkage between those items, thereby the reliability of the semiconductor device is improved. The semiconductor device of the present invention includes an island, a semiconductor chip mounted on the island, and a resin layer that seals the island and the semiconductor chip respectively. And at the interface between the island and the resin layer is provided a buffer film having an elastic modulus lower than that of the resin layer.Type: ApplicationFiled: April 18, 2008Publication date: October 23, 2008Applicant: NEC Electronics CorporationInventor: Naoto Kimura
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Publication number: 20080258317Abstract: A resin layer covering a semiconductor chip on a wiring board is composed of a first resin layer and a second resin layer, wherein the first resin layer and the second resin layer differ in their plan view pattern, satisfying a relation of a<b, where “a” is difference in length in the direction from the center of the board towards the edges between the first resin layer and the second resin layer, and “b” is difference in length in the direction from the center of the board towards the corners between the first resin layer and the second resin layer.Type: ApplicationFiled: April 17, 2008Publication date: October 23, 2008Applicant: NEC ELECTRONICS CORPORATIONInventor: Daisuke EJIMA
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Publication number: 20080237895Abstract: The invention provides a semiconductor device including a rectangular chip provided on a mounting region of a substrate, a liquid resin layer provided under the rectangular chip and on a side surface of the chip, and a plurality of dams formed on the substrate so as to extend along the side surface of the rectangular chip. The configuration allows the semiconductor device to be provided with the substrate having a reduced size which is achieved by preventing a liquid resin from flowing out.Type: ApplicationFiled: March 6, 2008Publication date: October 2, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Yoshihiro Saeki
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Publication number: 20080224334Abstract: A substrate on which a plurality of epoxy over molded integrated circuit dies are formed includes a beam formed on the substrate for providing stiffness to the substrate. The beam includes structure having a cross-sectional shape, for example, substantially in the shape of a trapezoid, “T” or “L”, and may be formed on the top or bottom surface of the substrate.Type: ApplicationFiled: February 18, 2008Publication date: September 18, 2008Inventor: Robert S. Stricklin
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Publication number: 20080217793Abstract: A method and device comprising an easily reworkable alpha particle barrier is provided. The easily reworkable alpha particle barrier is applied in the space between the surface of the chip and the surface of the substrate, and reduces soft error rate (SER). Further, the easily reworkable alpha particle barrier material is chosen from the group of an organic material, a hydrocarbon, more specifically a polyalphaolefin (PAO) oil, and a polymer or filled polymer; wherein the polyalphaolefin oil has a viscosity below 1000 cSt (at 100° C.). The easily reworkable alpha particle barrier material can be used with multichip modules (MCM's) allowing easy device rework of one or more dies without affecting other dies on the same substrate.Type: ApplicationFiled: April 16, 2008Publication date: September 11, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Rehan CHOUDHARY, Benjamin V. Fasano, Sushumna Iruvanti, Daniel D. Reinhardt, Deborah A. Sylvester
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Publication number: 20080179760Abstract: A method for producing a device and a device is disclosed. In one embodiment, a component is surrounded by a material. A fluoropolymer-containing compound is produced at a surface of the material. A molding is produced from a material and a fluoropolymer-containing compound is produced at a surface of the molding by a vapor deposition.Type: ApplicationFiled: November 20, 2007Publication date: July 31, 2008Applicant: INFINEON TECHNOLOGIES AGInventors: Joachim Mahler, Markus Brunnbauer, Manfred Mengel, Christof Matthias Schilz
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Publication number: 20080128922Abstract: There is provided an epoxy resin composition for encapsulating a semiconductor comprising an epoxy resin (A), wherein the epoxy resin (A) including: a crystalline epoxy resin (a1) having a melting point of 50° C. to 150° C., an epoxy resin (a2) represented by formula (1), and at least one epoxy resin (a3) selected from an epoxy resin represented by formula (2) and an epoxy resin represented by a formula (3): in which R1's, which may be the same or different, represent a hydrocarbon group having 1 to 4 carbon atoms; R2's, which may be the same or different, represent a hydrogen atom or a hydrocarbon group having 1 to 4 carbon atoms; m is an integer of 0 to 5; and n is an integer of 0 to 6.Type: ApplicationFiled: October 31, 2007Publication date: June 5, 2008Inventors: Takahiro Kotani, Yoshinori Nishitani, Daisuke Oka
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Publication number: 20080128906Abstract: A semiconductor device having a semiconductor substrate, at least one of a protruding electrode and wiring formed on one surface of the semiconductor substrate, and a first resin film formed on this surface. The first resin film has elasticity low enough to reduce stress induced by a difference in thermal expansion coefficient between the semiconductor substrate and the first resin film. A second resin film, having higher elasticity or higher strength than the first resin film, may be formed on the other surface of the semiconductor substrate.Type: ApplicationFiled: January 3, 2008Publication date: June 5, 2008Applicant: ROHM CO., LTDInventor: Kazutaka Shibata
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Patent number: 7382041Abstract: A method of producing an organic-inorganic composite insulating material for electronic element comprises subjecting a mixture of an organic polymer or its solution and a metal alkoxide or its solution as a starting material to sol-gel reaction of the metal alkoxide in the presence of the organic polymer.Type: GrantFiled: July 5, 2005Date of Patent: June 3, 2008Assignee: Fuji Xerox Co., Ltd.Inventors: Shinsuke Okada, Masaki Hirakata, Miho Watanabe, Taishi Shigematsu, Shigeki Ooma, Chikara Manabe
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Patent number: 7365414Abstract: Dielectric materials comprising release agents are described. Also described are a process for improving the proccessability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved substrate.Type: GrantFiled: December 31, 2003Date of Patent: April 29, 2008Assignee: Intel CorporationInventors: Paul A. Koning, James C Matayabas, Jr.
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Publication number: 20080088037Abstract: Provided are a semiconductor package and a method for manufacturing the same. The semiconductor package includes a semiconductor chip, a substrate attached to the semiconductor chip, a wire electrically connecting the semiconductor chip to the substrate, an external connection terminal electrically connecting the semiconductor chip to the outside, and an encapsulant formed of a plurality of insulators having different physical properties from each other, the encapsulant encapsulating the wire and surroundings of the wire. The method includes primarily encapsulating a window of the semiconductor package with an encapsulant having a low modulus and secondly encapsulating the window with an encapsulant having a high modulus.Type: ApplicationFiled: September 19, 2007Publication date: April 17, 2008Applicant: Samsung Electronics Co., Ltd.Inventors: Hyung-Jik Byun, So-Young Jung
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Publication number: 20080054441Abstract: A method for fabricating chip package includes providing a semiconductor chip with a bonding pad, comprising an adhesion/barrier layer, connected to a pad through an opening in a passivation layer, next adhering the semiconductor chip to a substrate using a glue material, next bonding a wire to the bonding pad and to the substrate, forming a polymer material on the substrate, covering the semiconductor chip and the wire, next forming a lead-free solder ball on the substrate, and then cutting the substrate and polymer material to form a chip package.Type: ApplicationFiled: September 5, 2007Publication date: March 6, 2008Applicant: MEGICA CORPORATIONInventor: Mou-Shiung Lin
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Patent number: 7332822Abstract: A system for underfilling in a chip package includes an underfill mixture that ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In one embodiment, the system includes an underfill mixture that comprises a principal underfill composition of a rigid octaaminophenyl silsesquioxane (OAPS) that is used as a curing agent for a tetrafunctional, low viscosity, and relatively rigid TGMX epoxy resin. An embodiment is also directed to the assembly of a flip chip package that uses the underfill mixture.Type: GrantFiled: October 4, 2005Date of Patent: February 19, 2008Assignee: Delphi Technologies, Inc.Inventors: Rafil Basheer, Richard M. Laine, Santy Sulaiman, Chad M. Brick, Christopher M. Desana
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Publication number: 20080038874Abstract: A method for fabricating chip package includes providing a semiconductor chip with a metal bump, next adhering the semiconductor chip to a substrate using a glue material, next forming a polymer material on the substrate, on the semiconductor chip, and on the metal bump, next polishing the polymer material, next forming a patterned circuit layer over the polymer material and connected to the metal bump, and then forming a tin-containing ball over the patterned circuit layer and connected to the patterned circuit layer.Type: ApplicationFiled: August 10, 2007Publication date: February 14, 2008Applicant: MEGICA CORPORATIONInventor: Mou-Shiung Lin
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Publication number: 20080017999Abstract: A semiconductor device including a semiconductor device, an integrated circuit chip, a sealing resin encapsulating the integrated circuit chip and an insulating waterproof film covering at least a portion of a surface of said sealing resin and preventing penetration of moisture into the sealing resin.Type: ApplicationFiled: September 20, 2007Publication date: January 24, 2008Applicant: FUJITSU LIMITEDInventors: Hideaki Kikuchi, Kouichi Nagai
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Patent number: 7319276Abstract: A substrate for a pre-soldering material and a fabrication method of the substrate are proposed. The substrate having at least one surface formed with a plurality of conductive pads is provided. An insulating layer is formed over the surface of the substrate in such a way that a top surface of each of the conductive pads is exposed. Next, a conductive film and a resist layer are formed in sequence on the insulating layer and the conductive pads, wherein a plurality of openings are formed in the resist layer to expose a part of the conductive film above the conductive pad. Then, a pre-soldering material is deposited over the conductive pad by stencil printing or electroplating process.Type: GrantFiled: August 18, 2006Date of Patent: January 15, 2008Assignee: Phoenix Precision Technology CorporationInventors: Shih-Ping Hsu, Chu-Chin Hu